Identify Logic Gate symbols:

The term “Logic” refers to a two state method of signalling using

two distinct and readily recognisable voltage states, called Logic
state 1, and Logic state 0.

For the purposes of this discussion, we will treat Logic 1 as

+5VDC, and Logic 0 as 0VDC.
Identify Logic Gate symbols:
“Logic” gates are circuit devices that will have one or more
inputs, and only one output.

The state of the output is determined in a predictable manner by

the state of the inputs.

The following logic gates are listed in the CAA Avionics 1 syllabus:

AND, NAND, OR, NOR, XOR, NOT

 Identify Logic Gate symbols:

The symbols for these listed

“Logic” gates are:
 Interpret Logic circuits:
In order to interpret logic circuits the operation of “Logic” gates
must be understood.

Lets look at each individually, then combine them in various

arrangements.
 AND gates:

AND gates have two or more inputs. Every input must be a logic 1 before the
output will be a Logic 1.

Any other combination of input signals will result in a Logic 0 output.

Test yourself on the following slide by working out what the output should be,
then click to reveal:
 AND gates:
Need both inputs to be a “1” before the output will be a “1”.

0 1
1 0 0 4 0
0 1

1 0
2 1 1 5 0
1 0

1 1
3 0 1 6 1
0 1
 AND gates:

What would happen if the inputs of an AND gate were joined together so that the
same Logic state appeared at each input?

The same Logic would appear at the output as was applied at the combined input.

If a Logic 1 was applied to the input, the output would also be Logic 1.

If Logic 0 was applied to the combined input, the output would also be Logic 0.
 NAND gates:

NAND gates look like AND gates but with a small circle before the output. They
have two or more inputs. Every input must be a logic 1 before the output will be a
Logic 0.

Any other combination of input signals will result in a Logic 1 output. They work
like AND gates except that every output result is the opposite Logic state to that of
an ordinary AND gate.

Test yourself on the following slide by working out what the output should be,
then click to reveal:
 NAND gates:
0 1
1 1 0 4 1
0 1

1 0
2 0 1 5 1
1 0

1 1
3 1 1 6 0
0 1
 NAND gates:

What would happen if the inputs of an NAND gate were joined together so that
the same Logic state appeared at each input?

The opposite Logic would appear at the output as was applied at the combined
input.

If a Logic 1 was applied to the input, the output would be Logic 0.

If Logic 0 was applied to the combined input, the output would be Logic 1.
 NOT gates:

NOT gates, or INVERTERS, perform a similar role to the NAND gate with its inputs
joined together. They cause the opposite Logic state to appear at the output to
what was applied at the input.

Note that like the NAND gate, the NOT gate has a small circle before its output.

In both cases this indicates that the output has been “inverted”, or changed to the
opposite logic state.
 NOT gates:

1 0

0 1
 OR gates:

OR gates have two inputs. At least one input (or both inputs) must be a logic 1
before the output will be a Logic 1.

Only if both input signals are Logic 0, will the output also be Logic 0.

Test yourself on the following slide by working out what the output should be,
then click to reveal:
 OR gates:
0 0
1 0 3 1
0 1

1 1
2 1 4 1
0 1
 NOR gates:

NOR gates have two inputs. At least one input (or both inputs) must be a logic 1
before the output will be a Logic 0.

Only if both input signals are Logic 0, will the output be Logic 1. They work like OR
gates except that every output result is the opposite Logic state to that of an
ordinary OR gate.

Test yourself on the following slide by working out what the output should be,
then click to reveal:
 NOR gates:
0 0
1 1 3 0
0 1

1 1
2 0 4 0
0 1
 XOR gates:

EXCLUSIVE OR gates have two inputs. Only one input, NOT both, must be a logic 1
before the output will be a Logic 1.

Only if both input signals are Logic 0, or Logic 1, will the output also be Logic 0.

Test yourself on the following slide by working out what the output should be,
then click to reveal:
 XOR gates:
0 1
1 0 3 0
0 1

1 0
2 1 4 1
0 1
 XOR gates:

Question: What effect would an EXCLUSIVE OR gate have on a signal if both its
input legs were tied together as shown above?

The output would always be Logic 0 regardless of the input state of the combined
legs, because the input Logic states would always be identical.
 Interpret Logic circuits:
Up till now we have only considered individual gates.

Many logic circuits contain multiple gates however.

How are these circuits interpreted?

Consider the inputs in the following circuit. Determine the logic

at each gate output, and transfer this along the circuit to the
inputs of the next gate in line.

As you determine all the inputs of each gate, repeat this step,
until you achieve the final logic output.
 Interpret Logic circuits:
0 Now determine the Logic
There are six 0 output at each of the
inputs to this 0
1 first four AND gates, and
circuit: I0 to I3, 0 feed it through to the
and S0 to S1 1
1 final OR gate inputs:
1
Click to view 1 1
the input Logic: 1 0
1 1
0 1
0 0
Now trace the 0 0
0 0
Logic inputs to
0
each gate 1 Now determine the
input: 1 output of the final gate,
1
0 0 which is the output of
1 the complete circuit.

Note it is a four input OR

0 1 gate, but the rules for OR
gates as discussed earlier
still apply.
 Interpret Logic circuits:

Now repeat the last exercise in the following slides using the logic
input shown:
 Interpret Logic circuits:
1 Now determine the Logic
There are six 1 output at each of the
inputs to this 1
1 first four AND gates, and
circuit: I0 to I3, 1 feed it through to the
and S0 to S1 final OR gate inputs:
1
1
Click to view 1 0
the input Logic: 0 1
1 0
0 1
0 0
Now trace the 0 0
0 0
Logic inputs to
1
each gate Now determine the
input: 0 output of the final gate,
0
0 0 which is the output of
0 the complete circuit.

Note it is a four input OR

0 0 gate, but the rules for OR
gates as discussed earlier
still apply.
 Interpret Logic circuits:
1 Now determine the Logic
There are six 1 output at each of the
inputs to this 0
0 first four AND gates, and
circuit: I0 to I3, 0 feed it through to the
and S0 to S1 final OR gate inputs:
0
0
Click to view 0 0
the input Logic: 1 0
0 0
1 0
1 0
Now trace the 1 0
1 0
Logic inputs to
0
each gate Now determine the
input: 0 output of the final gate,
0
1 0 which is the output of
1 the complete circuit.

Note it is a four input OR

1 1 gate, but the rules for OR
gates as discussed earlier
still apply.
 Interpret Logic circuits:
Note that the preceding multiple gate exercises utilised AND, OR
and NOT gates only.

Also consider the different operation of NAND, NOR, and

EXCLUSIVE OR gates if used in similar combinations:

THE END