SMVEC ANALOG & DIGITAL ELECTRONICS

1. The two basic types of signals are analog and:

A. Digilog
B. Digital
C. Vetilog
D. sine wave
2. which of the following characterizes an analog quantity?
A. Discrete levels represent changes in a quantity.
B. Its values follow a logarithmic response curve.
C. It can be described with a finite number of steps.
D. It has a continuous set of values over a given range.
3. ASCII stands for:
A. American Serial Communication Interface
B. Additive Signal Coupling Interface
C. American Standard Code for Information Interchange
D. none of the above
4. Which type of signal is represented by discrete values?
A. noisy signal
B. nonlinear
C. analog
D. digital
5. A data conversion system may be used to interface a digital computer system to:
A. an analog output device
B. a digital output device
C. an analog input device
D. a digital printer
6. When 1100010 is divided by 0101, what will be the decimal remainder?
A. 2
B. 3
C. 4
D. 6
7. What are the two types of basic adder circuits?
A. half adder and full adder
B. half adder and parallel adder
C. asynchronous and synchronous
D. one's complement and two's complement
8. Adding the two's complement of –11 + (–2) will yield which two's complement answer?
A. 1110 1101
B. 1111 1001
C. 1111 0011
D. 1110 1001
SMVEC ANALOG & DIGITAL ELECTRONICS

9. The two's complement system is to be used to add the signed numbers 11110010 and
11110011. Determine, in decimal, the sign and value of each number and their sum.
A. –14 and –13; –27
B. –113 and –114; 227
C. –27 and –13; 40
D. –11 and –16; –27
10. The fast carry or look-ahead carry circuits found in most 4-bit parallel-adder circuits:
A. increase ripple delay
B. add a 1 to complemented inputs
C. reduce propagation delay
D. determine sign and magnitude
11. How many basic binary subtraction operations are possible?
A. 4
B. 3
C. 2
D. 1
12. How many basic binary subtraction combinations are possible?
A. 4
B. 3
C. 2
D. 1
13. Use the two's complement system to add the signed numbers 11110010 and 11110011.
Determine, in decimal, the sign and value of each number and their sum.
A. –14 and –13; –27
B. –113 and –114; 227
C. –27 and –13; 40
D. –11 and –16; –27
14. The selector inputs to an arithmetic-logic unit (ALU) determine the:
A. selection of the IC
B. arithmetic or logic function
C. data word selection
D. clock frequency to be used
15. Adding in binary, the decimal values 26 + 27 will produce a sum of:
A. 111010
B. 110110
C. 110101
D. 101011
16. Binary subtraction of a decimal 15 from 43 will utilize which two's complement?
A. 101011
B. 110000
SMVEC ANALOG & DIGITAL ELECTRONICS

C. 011100
D. 110001
17. When multiplying in binary the decimal values 13 × 11, what is the third partial product?
A. 100000
B. 100001
C. 0000
D. 1011
18. The range of an 8-bit two's complement word is from:
A. +12810 to –12810
B. –12810 to +12710
C. +12810 to –12710
D. +12710 to –12710
19. Which of the following is a type of error associated with digital-to-analog converters
(DACs)?
A. nonmonotonic error
B. incorrect output codes
C. offset error
D. nonmonotonic and offset error
20. A 4-bit R/2R digital-to-analog (DAC) converter has a reference of 5 volts. What is the analog
output for the input code 0101.
A. 0.3125 V
B. 3.125 V
C. 0.78125 V
D. –3.125 V
21. A binary-weighted digital-to-analog converter has an input resistor of 100 k . If the resistor
is connected to a 5 V source, the current through the resistor is:
A. 50 A
B. 5 mA
C. 500 A
D. 50 mA
22. What is the resolution of a digital-to-analog converter (DAC)?
A. It is the comparison between the actual output of the converter and its expected output
B. It is the deviation between the ideal straight-line output and the actual output of the
converter.
C. It is the smallest analog output change that can occur as a result of an increment
in the digital input.
D. It is its ability to resolve between forward and reverse steps when sequenced over its
entire range.
23. The practical use of binary-weighted digital-to-analog converters is limited to:
A. R/2R ladder D/A converters
B. 4-bit D/A converters
C. 8-bit D/A converters
D. op-amp comparators
24. The difference between analog voltage represented by two adjacent digital codes, or the
analog step size, is the:
SMVEC ANALOG & DIGITAL ELECTRONICS

A. Quantization
B. Accuracy
C. Resolution
D. Monotonicity
25. The primary disadvantage of the flash analog-to digital converter (ADC) is that:
A. it requires the input voltage to be applied to the inputs simultaneously
B. a long conversion time is required
C. a large number of output lines is required to simultaneously decode the input voltage
D. a large number of comparators is required to represent a reasonable sized
binary number
26. A binary-weighted digital-to-analog converter has a feedback resistor, Rf, of 12 k . If 50
A of current is through the resistor, the voltage out of the circuit is:
A. 0.6 V
B. –0.6 V
C. 0.1 V
D. –0.1 V
27. What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared to a
binary-weighted digital-to-analog DAC converter?
A. It only uses two different resistor values.
B. It has fewer parts for the same number of inputs.
C. Its operation is much easier to analyze.
D. The virtual ground is eliminated and the circuit is therefore easier to understand and
troubleshoot.
28. The resolution of a 0–5 V 6-bit digital-to-analog converter (DAC) is:
A. 63%
B. 64%
C. 1.56%
D. 15.6%
29. In a flash analog-to-digital converter, the output of each comparator is connected to an input
of a:
A. Decoder
B. priority encoder
C. multiplexer
D. demultiplexer
30. Which is not an analog-to-digital (ADC) conversion error?
A. differential nonlinearity
B. missing code
C. incorrect code
D. offset
31. Sample-and-hold circuits in analog-to digital converters (ADCs) are designed to:
A. sample and hold the output of the binary counter during the conversion process
B. stabilize the comparator's threshold voltage during the conversion process
C. stabilize the input analog signal during the conversion process
D. sample and hold the D/A converter staircase waveform during the conversion process
32. How many inputs are required for a 1-of-10 BCD decoder?
A. 4
SMVEC ANALOG & DIGITAL ELECTRONICS

B. 8
C. 10
D. 1
33. Most demultiplexers facilitate which of the following?
A. decimal to hexadecimal
B. single input, multiple outputs
C. ac to dc
D. odd parity to even parity
34. One application of a digital multiplexer is to facilitate:
A. code conversion
B. parity checking
C. parallel-to-serial data conversion
D. data generation
35. Select one of the following statements that best describes the parity method of error
detection:
A. Parity checking is best suited for detecting single-bit errors in transmitted codes.
B. Parity checking is best suited for detecting double-bit errors that occur during the
transmission of codes from one location to another.
C. Parity checking is not suitable for detecting single-bit errors in transmitted codes.
D. Parity checking is capable of detecting and correcting errors in transmitted codes.
36. A multiplexed display:
A. accepts data inputs from one line and passes this data to multiple output lines
B. uses one display to present two or more pieces of information
C. accepts data inputs from multiple lines and passes this data to multiple output lines
D. accepts data inputs from several lines and multiplexes this input data to four BCD
lines
37. When two or more inputs are active simultaneously, the process is called:
A. first-in, first-out processing
B. priority encoding
C. ripple blanking
D. priority decoding
38. Which type of decoder will select one of sixteen outputs, depending on the 4-bit binary input
value?
A. Hexadecimal
B. dual octal outputs
C. binary-to-hexadecimal
D. hexadecimal-to-binary
39. A magnitude comparator determines:
A. A B and if A B or A >> B
B. A B and if A > B or A < b
SMVEC ANALOG & DIGITAL ELECTRONICS

C. A = B and if A > B or A < b

D. A B and if A < b or a > B
40. A circuit that responds to a specific set of signals to produce a related digital signal output is
called a(n):
A. BCD matrix
B. display driver
C. encoder
D. decoder
41. Which digital system translates coded characters into a more intelligible form?
A. Encoder
B. Display
C. Counter
D. Decoder
42. A basic multiplexer principle can be demonstrated through the use of a:
A. single-pole relay
B. DPDT switch
C. rotary switch
D. linear stepper
43. In a BCD-to-seven-segment converter, why must a code converter be utilized?
A. No conversion is necessary.
B. to convert the 4-bit BCD into gray code
C. to convert the 4-bit BCD into 10-bit code
D. to convert the 4-bit BCD into 7-bit code
44. For a 10-bit DAC, the Resolution is defined by which of the following
A. 1024
B. 1/1024
C. 10
D. None
45. SRAM full form is
A. Serial Read Access Memory
B. Static Random Access Memory
C. Static Read-only Access memory
46. What are the minimum number of 2 to 1 multiplexers required to generate a 2 input AND
gate and a 2 input Ex-OR gate?
A. 1 and 2
B. 1 and 3
C. 1 and 1
D. 2 and 2
47. The output of a logic gate is ‘1’ when all its inputs are at logic ‘0’. Then gate is either
A. A NAND or an EX-OR gate
B. A NOR or an EX-NOR gate
C. An OR or a EX-NOR gate
D. An AND or an Ex-OR gate
SMVEC ANALOG & DIGITAL ELECTRONICS

48. A PLA can be used

A. As a microprocessor
B. As a dynamic memory
C. To realise a sequential logic
D. To realise a combinational logic
49. A dynamic RAM consists of
A. 6 Transistor
B. 2 Transistors and 2 Capacitors
C. 1 Transistor and 1 Capacitor
D. 2 Capacitor only
50. When a CPU is interrupted, it
A. Stops execution of instructions
B. Acknowledges interrupt and branches of subroutine
C. Acknowledges interrupt and continues
D. Acknowledges interrupt and waits for the next instruction from the interrupting
device.
51. What is a varistor?
A. a voltage-dependent resistor
B. a voltage-dependent diode
C. a current-dependent resistor
D. a current-dependent diode
52. Which type of transformer is required to create a 180 degree input to a rectifier?
A. center-tapped secondary
B. step-down secondary
C. stepped-up secondary
D. split winding primary
53. What circuit activity may shift a characteristic curve so that diode operating points are
different?
A. higher power (heat)
B. higher resistance
C. lower voltage
D. lower current
54. What is wrong with this diode?

A. Short
SMVEC ANALOG & DIGITAL ELECTRONICS

B. Nothing
C. not enough data

55. The dc current through each diode in a bridge rectifier equals:

A. the load current
B. half the dc load current
C. twice the dc load current
D. one-fourth the dc load current
56. When matching polarity connections have been made and the potential difference (PD) is
above 0.7 V, the diode is considered to be:
A. not working
B. forward biased
C. reverse biased
D. an open switch
57. In a power supply diagram, which block indicates a smooth dc output?
A. Transformer
B. Filter
C. Rectifier
D. Regulator

58. If a 169.7 V half-wave peak has an average voltage of 54 V, what is the average of two full-
wave peaks?
A. 119.9 V
B. 108.0 V
C. 115.7 V
D. 339.4 V
59. What is the current through the LED?

A. 0 mA
B. 23 mA
C. 18 mA
D. 13 mA
60. The characteristic curve for the complex model of a silicon diode shows that
SMVEC ANALOG & DIGITAL ELECTRONICS

A. the barrier potential is 0 V

B. the barrier potential stays fixed at 0.7 V
C. the barrier potential increases slightly with an increase in current
D. the barrier potential decreases slightly with an increase in current
61. Since diodes are destroyed by excessive current, circuits must have:
A. higher voltage sources
B. current limiting resistors
C. more dopants
D. higher current sources
62. A diode for which you can change the reverse bias, and thus vary the capacitance is called a
A. varactor diode
B. tunnel diode
C. zener diode
D. switching diode
63. A filtered full-wave rectifier voltage has a smaller ripple than does a half-wave rectifier
voltage for the same load resistance and capacitor values because:
A. there is a shorter time between peaks
B. there is a longer time between peaks
C. the larger the ripple, the better the filtering action
D. none of the above
64. Testing a good diode with an ohmmeter should indicate
A. high resistance when forward or reverse biased
B. low resistance when forward or reverse biased
C. high resistance when reverse biased and low resistance when forward biased
D. high resistance when forward biased and low resistance when reverse biased
65. The peak inverse voltage (PIV) across a nonconducting diode in a bridge rectifier equals
approximately:
A. half the peak secondary voltage
B. twice the peak secondary voltage
C. twice the peak secondary voltage
D. the peak value of the secondary voltage
E. four times the peak value of the secondary voltage
66. What is the current through the diode?
SMVEC ANALOG & DIGITAL ELECTRONICS

A. 1 mA
B. 0.975 mA
C. 0.942 mA
D. 0.0 mA
67. Electrons in the outermost orbit or shell of an atom are called
A. free electrons
B. negative ions valence electrons.
C. conduction band electrons
68. Shunting the ac component away from the load is the task of a:
A. Transformer
B. Filter
C. Regulator
D. Rectifier
69. A pn junction allows current flow when
A. the p-type material is more positive than the n-type material
B. the n-type material is more positive than the p-type material
C. both the n-type and p-type materials have the same potential
D. there is no potential on the n-type or p-type materials
70. What is the current through the zener diode?

A. 0 mA
B. 7 mA
C. 8.3 mA
D. 13 mA
71. When a diode is forward biased, the voltage across it
SMVEC ANALOG & DIGITAL ELECTRONICS

A. is directly proportional to the current

B. is inversely proportional to the current
C. is directly proportional to the source voltage
D. remains approximately the same
72. Why is heat produced in a diode?
A. due to current passing through the diode
B. due to voltage across the diode
C. due to the power rating of the diode
D. due to the PN junction of the diode
73. The arrow in the schematic symbol of a diode points to
A. the n-type material, which is called the anode
B. the n-type material, which is called the cathode
C. the p-type material, which is called the anode
D. the p-type material, which is called the cathode
74. The diode schematic arrow points to the:
A. trivalent-doped material
B. positive axial lead
C. anode lead
D. cathode lead
75. When checking a diode, low resistance readings both ways indicate the diode is:
A. open
B. satisfactory
C. faulty
D. not the problem
76. In a diode schematic, the anode is represented by a(n):
A. Triangle
B. vertical line
C. zig-zag line
D. element indicator
77. An IC regulator receives an overload; it will:
A. shut down
B. compensate for heat
C. provide more voltage
D. sample and adjust
78. With full-wave rectification, current through the load resistor must be:
A. in opposite directions
B. to the external load
C. from the reverse biased diode
D. in the same direction
SMVEC ANALOG & DIGITAL ELECTRONICS

79. A characteristic curve is the result of a current versus voltage plot of diode activity, which
begins at the:
A. 3rd quadrant
B. current plot
C. graph origin
D. voltage plot
80. Rectifier output polarity depends upon:
A. cycles of input
B. capacitor polarity
C. half or full wave
D. diode installation
81. With a 12 V supply, a silicon diode, and a 370-ohm resistor in series, what voltage will be
dropped across the diode?
A. 0.3 V
B. 0.7 V
C. 0.9 V
D. 1.4 V
82. If the frequency of the applied ac signal to a half-wave rectifier is 60 Hz, the frequency of the
pulsating dc output will be
A. 30 pps
B. 60 pps
C. 90
D. Pps
E. 120 pps
83. What is the peak output voltage for this half-wave rectifier?

A. 1 V
B. 7.8 V
C. 10.9 V
D. 15.6 V
84. Thermal shutdown occurs in an IC regulator if:
A. power dissipation is too high
B. internal temperature is too high
C. current through the device is too high
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D. load resistance increases

85. The conduction band is closest to the valence band in
A. Semiconductors
B. Conductors
C. Insulators
D. The distance is the same for all of the above.
86. What is the percent of regulation if Vnl = 20 V and Vfl = 19.8 V?
A. 0%
B. 1%
C. 1%
D. 5%
87. With a half-wave rectified voltage across the load resistor, load current flows for what part of
a cycle?
A. 0 degrees
B. 90 degrees
C. 180 degrees
D. 360 degrees
88. Which of the following circuits would require the least amount of filtering?
A. A half-wave rectifier
B. A full-wave rectifier
C. A bridge rectifier
D. A full-wave rectifier and a bridge rectifier
89. What is wrong with this circuit?

A. The zener is open.

B. The zener is shorted.
C. Nothing
D. not enough data
90. The voltage where current may start to flow in a reverse-biased pn junction is called the
A. breakdown voltage
B. barrier potential
C. forward voltage
SMVEC ANALOG & DIGITAL ELECTRONICS

D. biasing voltage
91. Providing a constant output regardless of ac input or load resistance changes is the function
of a:
A. Transformer
B. Filter
C. Filter
D. Regulator
E. Rectifier
92. When a diode is destroyed it has infinite impedance. When damaged by heat it will probably:
A. Short
B. conduct more
C. conduct less
D. open
93. The area at the junction of p-type and n-type materials that has lost its majority carriers is
called the
A. barrier potential
B. depletion region
C. n region
D. p region
94. DC power should be connected to forward bias a diode as follows:
A. – anode, + cathode
B. – cathode, – anode
C. + anode, – cathode
D. + cathode, + anode
95. At any given time in an intrinsic piece of semiconductor material at room temperature
A. electrons drift randomly
B. recombination occurs
C. holes are created
D. All of the above
96. In a power supply diagram, which block indicates a pulsating dc output?
A. Transformer
B. Filter
C. Rectifier
D. Regulator
97. List three diode packages:
A. clip package, DIP, small current package
B. DIP, small current package, large current package
C. small current package, large current package, and SIP
D. small current package, large current package, clip package
98. The mimicking of an open/closed switch by a diode allows alternating current to be:
A. rectified
SMVEC ANALOG & DIGITAL ELECTRONICS

B. regulated
C. controlled
D. attenuated
99. Which of the following is correct for a gated D-type flip-flop?
A. the Q output is either SET or RESET as soon as the D input goes HIGH or
LOW.
B. The output complement follows the input when enabled.
C. Only one of the inputs can be HIGH at a time.
D. The output toggles if one of the inputs is held HIGH.
100. When both inputs of a J-K flip-flop cycle, the output will
A. be invalid
B. not change
C. Change
D. Toggle
101. Latches constructed with NOR and NAND gates tend to remain in the latched condition
due to which configuration feature?
A. asynchronous operation
B. low input voltages
C. gate impedance
D. cross coupling
102. The 555 timer can be used in which of the following configurations?
A. astable, monostable
B. monostable, bistable
C. astable, toggled
D. bistable, tristable
103. A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates?
A. AND or OR gates
B. XOR or XNOR gates
C. NOR or NAND gates
D. AND or NOR gates
104. One example of the use of an S-R flip-flop is as a(n):
A. transition pulse generator
B. astable oscillator
C. racer
D. switch debouncer
105. If both inputs of an S-R NAND latch are LOW, what will happen to the output?
A. The output will toggle.
B. The output will reset.
C. No change will occur in the output.
D. The output would become unpredictable.
106. The equation for the output frequency of a 555 timer operating in the astable mode is:
SMVEC ANALOG & DIGITAL ELECTRONICS

.
What value of C1 will be required if R1 = 1 k , R2 = 1 k , and f = 1 kHz?
A. 0.33 F
B. 0.48 F
C. 480 F
D. 33 nF
107. An astable multivibrator is a circuit that:
A. has two stable states
B. is free-running
C. produces a continuous output signal
D. is free-running and produces a continuous output signal
108. What is another name for a one-shot?
A. Monostable
B. Bistable
C. Astable
D. Tristable
109. The truth table for an S-R flip-flop has how many VALID entries?
A. 3
B. 1
C. 4
D. 2
110. What is the significance of the J and K terminals on the J-K flip-flop?
A. There is no known significance in their designations.
B. The J represents "jump," which is how the Q output reacts whenever the clock goes
HIGH and the J input is also HIGH.
C. The letters represent the initials of Johnson and King, the co-inventors of the J-K flip-
flop.
D. All of the other letters of the alphabet are already in use.
111. Which of the following describes the operation of a positive edge-triggered D-type flip-
flop?
A. If both inputs are HIGH, the output will toggle.
B. The output will follow the input on the leading edge of the clock.
C. When both inputs are LOW, an invalid state exists.
D. The input is toggled into the flip-flop on the leading edge of the clock and is passed to
the output on the trailing edge of the clock.
112. What is one disadvantage of an S-R flip-flop?
A. It has no Enable input.
B. It has a RACE condition.
C. It has no clock input.
D. It has only a single output.
113. Junction Field Effect Transistors (JFET) contain how many diodes?
A. 1
B. 2
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C. 3
D. 4
114. When an input delta of 2 V produces a transconductance of 1.5 mS, what is the drain
current delta?
A. 666 mA
B. 3 mA
C. 0.75 mA
D. 0.5 mA
115. When not in use, MOSFET pins are kept at the same potential through the use of:
A. shipping foil
B. nonconductive foam
C. conductive foam
D. a wrist strap
116. D-MOSFETs are sometimes used in series to construct a cascode high-frequency
amplifier to overcome the loss of:
A. low output impedance
B. capacitive reactance
C. high input impedance
D. inductive reactance
117. "U" shaped, opposite-polarity material built near a JFET-channel center is called the:
A. Gate
B. Block
C. Drain
D. heat sink
118. When testing an n-channel D-MOSFET, resistance G to D = , resistance G to S = ,
resistance D to SS = and 500 , depending on the polarity of the ohmmeter, and resistance
D to S = 500 . What is wrong?
A. short D to S
B. open G to D
C. open D to SS
D. nothing
119. In the constant-current region, how will the IDS change in an n-channel JFET?
A. As VGS decreases ID decreases.
B. As VGS increases ID increases.
C. As VGS decreases ID remains constant.
D. As VGS increases ID remains constant.
120. A MOSFET has how many terminals?
A. 2 or 3
B. 3
C. 4
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D. 3 or 4
121. IDSS can be defined as:
A. the minimum possible drain current
B. the maximum possible current with VGS held at –4 V
C. the maximum possible current with VGS held at 0 V
D. the maximum drain current with the source shorted
122. What is the input impedance of a common-gate configured JFET?
A. very low
B. low
C. high
D. very high
123. JFET terminal "legs" are connections to the drain, the gate, and the:
A. Channel
B. source
C. substrate
D. cathode
124. A very simple bias for a D-MOSFET is called:
A. self biasing
B. gate biasing
C. zero biasing
D. voltage-divider biasing
125. With the E-MOSFET, when gate input voltage is zero, drain current is:
A. at saturation
B. zero
C. IDSS
D. widening the channel
126. With a 30-volt VDD, and an 8-kilohm drain resistor, what is the E-MOSFET Q point
voltage, with ID = 3 mA?
A. 6 V
B. 10 V
C. 24 V
D. 30 V
127. When an input signal reduces the channel size, the process is called:
A. Enhancement
B. substrate connecting
C. gate charge
D. depletion
128. Which JFET configuration would connect a high-resistance signal source to a low-
resistance load?
A. source follower
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B. common-source
C. common-drain
D. common-gate
129. How will electrons flow through a p-channel JFET?
A. from source to drain
B. from source to gate
C. from drain to gate
D. from drain to source
130. When VGS = 0 V, a JFET is:
A. Saturated
B. an analog device
C. an open switch
D. cut off
131. When applied input voltage varies the resistance of a channel, the result is called:
A. Saturization
B. Polarization
C. Cutoff
D. field effect
132. When is a vertical channel E-MOSFET used?
A. for high frequencies
B. for high voltages
C. for high currents
D. for high resistances
133. When the JFET is no longer able to control the current, this point is called the:
A. breakdown region
B. depletion region
C. saturation point
D. pinch-off regions
134. With a JFET, a ratio of output current change against an input voltage change is called:
A. Transconductance
B. Siemens
C. Resistivity
D. Gain
135. Which type of JFET bias requires a negative supply voltage?
A. Feedback
B. Source
C. Gate
D. voltage divider
136. How will a D-MOSFET input impedance change with signal frequency?
A. As frequency increases input impedance increases.
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B. As frequency increases input impedance is constant.

C. As frequency decreases input impedance increases.
D. As frequency decreases input impedance is constant.
137. The type of bias most often used with E-MOSFET circuits is:
A. constant current
B. drain feedback
C. voltage divider
D. zero biasing
138. the transconductiance cure of a JFET is a graph of
A. IS versus VDS
B. IC versus VCE
C. ID versus VGS
D. ID × RDS
139. The common-source JFET amplifier has:
A. a very high input impedance and a relatively low voltage gain
B. a high input impedance and a very high voltage gain
C. a high input impedance and a voltage gain less than 1
D. no voltage gain
140. Using voltage-divider biasing, what is the voltage at the gate VGS?

A. 5.2
B. 4.2
C. 3.2
D. 2.2
141. The overall input capacitance of a dual-gate D-MOSFET is lower because the devices are
usually connected:
A. in parallel
SMVEC ANALOG & DIGITAL ELECTRONICS

B. with separate insulation

C. with separate inputs
D. in series
142. What is the transconductance of an FET when ID = 1 mA and VGS = 1 V?
A. 1 kS
B. 1 mS
C. 1 k
D. 1 m
143. Which component is considered to be an "OFF" device?
A. Transistor
B. JFET
C. D-MOSFET
D. E-MOSFET
144. In an n-channel JFET, what will happen at the pinch-off voltage?
A. the value of VDS at which further increases in VDS will cause no further increase in ID
B. the value of VGS at which further decreases in VGS will cause no further increases in
ID
C. the value of VDG at which further decreases in VDG will cause no further increases in
ID
D. the value of VDS at which further increases in VGS will cause no further increases in ID
145. It is required to construct a counter to count upto 100(decimal). The minimum number of
flipflops required to construct the counter is
A. 8
B. 7
C. 6
D. 5
146. The gate that assumes the 1 state, if and only if the input does not take a 1 state is
called........
A. AND gate
B. NOT gate
C. NOR gate
D. Both b and c
147. For NOR circuit SR flip flop the not allowed condition is....
A. S=0, R=0
B. S=0, R=1
C. S=1, R=1
D. S=1, R=0
148. A bistable multivibrator is a
A. Free running oscillator
B. Triggered oscillator
C. Saw tooth wave generator
D. Crystal oscillator
149. For a large values of |VDS|, a FET behave as
SMVEC ANALOG & DIGITAL ELECTRONICS

A. Voltage controlled resistor

B. Current controlled current source
C. Voltage controlled current source
D. Current controlled resistor
150. When a step input is given to an op-amp integrator, the output will be
A. a ramp
B. a sinusoidal wave
C. a rectangular wave
D. a triangular wave with dc bias
151. In a full-wave rectifier without filter, the ripple factor is
A. 0.482
B. 1.21
C. 1.79
D. 2.05
152. Hysteresis is desirable in Schmitt-trigger, because
A. Energy is to be stored/discharged in parasitic capacitance
B. Effects of temperature would be compensated
C. Devices in the circuit should be allowed time for saturation and desaturation
D. It would prevent noise from causing false triggering
153. For a 10-bit DAC, the Resolution is defined by which of the following
A. 1024
B. 1024
C. 10
D. None
154. SRAM full form is
A. Serial Read Access Memory
B. Static Random Access Memory
C. Static Read-only Access memory
155. What are the minimum number of 2 to 1 multiplexers required to generate a 2 input AND
gate and a 2 input Ex-OR gate?
A. 1 and 2
B. 1 and 3
C. 1 and 1
D. 2 and 2
156. The output of a logic gate is ‘1’ when all its inputs are at logic ‘0’. Then gate is either
A. A NAND or an EX-OR gate
B. A NOR or an EX-NOR gate
C. An OR or a EX-NOR gate
D. An AND or an Ex-OR gate
157. A PLA can be used
A. As a microprocessor
B. As a dynamic memory
C. To realise a sequential logic
D. To realise a combinational logic
158. A dynamic RAM consists of
A. 6 Transistors
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B. 2 Transistors and 2 Capacitors

C. 1 Transistor and 1 Capacitor
D. 2 Capacitor only
159. When a CPU is interrupted, it
A. Stops execution of instructions
B. Acknowledges interrupt and branches of subroutine
C. Acknowledges interrupt and continues
D. Acknowledges interrupt and waits for the next instruction from the interrupting
device

160. How many inputs are required for a 1-of-10 BCD decoder?
A. 4
B. 8
C. 10
D. 1
161. Most demultiplexers facilitate which of the following?
A. decimal to hexadecimal
B. single input, multiple outputs
C. ac to dc
D. odd parity to even parity
162. One application of a digital multiplexer is to facilitate:
A. code conversion
B. parity checking
C. parallel-to-serial data conversion
D. data generation
163. Select one of the following statements that best describes the parity method of error
detection:
A. Parity checking is best suited for detecting single-bit errors in transmitted codes.
B. Parity checking is best suited for detecting double-bit errors that occur during the
transmission of codes from one location to another.
C. Parity checking is not suitable for detecting single-bit errors in transmitted codes.
D. Parity checking is capable of detecting and correcting errors in transmitted codes.
164. A multiplexed display:
A. accepts data inputs from one line and passes this data to multiple output lines
B. uses one display to present two or more pieces of information
C. accepts data inputs from multiple lines and passes this data to multiple output lines
D. accepts data inputs from several lines and multiplexes this input data to four BCD
lines
165. When two or more inputs are active simultaneously, the process is called:
A. first-in, first-out processing
B. priority encoding
C. ripple blanking
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D. priority decoding
166. Which type of decoder will select one of sixteen outputs, depending on the 4-bit binary
input value?
A. Hexadecimal
B. dual octal outputs
C. binary-to-hexadecimal
D. hexadecimal-to-binary
167. magnitude comparator determines:
A. A B and if A B or A >> B
B. A B and if A > B or A < b
C. A = B and if A > B or A < b
D. A B and if A < b or a > B
168. A circuit that responds to a specific set of signals to produce a related digital signal
output is called a(n):
A. BCD matrix
B. display driver
C. encoder
D. decoder
169. Which digital system translates coded characters into a more intelligible form?
A. Encoder
B. Display
C. Counter
D. Decoder
170. A basic multiplexer principle can be demonstrated through the use of a:
A. single-pole relay
B. DPDT switch
C. rotary switch
D. linear stepper
171. In a BCD-to-seven-segment converter, why must a code converter be utilized?
A. No conversion is necessary.
B. to convert the 4-bit BCD into gray code
C. to convert the 4-bit BCD into 10-bit code
D. to convert the 4-bit BCD into 7-bit code
172. The output will be a LOW for any case when one or more inputs are zero in a(n):
A. OR gate
B. NOT gate
C. AND gate
D. NAND gate
173. If a signal passing through a gate is inhibited by sending a low into one of the inputs, and
the output is HIGH, the gate is a(n):
SMVEC ANALOG & DIGITAL ELECTRONICS

A. AND
B. NAND
C. NOR
D. OR
174. A single transistor can be used to build which of the following digital logic gates?
A. AND gates
B. OR gates
C. NOT gates
D. NAND gates
175. The logic gate that will have HIGH or "1" at its output when any one of its inputs is
HIGH is a(n):
A. OR gate
B. AND gate
C. NOR gate
D. NOT gate
176. How many NAND circuits are contained in a 7400 NAND IC?
A. 1
B. 2
C. 4
D. 8
177. Exclusive-OR (XOR) logic gates can be constructed from what other logic gates?
A. OR gates only
B. AND gates and NOT gates
C. AND gates, OR gates, and NOT gates
D. OR gates and NOT gates
178. How many truth table entries are necessary for a four-input circuit?
A. 4
B. 8
C. 12
D. 16
179. A NAND gate has:
A. LOW inputs and a LOW output
B. HIGH inputs and a HIGH output
C. LOW inputs and a HIGH output
D. None of the these
180. The basic logic gate whose output is the complement of the input is the:
A. OR gate
B. AND gate
C. INVERTER gate
D. Comparator
SMVEC ANALOG & DIGITAL ELECTRONICS

181. What input values will cause an AND logic gate to produce a HIGH output?
A. At least one input is HIGH.
B. At least one input is LOW.
C. All inputs are HIGH.
D. All inputs are LOW.
182. Which statement below best describes a Karnaugh map?
A. It is simply a rearranged truth table.
B. The Karnaugh map eliminates the need for using NAND and NOR gates.
C. Variable complements can be eliminated by using Karnaugh maps.
D. A Karnaugh map can be used to replace Boolean rules.
183. Which of the examples below expresses the commutative law of multiplication?
A. A + B = B + A
B. A • B = B + A
C. A • (B • C) = (A • B) • C
D. A • B = B • A
184. The Boolean expression is logically equivalent to what single gate?
A. NAND
B. NOR
C. AND
D. OR
185. The observation that a bubbled input OR gate is interchangeable with a bubbled output
AND gate is referred to as:
A. a Karnaugh map
B. DeMorgan's second theorem
C. the commutative law of addition
D. the associative law of multiplication
186. The systematic reduction of logic circuits is accomplished by:
A. symbolic reduction
B. TTL logic
C. using Boolean algebra
D. using a truth table
187. Logically, the output of a NOR gate would have the same Boolean expression as a(n):
A. NAND gate immediately followed by an INVERTER
B. OR gate immediately followed by an INVERTER
C. AND gate immediately followed by an INVERTER
D. NOR gate immediately followed by an INVERTER
188. Which of the examples below expresses the distributive law of Boolean algebra?
A. A • (B • C) = (A • B) + C
B. A + (B + C) = (A • B) + (A • C)
C. A • (B + C) = (A • B) + (A • C)
SMVEC ANALOG & DIGITAL ELECTRONICS

D. (A + B) + C = A + (B + C)
189. Which output expression might indicate a product-of-sums circuit construction?
A.
B.
C.

D.
190. One of DeMorgan's theorems states that . Simply stated, this means that
logically there is no difference between:
A. a NAND gate and an AND gate with a bubbled output
B. a NOR gate and an AND gate with a bubbled output
C. a NOR gate and a NAND gate with a bubbled output
D. a NAND gate and an OR gate with a bubbled output
191. The commutative law of addition and multiplication indicates that:
A. the way we OR or AND two variables is unimportant because the result is the
same
B. we can group variables in an AND or in an OR any way we want
C. an expression can be expanded by multiplying term by term just the same as in
ordinary algebra
D. the factoring of Boolean expressions requires the multiplication of product terms that
contain like variables
192. A ripple counter's speed is limited by the propagation delay of:
A. each flip-flop
B. all flip-flops and gates
C. the flip-flops only with gates
D. only circuit gates
193. To operate correctly, starting a ring counter requires:
A. clearing all the flip-flops
B. presetting one flip-flop and clearing all the others
C. clearing one flip-flop and presetting all the others
D. presetting all the flip-flops
194. What type of register would shift a complete binary number in one bit at a time and shift
all the stored bits out one bit at a time?
A. PIPO
B. SISO
C. SIPO
D. PISO
195. Synchronous counters eliminate the delay problems encountered with asynchronous
(ripple) counters because the:
A. input clock pulses are applied only to the first and last stages
SMVEC ANALOG & DIGITAL ELECTRONICS

B. input clock pulses are applied only to the last stage

C. input clock pulses are not used to activate any of the counter stages.
D. input clock pulses are applied simultaneously to each stage
196. One of the major drawbacks to the use of asynchronous counters is that:
A. low-frequency applications are limited because of internal propagation delays
B. high-frequency applications are limited because of internal propagation delays
C. Asynchronous counters do not have major drawbacks and are suitable for use in high-
and low-frequency counting applications.
D. Asynchronous counters do not have propagation delays, which limits their use in
high-frequency applications.
197. Which type of device may be used to interface a parallel data format with external
equipment's serial format?
A. key matrix
B. UART
C. memory chip
D. serial-in, parallel-out
198. When the output of a tri-state shift register is disabled, the output level is placed in a:
A. float state
B. LOW state
C. high impedance state
D. float state and a high impedance state
199. A comparison between ring and johnson counters indicates that:
A. a ring counter has fewer flip-flops but requires more decoding circuitry
B. a ring counter has an inverted feedback path
C. a johnson counter has more flip-flops but less decoding circuitry
D. a johnson counter has an inverted feedback path
200. A sequence of equally spaced timing pulses may be easily generated by which type of
counter circuit?
A. shift register sequencer
B. clock
C. Johnson
D. Binary
201. What is meant by parallel-loading the register?
A. Shifting the data in all flip-flops simultaneously
B. Loading data in two of the flip-flops
C. Loading data in all four flip-flops at the same time
D. Momentarily disabling the synchronous SET and RESET inputs
202. What is a shift register that will accept a parallel input and can shift data left or right
called?
A. tri-state
B. end around
SMVEC ANALOG & DIGITAL ELECTRONICS

C. bidirectional universal
D. conversion
203. What happens to the parallel output word in an asynchronous binary down counter
whenever a clock pulse occurs?
A. The output word decreases by 1.
B. The output word decreases by 2.
C. The output word increases by 1.
D. The output word increases by 2.
204. Mod-6 and mod-12 counters are most commonly used in:
A. frequency counters
B. multiplexed displays
C. digital clocks
D. power consumption meters
205. Which type of PLD should be used to program basic logic functions?
A. PLA
B. PAL
C. PAL
D. SLD
206. The content of a simple programmable logic device (PLD) consists of:
A. fuse-link arrays
B. thousands of basic logic gates
C. advanced sequential logic functions
D. thousands of basic logic gates and advanced sequential logic functions
207. Once a PAL has been programmed:
A. it cannot be reprogrammed.
B. its outputs are only active HIGHs
C. its outputs are only active LOWs
D. its logic capacity is lost
208. The complex programmable logic device (CPLD) contains several PLD blocks and:
A. field-programmable switches
B. AND/OR arrays
C. a global interconnection matrix
D. a language compiler
209. PLAs, CPLDs, and FPGAs are all which type of device?
A. SLD
B. PLD
C. EPROM
D. SRAM
210. The difference between a PLA and a PAL is:
A. the PLA has a programmable OR plane and a programmable AND plane, while
the PAL only has a programmable AND plane
SMVEC ANALOG & DIGITAL ELECTRONICS

B. the PAL has a programmable OR plane and a programmable AND plane, while the
PLA only has a programmable AND plane
C. the PAL has more possible product terms than the PLA
D. PALs and PLAs are the same thing.
211. Intrinsic semiconductor material is characterized by a valence shell of how many
electrons?
A. 1
B. 2
C. 4
D. 6
212. Ionization within a P-N junction causes a layer on each side of the barrier called the:
A. Junction
B. depletion region
C. barrier voltage
D. forward voltage
213. What is the most significant development in electronics since World War II?
A. the development of color TV
B. the development of the diode
C. the development of the transistor
D. the development of the TRIAC
214. What causes the depletion region?
A. Doping
B. Diffusion
C. barrier potential
D. ions
215. What is an energy gap?
A. the space between two orbital shells
B. the energy equal to the energy acquired by an electron passing a 1 V electric field
C. the energy band in which electrons can move freely
D. an energy level at which an electron can exist
216. Silicon atoms combine into an orderly pattern called a:
A. covalent bond
B. crystal
C. semiconductor
D. valence orbit
217. In "n" type material, majority carriers would be:
A. Holes
B. Dopants
C. Slower
D. Electrons
218. Elements with 1, 2, or 3 valence electrons usually make excellent:
SMVEC ANALOG & DIGITAL ELECTRONICS

A. Conductors
B. Semiconductors
C. Insulators
D. Neutral
219. A commonly used pentavalent material is:
A. Arsenic
B. Boron
C. Gallium
D. Neon
220. Which material may also be considered a semiconductor element?
A. Carbon
B. Ceramic
C. Mica
D. Argon
221. In "p" type material, minority carriers would be:
A. Holes
B. Dopants
C. Slower
D. Electrons
222. What can a semiconductor sense?
A. Magnetism
B. Temperature
C. Pressure
D. all of the above
223. When an electron jumps from the valence shell to the conduction band, it leaves a gap.
What is this gap called?
A. energy gap
B. hole
C. electron-hole pair
D. recombination
224. Forward bias of a silicon P-N junction will produce a barrier voltage of approximately
how many volts?
A. 0.2
B. 0.8
C. 0.3
D. 0.7
225. Which semiconductor material is made from coal ash?
A. Germanium
B. Silicon
C. Tin
SMVEC ANALOG & DIGITAL ELECTRONICS

D. Carbon
226. When and who discovered that more than one transistor could be constructed on a single
piece of semiconductor material:
A. 1949, William Schockley
B. 1955, Walter Bratten
C. 1959, Robert Noyce
D. 1960, John Bardeen
227. When is a P-N junction formed?
A. in a depletion region
B. in a large reverse biased region
C. the point at which two opposite doped materials come together
D. whenever there is a forward voltage drop
228. A P-N junction mimics a closed switch when it:
A. has a low junction resistance
B. s reverse biased
C. cannot overcome its barrier voltage
D. has a wide depletion region
229. Solid state devices were first manufactured during:
A. World War 2
B. 1904
C. 1907
D. 1960
230. Electron pair bonding occurs when atoms:
A. lack electrons
B. share holes
C. lack holes
D. share electrons
231. How many valence electrons are in every semiconductor material?
A. 1
B. 2
C. 3
D. 4
232. What is a type of doping material?
A. extrinsic semiconductor material.
B. pentavalent material
C. n-type semiconductor
D. majority carriers
233. Minority carriers are many times activated by:
A. heat
B. pressure
SMVEC ANALOG & DIGITAL ELECTRONICS

C. dopants
D. forward bias
234. What is the voltage across R1 if the P-N junction is made of silicon?

A.
B. 12 V
C. 11.7 V
D. 11.3 V
E. 0 V
235. If conductance increases as temperature increases, this is known as a:
A. positive coefficient
B. negative current flow
C. negative coefficient
D. positive resistance
236. Which of the following cannot actually move?
A. majority carriers
B. ions
C. holes
D. holes
237. What electrical characteristic of intrinsic semiconductor material is controlled by the
addition of impurities?
A. Conductivity
B. Resistance3
C. Power
D. all of the above

238. An ideal OP-AMP is an ideal

A. Current controlled Current source
B. Current controlled Voltage source
C. Voltage controlled Voltage source
D. Voltage controlled Current source
Ans: B
239. A 741-Type OP-AMP has a gain-bandwith product of 1MHz. A non-inverting amplifier
using this opamp & having a voltage gain of 20db will exhibit -3db bandwidth of
A. 50KHz
B. 100KHz
C. 1000/17KHz
D. 1000/7.07KHz
Ans: A
SMVEC ANALOG & DIGITAL ELECTRONICS

240. An amplifier using an opamp with slew rate SR=1v/sec has a gain of 40db.If this
amplifier has to faithfully amplify sinusoidal signals from dc to 20KHz without introducing
any slew-rate induced distortion, then the input signal level exceed
A. 795mV
B. 395mV
C. 795mV
D. 39.5mV
Ans: C
241. The ideal OP-AMP has the following characteristics
A. Ri=∞,A=∞,R0=0
B. Ri=0,A=∞,R0=0
C. Ri=∞,A=∞,R0=∞
D. Ri=0,A=∞,R0=∞
Ans: A
242. The approximate input impedance of the opamp circuit which has Ri=10k, Rf=100k,
RL=10k
A. ∞
B. 120k
C. 110k
D. 10k
Ans: C
243. An opamp has a slew rate of 5V/ S. the largest sine wave o/p voltage possible at a
frequency of 1MHz is
A. 10 V
B. 5 V
C. 5V
D. 5/2 V
Ans: A
244. Assume that the op-amp of the fig. is ideal. If Vi is a triangular wave, then V0 will be
A. square wave
B. Triangular wave
C. Parabolic wave
D. Sine wave
Ans: D
245. A differential amplifier is invariably used in the i/p stage of all op-amps. This is done
basically to provide the op-amps with a very high
A. CMMR
B. bandwidth
C. slew rate
D. open-loop gain
Ans: C
246. A differential amplifier has a differential gain of 20,000. CMMR=80dB. The common
mode gain is given by
A. 2
B. 1
C. 1/2
SMVEC ANALOG & DIGITAL ELECTRONICS

D. D.0
E. Ans: C
247. In the differential voltage gain & the common mode voltage gain of a differential
amplifier are 48db & 2db respectively, then its common mode rejection ratio is
A. 23dB
B. 25dB
C. 46dB
D. 50dB
Ans: B
248. Which of the following amplifier is used in a digital to analog converter?
A. non inverter
B. voltage follower
C. summer
D. difference amplifier
Ans: C
249. Differential amplifiers are used in
A. instrumentation amplifiers
B. voltage followers
C. voltage regulators
D. buffers
Ans: A
250. For an ideal op-amp, which of the following is true?
A. The differential voltage across the input terminals is zero
B. The current into the input terminals is zero
C. The current from output terminal is zero
D. The output resistance is zero
Ans: C
251. The two input terminals of an opamp are labeled as
A. High and low
B. Positive and negative
C. Inverting and non inverting
D. Differential ans non differential
Ans: C
252. When a step-input is given to an op-amp integrator, the output will be
A. a ramp.
B. a sinusoidal wave.
C. a rectangular wave.
D. a triangular wave with dc bias.
E. Ans: A
253. For an op-amp having differential gain Av and common-mode gain Ac the CMRR is
A. Av + Ac
B. Av / Ac
C. 1 + [Av / Ac]
D. Ac / Av
E. Ans: B
254. Hysteresis is desirable in Schmitt-trigger, because
SMVEC ANALOG & DIGITAL ELECTRONICS

A. Energy is to be stored/discharged in parasitic capacitances.

B. Effects of temperature would be compensated.
C. Devices in the circuit should be allowed time for saturation and desaturation.
D. It would prevent noise from causing false triggering.
Ans: C
Circuit for questions 8 & 9
255. The output voltage Vo of the above circuit is

A. -6V
B. -5V
C. -1.2V
D. -0.2V
Ans: B
256. In the above circuit the current ix is
A. 0.6A
B. 0.5A
C. 0.2A
D. 1/12A
Ans: B
257. Op-amp circuits may be cascaded without changing their input output relationships
A. True
B. False
Ans: A
258. A non inverting closed loop op amp circuit generally has a gain factor
A. Less than one
B. Greater than one
C. Of zero
D. Equal to one
Ans: B. For non inverting amplifier the gain is A = [1 + (Rf/Rin)]. So it will be
always more than one
259. If ground is applied to the (+) terminal of an inverting op-amp, the (–) terminal will
A. Not need an input resistor
B. Be virtual ground
C. Have high reverse current
D. D. Not invert the signal
Ans: B
260. The closed-loop voltage gain of an inverting amplifier equal to
A. The ratio of the input resistance to feedback resistance
SMVEC ANALOG & DIGITAL ELECTRONICS

B. The open-loop voltage gain

C. The feedback resistance divided by the input resistance
D. The input resistance
Ans: C
261. When a number of stages are connected in parallel, the overall gain is the product of the
individual stage gains
A. True
B. False
Ans: B
262. An ideal OP-AMP is an ideal
A. Current controlled Current source
B. Current controlled voltage source
C. Voltage controlled voltage source
D. voltage controlled current source
Ans: B. The ideal Opamp output voltage is maintained constant. It is controlled by
input current
263. The ideal OP-AMP has the following characteristics.
A. Ri=∞ ,A=∞ ,R0=0
B. Ri=0 ,A=∞ ,R0=0
C. Ri=∞ ,A=∞ ,R0=∞
D. Ri=0 ,A=∞ ,R0=∞
Ans: A.
264. Calculate the cutoff frequency of a first-order low-pass filter for R1 = 2.5kΩ and C1 =
0.05μF
A. 1.273kHz
B. 12.73kHz
C. 127.3 kHz
D. 127.3 Hz
Ans: A.
265. How many op-amps are required to implement this equation
A. 2
B. 3
C. 4
D. 1
Ans:B. The output voltage of inverting amplifier is Vout = (-Rf/Rin)Vin. By keeping
3 inverting amplifier, we can get this equation
266. How many op-amps are required to implement this equation Vo = V1
A. 4
B. 3
C. 2
D. 1
E. Ans: D. The voltage follower which has one opamp has the output of Vo = Vin
267. An OPAMP has a slew rate of 5 V/μ S .The largest sine wave O/P voltage possible at a
frequency of 1 MHZ is
A. 10 volts
B. 5 volts
SMVEC ANALOG & DIGITAL ELECTRONICS

C. 5/ volts
D. 5/2 volts
E. Ans:D
268. A computerized self-diagnostic for a ROM test uses:
A. the check-sum method
B. a ROM listing
C. ROM comparisons
D. a checkerboard test
269. How many storage locations are available when a memory device has twelve address
lines?
A. 144
B. 512
C. 2048
D. 4096
270. Which of the following memories uses a MOSFET and a capacitor as its memory cell?
A. SRAM
B. DRAM
C. ROM
D. DROM
271. Which of the following best describes nonvolatile memory?
A. memory that retains stored information when electrical power is removed
B. memory that loses stored information when electrical power is removed
C. magnetic memory
D. nonmagnetic memory
272. The access time (tacc) of a memory IC is governed by the IC's:
A. internal address buffer
B. internal address decoder
C. volatility
D. internal address decoder and volatility
273. Select the best description of read-only memory (ROM).
A. nonvolatile, used to store information that changes during system operation
B. nonvolatile, used to store information that does not change during system
operation
C. volatile, used to store information that changes during system operation
D. volatile, used to store information that does not change during system operation
274. Advantage(s) of an EEPROM over an EPROM is (are):
A. the EPROM can be erased with ultraviolet light in much less time than an EEPROM
B. the EEPROM can be erased and reprogrammed without removal from the circuit
C. the EEPROM has the ability to erase and reprogram individual words
D. the EEPROM can erase and reprogram individual words without removal from
the circuit
SMVEC ANALOG & DIGITAL ELECTRONICS

275. Which of the following RAM timing parameters determine(s) its operating speed?
A. tacc
B. taa and tacs
C. t1 and t3
D. trc and twc
276. Memory that loses its contents when power is lost is:
A. Nonvolatile
B. Volatile
C. Random
D. Static
277. Select the best description of the fusible-link PROM.
A. user programmable, one-time programmable
B. manufacturer programmable, one-time programmable
C. user programmable, reprogrammable
D. manufacturer programmable, reprogrammable
278. A nonvolatile type of memory that can be programmed and erased in sectors, rather than
one byte at a time is:
A. flash memory
B. EPROM
C. EEPROM
D. MPROM
279. Which of the following best describes static memory devices?
A. memory devices that are magnetic in nature and do not require constant refreshing
B. semiconductor memory devices in which stored data is retained as long as power
is applied
C. memory devices that are magnetic in nature and require constant refreshing
D. semiconductor memory devices in which stored data will not be retained with
E. the power applied unless constantly refreshed
280. What is the principal advantage of using address multiplexing with DRAM memory?
A. reduced memory access time
B. reduced requirement for constant refreshing of the memory contents
C. reduced pin count and decrease in package size
D. no requirement for a chip-select input line, thereby reducing the pin count
281. Which type of PLD should be used to program basic logic functions?
A. PLA
B. PAL
C. CPLD
D. SLD
282. The content of a simple programmable logic device (PLD) consists of:
A. fuse-link arrays
SMVEC ANALOG & DIGITAL ELECTRONICS

B. thousands of basic logic gates

C. advanced sequential logic functions
D. thousands of basic logic gates and advanced sequential logic functions
283. Once a PAL has been programmed:
A. it cannot be reprogrammed.
B. its outputs are only active HIGHs
C. its outputs are only active LOWs
D. its logic capacity is lost
284. The complex programmable logic device (CPLD) contains several PLD blocks and:
A. field-programmable switches
B. AND/OR arrays
C. a global interconnection matrix
D. a language compiler.
285. PLAs, CPLDs, and FPGAs are all which type of device?
A. SLD
B. PLD
C. EPROM
D. SRAM
286. The difference between a PLA and a PAL is:
A. the PLA has a programmable OR plane and a programmable AND plane, while
the PAL only has a programmable AND plane
B. the PAL has a programmable OR plane and a programmable AND plane, while the
PLA only has a programmable AND plane
C. the PAL has more possible product terms than the PLA
D. PALs and PLAs are the same thing.
287. Which circuit is known as a current-to-voltage converter?
SMVEC ANALOG & DIGITAL ELECTRONICS

A. A
B. B
C. C
D. D
288. When using an OTA in a Schmitt-trigger configuration, the trigger points are controlled
by
A. the Iout
B. the IBIAS
C. the Vout
D. both Iout and IBIAS
289. Refer the given circuits. Which circuit is known as an OTA?
A. A
B. B
C. C
D. D
SMVEC ANALOG & DIGITAL ELECTRONICS

290. This circuit is a setup for

A. an antilog amplifier
B. a constant-current source
C. an instrumentation amplifier
D. an isolation amplifier
291. Which circuit is known as a voltage-to-current converter?
A. A
B. B
C. C
D. D
SMVEC ANALOG & DIGITAL ELECTRONICS

292. The primary function of the oscillator in an isolation amplifier is to

A. convert dc to high-frequency ac
B. convert dc to low-frequency ac
C. rectify high-frequency ac to dc
D. produce dual-polarity dc voltages for the input to the demodulator
293. Refer to Figure 20-2. This circuit is a setup for

A. an antilog amplifier
B. a constant-current source
C. an instrumentation amplifier
D. an isolation amplifier
294. An instrumentation amplifier has a high
A. output impedance
B. power gain
C. CMRR
D. supply voltage
SMVEC ANALOG & DIGITAL ELECTRONICS

295. This circuit is a setup for

A. an antilog amplifier
B. a constant-current source
C. an instrumentation amplifier
D. an isolation amplifier
296. Circuits that shift the dc level of a signal are called
A. Limiters
B. Clampers
C. peak detectors
D. dc converters
297. The voltage gain of an OTA can be calculated using the formula
A. AV=Rf/Ri
B. AV=gm Rl
C. Av=(Rf/Ri)+1
D. Av=(Rf/Ri)+1
298. In the classic three-op-amp instrumentation amplifier, the differential voltage gain is
usually produced by the
A. first stage
B. second stage
C. mismatched resistors
D. output op-amp
299. A digital logic device used as a buffer should have what input/output characteristics?
A. high input impedance and high output impedance
B. low input impedance and high output impedance
C. low input impedance and low output impedance
D. high input impedance and low output impedance
300. What is the standard TTL noise margin?
A. 5.0 V
B. 0.2 V
C. 0.8 V
SMVEC ANALOG & DIGITAL ELECTRONICS

D. 0.4 V
301. The range of a valid LOW input is:
A. 0.0 V to 0.4 V
B. 0.4 V to 0.8 V
C. 0.4 V to 1.8 V
D. 0.4 V to 2.4 V
302. When an IC has two rows of parallel connecting pins, the device is referred to as:
A. a QFP
B. a DIP
C. a phase splitter
D. CMOS
303. Which digital IC package type makes the most efficient use of printed circuit board
space?
A. SMT
B. TO can
C. flat pack
D. DIP
304. The problem of interfacing IC logic families that have different supply voltages (VCCs)
can be solved by using a:
A. level-shifter
B. tri-state shifter
C. translator
D. level-shifter or translator
305. Ten TTL loads per TTL driver is known as:
A. noise immunity
B. power dissipation
C. fanout
D. propagation delay
306. Which of the following summarizes the important features of emitter-coupled logic
(ECL)?
A. negative voltage operation, high speed, and high power consumption
B. good noise immunity, negative logic, high frequency capability, low power
dissipation, and short propagation time
C. slow propagation time, high frequency response, low power consumption, and high
output voltage swings
D. poor noise immunity, positive supply voltage operation, good low-frequency
operation, and low power
307. What quantities must be compatible when interfacing two different logic families?
A. only the currents
B. both the voltages and the currents
SMVEC ANALOG & DIGITAL ELECTRONICS

C. only the voltages

D. both the power dissipation and the impedance
308. CMOS logic is probably the best all-around circuitry because of its:
A. packing density
B. low power consumption
C. very high noise immunity
D. low power consumption and very high noise immunity
309. Low power consumption achieved by CMOS circuits is due to which construction
characteristic?
A. complementary pairs
B. connecting pads
C. DIP packages
D. small-scale integration
310. A TTL totem pole circuit is designed so that the output transistors are:
A. always on together
B. providing phase splitting
C. providing voltage regulation
D. never on together
311. The time needed for an output to change as the result of an input change is known as:
A. noise immunity
B. fanout
C. propagation delay
D. ise time

312. An ideal operational amplifier has

A. infinite output impedance
B. zero input impedance
C. infinite bandwidth
D. All the above

313. Another name for a unity gain amplifier is:

A. difference amplifier
B. comparator
C. single ended
D. voltage follower
314. The open-loop voltage gain (Aol) of an op-amp is the
A. external voltage gain the device is capable of
B. internal voltage gain the device is capable of
C. most controlled parameter
315. What is the output waveform?
SMVEC ANALOG & DIGITAL ELECTRONICS

A. sine wave
B. square wave
C. sawtooth wave
D. triangle wave
316. A series dissipative regulator is an example of a:
A. linear regulator
B. switching regulator
C. shunt regulator
D. dc-to-dc converter
317. What is this circuit?

A. a low-pass filter a low-pass filter

B. a high-pass filter
C. a bandpass filter
D. a band-stop filter
318. A noninverting closed-loop op-amp circuit generally has a gain factor:
A. less than one
SMVEC ANALOG & DIGITAL ELECTRONICS

B. greater than one

C. of zero
D. equal to one
319. In order for an output to swing above and below a zero reference, the op-amp circuit
requires:
A. a resistive feedback network
B. zero offset
C. a wide bandwidth
D. a negative and positive supply
320. Op-amps used as high- and low-pass filter circuits employ which configuration?
A. Noninverting
B. Comparator
C. open-loop
D. inverting
321. Decreasing the gain in the given circuit could be achieved by

A. reducing the amplitude of the input voltage

B. increasing the value of the feedback resistor
C. increasing the value of the input resistor
D. removing the feedback resistor
322. If ground is applied to the (+) terminal of an inverting op-amp, the (–) terminal will:
A. If ground is applied to the (+) terminal of an inverting op-amp, the (–) terminal will:
B. not need an input resistor
C. be virtual ground
D. have high reverse current
E. not invert the signal
323. An astable multivibrator is also known as a:
A. one-shot multivibrator
B. free-running multivibrator
C. bistable multivibrator
D. monostable multivibrator

324. With negative feedback, the returning signal:

A. aids the input signal
SMVEC ANALOG & DIGITAL ELECTRONICS

B. is proportional to output current

C. opposes the input signal
D. is proportional to differential voltage gain
325. What starts a free-running multivibrator?
A. a trigger
B. an input signal
C. an external circuit
D. othing
326. A portion of the output that provides circuit stabilization is considered to be:
A. negative feedback
B. open-loop
C. distortion
D. positive feedback
327. How many leads does the TO-5 metal can package of an operational amplifier have?
A. 8, 10, or 12
B. 6, 8, or 10
C. 8 or 14
D. 8 or 16
328. If a noninverting amplifier has an RIN of 1000 ohms and an RFB of 2.5 kilohms, what is
the RIN voltage when 1.42 mV is applied to the correct input?
A. 3.5 mV
B. Ground
C. 1.42 mV
D. 0.56 mV
329. Input impedance [Zin(I)] of an inverting amplifier is approximately equal to:
A. Ri
B. Rf + Ri
C. ∞
D. Rf – Ri
330. The closed-loop voltage gain of an inverting amplifier equals:
A. the ratio of the input resistance to the feedback resistance
B. the open-loop voltage gain
C. the feedback resistance divided by the input resistance
D. the input resistance
331. What is the cutoff frequency of this low-pass filter?

A. 4.8 kHz
B. 3.8 kHz
SMVEC ANALOG & DIGITAL ELECTRONICS

C. 2.8 kHz
D. 1.8 kHz
332. All of the following are basic op-amp input modes of operation EXCEPT
A. inverting mode
B. common-mode
C. double-ended
D. single-ended
333. What is the output voltage?

A. 15V
B. 5V
C. -5V
D. 15V
334. A circuit whose output is proportional to the difference between the input signals is
considered to be which type of amplifier?
A. common-mode
B. darlington
C. differential
D. operational
335. With negative feedback, the returning signal+
A. is proportional to the output current
B. is proportional to the differential voltage gain
C. opposes the input signal
D. aids the input signal
336. What is the output waveform?

A. sine wave
B. square wave
C. +15 V
SMVEC ANALOG & DIGITAL ELECTRONICS

D. –15 V
337. The voltage follower has a:
A. closed-loop voltage gain of unity
B. small open-loop voltage gain
C. closed-loop bandwidth of zero
D. large closed-loop output impedance
338. What is the output waveform of the circuit?
A. sine wave
B. square wave
C. sawtooth wave
D. triangle wave

339. The ratio between differential gain and common-mode gain is called:
A. Amplitude
B. differential-mode rejection
C. common-mode rejection
D. phase
340. What is the frequency of this 555 astable multivibrator?

A. 278 Hz
B. 178 Hz
C. 78 Hz
D. 8 Hz
341. If the gain of a closed-loop inverting amplifier is 3.9, with an input resistor value of 1.6
kilohms, what value of feedback resistor is necessary?
SMVEC ANALOG & DIGITAL ELECTRONICS

A. 6240 ohms
B. 2.4 kilohms
C. 410 ohms
D. 0.62 kilohms
342. In an open-loop op-amp circuit, whenever the inverting input (–) is negative relative to
the noninverting input (+), the output will:
A. swing negative
B. close the loop
C. be balanced
D. swing positive
343. With a differential gain of 50,000 and a common-mode gain of 2, what is the common-
mode rejection ratio?
A. –87.9 dB
B. –43.9 dB
C. 43.9 dB
D. 87.9 dB
344. If the input to a comparator is a sine wave, the output is a:
A. ramp voltage
B. sine wave
C. rectangular wave
D. sawtooth wave
345. What three subcircuits does a phase locked loop (PLL) consist of?
A. phase comparator, comparator, and VCO
B. phase comparator, bandpass filter, and VCO
C. phase comparator, bandpass filter, and demodulator
D. phase comparator, low-pass filter, and VCO
346. The major difference between ground and virtual ground is that virtual ground is only a:
A. voltage reference
B. current reference
C. power reference
D. difference reference
347. If an op-amp has one input grounded and the other input has a signal feed to it, then it is
operating as what?
A. Common-mode
B. Single-ended
C. Double-ended
D. Noninverting mode
348. If the feedback/input resistor ratio of a feedback amplifier is 4.6 with 1.7 V applied to the
noninverting input, what is the output voltage value?
A. 7.82 V
B. Saturation
C. Cutoff
D. 9.52 V
349. The Schmitt trigger is a two-state device that is used for:
A. pulse shaping
B. peak detection
SMVEC ANALOG & DIGITAL ELECTRONICS

C. input noise rejection

D. filtering
350. When a capacitor is used in place of a resistor in an op-amp network, its placement
determines:
A. open- or closed-loop gain
B. integration or differentiation
C. saturation or cutoff
D. addition or subtraction
351. What value of input resistance is needed in the given circuit to produce the given output
voltage?

A. 50 Ω
B. 4 Ω
C. 4.08 Ω
D. 5 Ω
352. The common-mode voltage gain is
A. smaller than differential voltage gain
B. equal to voltage gain
C. greater than differential voltage gain
D. None of the above
353. How many logic states does an S-R flip-flop have?
A. 2
B. 3
C. 4
D. 5
354. An output that is proportional to the addition of two or more inputs is from which type of
amplifier?
A. Differentiator
B. Difference
C. Summing
D. analog subtractor
355. In a PLL, to obtain lock, the signal frequency must:
A. come within the lock range
B. be less than the capture frequency
C. come within the capture range
D. be greater than the capture frequency
356. An ideal amplifier should have:
A. high input current
SMVEC ANALOG & DIGITAL ELECTRONICS

B. zero offset
C. high output impedance
D. oderate gain
357. A differential amplifier has a common-mode gain of 0.2 and a common-mode rejection
ratio of 3250. What would the output voltage be if the single-ended input voltage was 7 mV
rms
A. 1.4 mV rms
B. 650 mV rms
C. 4.55 V rms
D. 0.455 V rms
358. The magnitude of closed-loop voltage gain (Acl) of an inverting amplifier equals:
A. the ratio of the input resistance to the feedback resistance
B. the open-loop voltage gain Aol
C. the feedback resistance divided by the input resistance
D. the input resistance
359. What is the difference between common-mode and differential-mode input signals?
A. phase relationship
B. voltage
C. current.
D. apparent power
360. A circuit that uses an amplifier with passive filter elements is called a(n):
A. relaxation oscillator
B. signal generator
C. differential amplifier
D. active filter
361. The input offset current equals the
A. average of two base currents
B. collector current divided by the current gain
C. difference between two base-emitter voltages
D. difference between two base currents
362. The center frequency of a band-pass filter is always equal to the
A. Bandwidth
B. –3 dB frequency
C. bandwidth divided by Q
D. geometric average of the critical frequencies
363. The formula IC=(VC/t)C shows that for a given capacitor, if the voltage changes at a
constant rate with respect to time, the current will
A. Increase
B. Decrease
C. be constant
D. decrease logarithmically
364. A zero-level detector is a
A. comparator with a sine-wave output
B. comparator with a trip point referenced to zero
C. peak detector
D. limiter
SMVEC ANALOG & DIGITAL ELECTRONICS

365. A digital-to-analog converter is an application of the

A. scaling adder
B. voltage-to-current converter
C. noninverting amplifier
D. adjustable bandwidth circuit
366. If the value of resistor Rf in an averaging amplifier circuit is equal to the value of one
input resistor divided by the number of inputs, the output will be equal to
A. the average of the individual inputs
B. the inverted sum of the individual inputs
C. the sum of the individual inputs
D. the inverted average of the individual inputs
367. If the input to a comparator is a sine wave, the output is a
A. ramp voltage
B. sine wave
C. rectangular wave
D. sawtooth wave
368. A basic series regulator has
A. an error detector
B. a load
C. a reference voltage
D. both an error detector and a reference voltage
369. A comparator is an example of a(n)
A. active filter
B. current source
C. linear circuit
D. nonlinear circuit
370. Initially, the closed-loop gain (Acl) of a Wien-bridge oscillator should be
A. Acl < 3
B. Acl > 3
C. Acl 1
D. 0
371. In an averaging amplifier, the input resistances are
A. equal to the feedback resistance
B. less than the feedback resistance
C. greater than the feedback resistance
D. unequal
372. A triangular-wave oscillator can consist of an op-amp comparator, followed by a(n)
A. Differentiator
B. Amplifier
C. Integrator
D. Multivibrator
373. The ramp voltage at the output of an op-amp integrator
A. increases or decreases at a linear rate
B. increases or decreases exponentially
C. is always increasing and never decreasing
D. is constant
SMVEC ANALOG & DIGITAL ELECTRONICS

374. A two-pole high-pass active filter would have a roll-off rate of

A. 40 dB/decade
B. 40 dB/decade
C. –40 dB/decade
D. 20 dB/decade
375. When transistors are used in digital circuits they usually operate in the:
A. active region
B. breakdown region
C. saturation and cutoff regions
D. linear region
376. Three different Q points are shown on a dc load line. The upper Q point represents the:
A. minimum current gain
B. intermediate current gain
C. maximum current gain
D. cutoff point
377. A transistor has a of 250 and a base current, IB, of 20 A. The collector current, IC,
equals:
A. 500 A
B. 5 mA
C. 50 mA
D. 5 A
378. A current ratio of IC/IE is usually less than one and is called:
A. Beta
B. Theta
C. Alpha
D. Omega
379. With the positive probe on an NPN base, an ohmmeter reading between the other
transistor terminals should be:
A. Open
B. Infinite
C. low resistance
D. high resistance
380. In a C-E configuration, an emitter resistor is used for:
A. stabilization
B. ac signal bypass
C. collector bias
D. higher gain
381. Voltage-divider bias provides:
A. an unstable Q point
B. a stable Q point
C. a Q point that easily varies with changes in the transistor's current gain
D. a Q point that is stable and easily varies with changes in the transistor’s current gain
382. To operate properly, a transistor's base-emitter junction must be forward biased with
reverse bias applied to which junction?
A. collector-emitter
B. base-collector
SMVEC ANALOG & DIGITAL ELECTRONICS

C. base-emitter
D. collector-base
383. The ends of a load line drawn on a family of curves determine:
A. saturation and cutoff
B. the operating point
C. the power curve
D. the amplification factor
384. If VCC = +18 V, voltage-divider resistor R1 is 4.7 k , and R2 is 1500 , what is the base
bias voltage?
A. 8.70 V
B. 4.35 V
C. 2.90 V
D. 0.7 V
385. The C-B configuration is used to provide which type of gain?
A. Voltage
B. Current
C. Resistance
D. Power
386. The Q point on a load line may be used to determine:
A. VC
B. VCC
C. VB
D. IC
387. A transistor may be used as a switching device or as a:
A. fixed resistor
B. tuning device
C. rectifier
D. variable resistor
388. If an input signal ranges from 20–40 A (microamps), with an output signal ranging
from .5–1.5 mA (milliamps), what is the ac beta?
A. 0.05
B. 20
C. 50
D. 500
389. Which is beta's current ratio?
A. IC/IB
B. IC/IE
C. IB/IE
D. IE/IB
390. A collector characteristic curve is a graph showing:
A. emitter current (IE) versus collector-emitter voltage (VCE) with (VBB) base bias
voltage held constant
B. collector current (IC) versus collector-emitter voltage (VCE) with (VBB) base bias
voltage held constant
C. collector current (IC) versus collector-emitter voltage (VC) with (VBB) base bias
voltage held constant
SMVEC ANALOG & DIGITAL ELECTRONICS

D. collector current (IC) versus collector-emitter voltage (VCC) with (VBB) base bias
voltage held constant
391. With low-power transistor packages, the base terminal is usually the:
A. tab end
B. middle
C. right end
D. stud mount
392. When a silicon diode is forward biased, what is VBE for a C-E configuration?
A. voltage-divider bias
B. 0.4 V
C. 0.7 V
D. Emitter voltage
393. what is the current gain for a common-base configuration where IE = 4.2 mA and IC = 4.0
mA?
A. 16.80
B. 1.05
C. 0.20
D. 0.95
394. With a PNP circuit, the most positive voltage is probably:
A. Ground
B. VC
C. VBE
D. VCC
395. If a 2 mV signal produces a 2 V output, what is the voltage gain?
A. 0.001
B. 0.004
C. 100
D. 1000
396. The symbol hfe is the same as:
A.
B.
C. hi-fi
D.
397. Most of the electrons in the base of an NPN transistor flow:
A. out of the base lead
B. into the collector
C. into the emitter
D. into the base supply
398. In a transistor, collector current is controlled by:
A. collector voltage
B. base current
C. collector resistance
D. all of the above
399. Total emitter current is:
A. IE – IC
B. IC + IE
SMVEC ANALOG & DIGITAL ELECTRONICS

C. IB + IC
D. IB – IC
400. Often a common-collector will be the last stage before the load; the main function(s) of
this stage is to:
A. provide voltage gain
B. provide phase inversion
C. provide a high-frequency path to improve the frequency response
D. buffer the voltage amplifiers from the low-resistance load and provide
impedance matching for maximum power transfer
401. For a C-C configuration to operate properly, the collector-base junction should be reverse
biased, while forward bias should be applied to which junction?
A. collector-emitter
B. base-emitter
C. collector-base
D. cathode-anode
402. The input/output relationship of the common-collector and common-base amplifiers is:
A. 270 degrees
B. 180 degrees
C. 90 degrees
D. 0 degrees
403. If a transistor operates at the middle of the dc load line, a decrease in the current gain will
move the Q point:
A. off the load line
B. nowhere
C. up
D. down
404. Which is the higher gain provided by a C-E configuration?
A. Voltage
B. Current
C. Resistance
D. Power
405. What is the collector current for a C-E configuration with a beta of 100 and a base current
of 30 A?
A. 30 A
B. .3 A
C. 3 mA
D. 3 MA
406. A TRIAC:
A. can trigger only on positive gate voltages
B. can trigger only on negative gate voltages
C. cannot be triggered with gate voltages
D. can be triggered by either a positive or a negative gate voltage
407. When checking a good SCR or TRIAC with an ohmmeter it will:
A. show high resistance in both directions
B. show low resistance with positive on anode and negative on cathode, and high
resistance when reversed
SMVEC ANALOG & DIGITAL ELECTRONICS

C. show high resistance with negative on anode and positive on cathode, and low
resistance when reversed
D. show low resistance in both directions
408. What does a hall effect sensor sense?
A. Temperature
B. Moisture
C. magnetic fields
D. pressure
409. What causes the piezoelectric effect?
A. heat or dissimilar metals
B. pressure on a crystal
C. water running on iron
D. a magnetic field
410. Which is the DIAC?

A.

B.

C.

D.
411. A UJT has:
A. two base leads
B. one emitter lead
C. two emitter leads and one base lead
D. one emitter lead and two base leads
412. The only way to close an SCR is with:
A. a trigger input applied to the gate
B. forward breakover voltage
C. low-current dropout
D. valley voltage
413. What is an SCR?
A. a PNPN thyristor with 3 terminals
B. a PNPN thyristor with 4 terminals
C. a PNP thyristor with 3 terminals
D. n NPN thyristor with 3 terminals
414. What type of application would use a photovoltaic cell?
A. an automobile horn
B. a TI 92 calculator
C. a magnetic field detector
D. a remote power source
SMVEC ANALOG & DIGITAL ELECTRONICS

415. Which is the seven-segment display?

A.

B.

C.

D.
416. The smallest amount of current that the cathode-anode can have, and still sustain
conduction of an SCR is called the:
A. maximum forward current
B. maximum forward gate current
C. holding current
D. reverse gate leakage current
417. reverse gate leakage current
A. a positive gate voltage
B. a negative gate voltage
C. low-current dropout
D. breakover
418. Which is the TRIAC?

A.

B.

C.

D.
419. The DIAC is a:
A. Transistor
B. unidirectional device
SMVEC ANALOG & DIGITAL ELECTRONICS

C. three-layer device
D. bidirectional device
420. What type of application would use an injection laser diode?
A. a 10BASE-T Ethernet
B. a liquid crystal display
C. a good flashlight
421. The PUT (programmable unijunction transistor) is actually a type of:
A. UJT thyristor
B. FET device
C. TRIAC
D. SCR
422. A transducer's function is to:
A. transmit electrical energy
B. convert energy
C. produce mechanical energy
D. prevent current flow
423. Base 10 refers to which number system?
A. binary coded decimal
B. decimal
C. octal
D. hexadecimal
424. Convert the decimal number 151.75 to binary.
A. 10000111.11
B. 11010011.01
C. 00111100.00
D. 10010111.11
425. Convert the binary number 1011010 to hexadecimal.
A. 5B
B. 5F
C. 5A
D. 5C
426. The number of bits used to store a BCD digit is:
A. 8
B. 4
C. 1
D. 2
427. Sample-and-hold circuits in ADCs are designed to:
A. sample and hold the output of the binary counter during the conversion process
B. stabilize the ADCs threshold voltage during the conversion process
C. stabilize the input analog signal during the conversion process
D. sample and hold the ADC staircase waveform during the conversion process
428. The weight of the LSB as a binary number is:
A. 1
B. 2
C. 3
D. 4
SMVEC ANALOG & DIGITAL ELECTRONICS

429. What is the difference between binary coding and binary coded decimal?
A. Binary coding is pure binary.
B. BCD is pure binary.
C. BCD is pure binary.
D. Binary coding has a decimal format.
E. BCD has no decimal format.
430. Convert the binary number 1001.0010 to decimal.
A. 125
B. 12.5
C. 90.125
D. 9.125
431. Convert 110010012 (binary) to decimal.
A. 201
B. 2001
C. 20
D. 210
432. What is the decimal value of the hexadecimal number 777?
A. 191
B. 1911
C. 19
D. 19111
433. What is the resultant binary of the decimal problem 49 + 1 = ?
A. 01010101
B. 00110101
C. 00110010
D. 00110001
434. 3428 is the decimal value for which of the following binary coded decimal (BCD)
groupings?
A. 11010001001000 C. 011010010000010
B. 11010000101000 D. 110100001101010
435. What is the result when a decimal 5238 is converted to base 16?
A. 327.375
B. 12166
C. 1388
D. 1476
436. Which of the following expressions is in the sum-of-products (SOP) form?
A. Y = (A + B)(C + D)
B. Y = AB(CD)
C.
D.
437. What is the binary equivalent of the decimal number 368
A. 101110000 C. 111010000
B. 110110000 D. 111000100