Eda Cad Engg
Eda Cad Engg
Eda Cad Engg
Page 1 of 3
EDUCATION:
2001 - 2002
Establishment: University of Clermont-Ferrand (63), Not yet registered?
France Join Viadeo, it's quick and free!
Degree obtained: Master of Analog Microelectronic.
First Name
Area of major concentration: Design of analog
integrated circuits. Last Name
TECHNICAL SKILLS:
• Expert user of Cadence Mixed design framework
(Composer, Analog Artist, Hierarchy Editor.)
• The good knowledge of HDL languages (VHDLAMS,
VHDL, Verilog / VerilogA / VerilogAMS).
• Expert user of Mentor Graphics AMS product line
(Eldo, EldoRF / Modelsim / ADVance Ms, ADVance MS
RF / Adit, Mach, EZwave).
• Experience with others analog / digital / fast
simulators (MICA / VERILOG / Nanosim). La communauté de Fabien
• Experience with calibre to extract the parasitics in
order to perform back-annotated simulations. Les anciens de l'ICS Bégué
858 membres
• Experience with synthesis tool (Design Compiler,
Design Analyzer)
• Experience with Virtuoso layout editor and the Le groupe de Fabien
Silicon Ensemble tool.
• The understanding data management concepts and Microélectronique - 1048 membres
Semiconducteurs
the ability to work with a revision control system with
teams accessing a common repository from multiples
sites. (Synchronicity)
• Experience with the Mentor Graphics design
framework (Design Architect) and the Mentor Graphics
PCB tools (PADSPowerlogic / PADSPowerPCB).
Depuis 2003
CAD/EDA Engineer: Analog Mixed Signal, Mentor Graphics,
Grenoble (France)
Position: CAD/EDA Engineer – AMS (Analog Mixed Signal) Modeling and Simulation
within Wireless Communication Division of STMicroelectronics.
Job Description: To develop VHDLAMS models for analog / mixed signal / RF ICs and
perform top level simulations in collaboration with design leader and customers. To
provide tool support.
http://www.viadeo.com/fr/profile/fabien.senilhes 8/16/2010
Fabien Senilhes | CAD/EDA Engineer: Analog Mixed Signal Simulation | Grenoble | Rhô... Page 2 of 3
IP in transistor level.
• Create generic VHDLAMS models for ST internal library.
• Define the verification strategies with leader project and perform the functional top
level simulations.
• Participate in the development of RF / mixed signal simulation methodologies in
order to improve the efficiency of verification flow.
• Collaborate with design teams to provide tool support, trainings and presentations
(mixed signal top level simulation, VHDLAMS language, new tool functionalities, viewer
…)
• Diagnose and decompose Mentor graphics AMS software-related problems. Assign
the defects to Mentor Graphics engineering and define the functional specification of
new requirements or new tools requested by for the customer.
• Perform evaluation of different simulation tools (fast-spice simulator).
Expérience professionnelle
Analog Design Engineer, Motorola Semiconductors, Toulouse
(France)
2002-2003
Position: Analog Design Engineer within WBSG / EMEA power management division.
Job Description: To develop VerilogA/Verilog models for the validation of an ASIC for
the 3G Mobile platform and perform top level simulations in collaboration with design
leader.
http://www.viadeo.com/fr/profile/fabien.senilhes 8/16/2010
Fabien Senilhes | CAD/EDA Engineer: Analog Mixed Signal Simulation | Grenoble | Rhô... Page 3 of 3
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