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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1

Built-In Self-Test and Digital Calibration

of Zero-IF RF Transceivers
Jae Woong Jeong, Student Member, IEEE, Afsaneh Nassery, Jennifer N. Kitchen, Member, IEEE,
and Sule Ozev, Member, IEEE

Abstract We propose a self-test method for zero-IF radio circuit components, degradation can be monitored using
frequency transceivers using primarily loopback, aided by a nonintrusive detectors [4], [5]. Although such degradation does
small built-in self-test (BIST) circuitry, to determine critical not immediately result in catastrophic failure, it may result in
performance parameters, such as I/Q imbalance and nonlinearity
coefficients. The transceiver is placed in the loopback mode by parametric failure, which can be corrected using predistortion
couplers, specifically designed to be asymmetric with respect to [transmitter (TX)] and postdistortion [receiver (RX)] [6][9],
the primary path and the BIST path. The loopback path is if it is measured in the field.
also designed to include two traces with slightly different delays Performance characterization of RF transceivers, both for
to enable parameter deembedding. Transceiver parameters are postproduction and for in-field purposes, targets the entire
analytically computed using baseband I and Q signals over two
frames, each of which is 200 s in duration. Overall, measure- RX and TX chains. In order to provide a solution that is
ment time is <10 ms, including computation time. In addition low cost for production test and feasible for in-field measure-
to loopback hardware support and the associated parameter ment, several requirements need to be satisfied: 1) the test
deembedding methodology, we propose a complimentary BIST approach must not rely on RF instrumentation, and it must be
circuit to measure the transmitter (TX) gain. The measured noninvasive; 2) no assumptions can be made on the absolute
parameters can be used for predistortion or postdistortion to
calibrate the transceiver, both at production time and in the parameters of built-in test circuit; and 3) test time needs to
field. Both simulation and hardware measurement results show be short enough to be completed during the idle time of the
that the proposed method can determine the target perfor- transceiver.
mance parameters with adequate accuracy for digital calibration. Fortunately, the RF transceiver contains two paths with
Measurement and the subsequent calibration are shown to complimentary operation, namely, TX and RX, which can
reduce TX error vector magnitude more than fivefold, even for
significantly impaired systems. be placed in a loopback configuration. Naturally, loopback-
based testing of RF transceivers has attracted a lot of
Index Terms Built-in self-test (BIST), calibration, loopback attention [8][13], since it eliminates the use of external
test, radio frequency (RF) transceiver.
RF equipment. Earlier work on loopback testing of RF trans-
ceivers has focused on a limited set of parameters [16][19] or
I. I NTRODUCTION on a golden TX (or RX) on the load board [20], [21]. While
effective, such techniques are not amenable for in-field use.
C ONTINUOUS demand for high performance wireless
communication systems drives integration of radio fre-
quency (RF), analog, and digital subsystems onto a single
Recent work has targeted comprehensive solutions for
system-level characterization using a complex model [10],
chip. This integration introduces new challenges in terms [11], [13], [16], [22][24]. There have been two threads with
of test and reliability of RF transceivers. First, to test the respect to system modeling, namely, statistical modeling [10],
entire system, RF-capable instrumentation, including baseband [11], [23], [24] and analytical modeling [16], [22].
functionality and digital pins, is necessary, which increases Statistical modeling allows for easier model generation by
equipment cost. Second, RF transceivers manufactured with relying on machine learning [10], [11], [23]. However, the
digital-oriented fine geometry processes are subject to the generated model is harder to analyze in terms of viable
same manufacturing and reliability challenges as their digital input signals to excite certain behavioral traits. To solve
counterparts. It has been shown that RF circuits suffer from this problem, an automatic test signal generation is proposed
continuous degradation of their performance parameters within for analytical models and numerical solvers [25]. Analytical
the first 12 years of their deployment [1][3]. For some derivation-based models require more manual involvement
even if available tools, such as Mathematica, can be used.
Manuscript received March 19, 2015; revised August 24, 2015 and However, they provide a comprehensive view of the system,
November 5, 2015; accepted November 20, 2015. This work was supported
in part by the National Science Foundation and in part by Semiconductor which helps determine necessary excitation signals [16], [22].
Research Corporation. In [29], a nonintrusive sensor-based test combined with a
J. W. Jeong, J. N. Kitchen, and S. Ozev are with the Department of statistical analysis is proposed.
Electrical Engineering, Arizona State University, Tempe, AZ 85287 USA
(e-mail: [email protected]; [email protected]; [email protected]). In our earlier work, we have shown that using the loopback
A. Nassery is with Qualcomm Technologies, San Diego, CA 92121 USA connection, impairments of the transceiver [I/Q imbalance,
(e-mail: [email protected]). time skews, dc offsets, third-order intercept (IIP3), or
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. fifth-order intercept (IIP5)] can be measured, even if the
Digital Object Identifier 10.1109/TVLSI.2015.2506547 individual gains cannot be separated [16], [36].
1063-8210 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
 This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

2 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

In this paper, we propose a comprehensive solution for

testing zero-IF transceivers. This solution can be used for
both postproduction and in the field for characterization and
calibration. We extend the work in [36] and provide a built-in
solution for the characterization of the above-mentioned trans-
ceiver parameters. We design and analyze the BIST hardware
support components in terms of area overhead, performance
impact, and accuracy. We make a key observation in the design
of our BIST loopback components. The loopback path needs
to have attenuation, whereas the insertion loss in the primary
path needs to be negligible. In other words, the two alternate
paths are asymmetrical with respect to the signal flow. The
primary distinction of our BIST hardware support compared
with [26][28] is that this asymmetry can be used to enable the
loopback path without impacting the performance of the pri-
mary circuit. We use couplers with a low coupling coefficient
to activate the loopback path, which provide both the needed
attenuation for the loopback path as well as the desired isola-
Fig. 1. Transceiver system block diagram.
tion for the primary path. Moreover, with analytical modeling
and carefully designed test signals, parameters of the BIST TABLE I
circuit, namely, attenuation, insertion loss, and phase delay, do VARIABLE D EFINITION
not need to be known. Hence, the proposed technique is largely
immune to process variations. In addition to this loopback
BIST circuit, we design a simple enhancement to enable the
measurement of TX gain, which may be necessary in some
applications. The BIST measurement circuit is calibrated once
at production time with a signal applied to the LNA input,
without any additional pins. We show, with extensive simu-
lation and hardware experiments, that the proposed method
provides accurate results for both the purposes of go/no go
testing, and in-field monitoring and calibration. Since the
proposed approach is suitable for in-field measurement, system
performance can periodically be monitored to update the cali-
bration parameters, increasing the reliability of the RF system. impairments and time delays, as well as nonlinearity of the
The proposed technique requires a test signal application for TX and RX (listed in Table I). Moreover, since we target
2 frames of 200 s each. Subsequent computation takes less in-field measurement, we cannot rely on knowledge of the
than 10 ms on a PC with Intel Core2 processor. parameters of the loopback connection (BIST circuit).

II. P ROPOSED M ETHODOLOGY B. Test Signal Design

We propose to use simple BIST circuitry to place the In the proposed technique, we analyze the system in two
transceiver in the loopback mode to initiate the characteri- steps: 1) linear analysis to compute most parameters and
zation process. The transceiver can be characterized during 2) nonlinear analysis to compute nonlinearity coefficients.
postproduction testing and periodically in the field, while it is While the system is inherently nonlinear, for input power
not in use. The computed performance parameters are stored reasonably below the 1-dB compression point, nonlinearity
and used for digital calibration. terms can be ignored. We rely on this property to first
characterize I/Q mismatch, dc offsets, and time skews, and use
A. Loopback Test Solution With BIST as Loopback Path this information to characterize the nonlinear impairments.
With this model, (1) and (2) show the loopback response
Loopback is a desirable test setup for an RF transceiver, as
at the RX output. It is clear that relations between observ-
it is simple, and all the data analyses are done in baseband.
able signals and internal parameters are complex. Moreover,
However, computation of target parameters from only loop-
gain/attenuation terms appear as a product, independent of the
back response of the device under test (DUT) is challenging
input. Hence, they cannot be decoupled in this step, regardless
due to complex interactions among different parameters.
of the complexity of the test signal that can be synthesized
In order to facilitate this computation, we need to develop
a relation between observable signals and target parameters, Iout (t)
and determine test signals, where these relations can be broken G TX G RX
= [I (t td TX RX ) cos(c (td dLO ))
down and analyzed with ease. 2K
Fig. 1 shows our system model that is used for the + (1+gTX)Q(t td dTX TX RX dRX )
analysis of the loopback path. This model includes all linear sin(c (td dLO) TX )] (1)
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JEONG et al.: BIST AND DIGITAL CALIBRATION OF ZERO-IF RF TRANSCEIVERS 3

separate these two variables, as we will explain in Section II-G.

For the rest of the parameter computation, we do not need this
separation, and we denote the gain of the entire chain with one
variable, G, as (3).
Path delays after I and Q signals are combined reflect as
phase shift and are added to the loopback delay, as
G TX G RX
G= (3)
2K
= c (td dLO ). (4)
Using the specialized test signals, system response can be
divided into four sections, each of which has a distinct depen-
dence on system variables. Equation (5) shows the amplitudes
of the system response, which comprises a single-tone sinu-
soidal signal for each section. For instance, A IIinout denotes the
amplitude at the I output of the RX when the I input of the
TX is excited
A IIinout = Ain G cos()
Q
A Ioutin = Ain G(1 + gTX ) sin( TX )
Fig. 2. Baseband test signal designed to decouple TX/RX parameters.
A IQinout = Ain G(1 + gRX ) sin( + RX )
Q
A Q inout = Ain G(1 + gTX )(1 + gRX ) cos( + RX TX ). (5)
Q out (t)
G TX G RX Output signal amplitude in each section in the frame can
= (1 + gRX )[I (t td TX RX ) be obtained by taking the fast Fourier transform (FFT) of the
2K
sin(c (td dLO ) + RX ) + (1 + gTX ) appropriate section. This will eliminate any undesired effects,
Q(t td dTX TX RX dRX )TX such as noise or dc offsets. Here, we have six unknowns, while
we have only four equations. In [16], we have solved this
cos(c (td dLO ) + RX TX )]. (2)
problem by employing a programmable delay in the loopback
One way of decoupling the response of I and Q inputs is to path and characterizing it, so we know delay difference.
place information on different frequencies. Since this would However, this is not amenable to in-field application. Thus,
complicate the analysis, we choose to employ time-domain we devise a new computation method to eliminate reliance on
separation, where the dynamic signal is applied to one arm this knowledge. Here, we treat each variable as an unknown
at a given time. Moreover, we realize that we need to excite and apply two consecutive frames with different random
the nonlinearity of the system to determine nonlinear complex phase shifts, which naturally occur in the system due to
coefficients. Thus, in the same frame, both low amplitude and delay differentials. By rearranging and manipulating the terms,
high amplitude signals need to be applied. Placing two signals the unknowns can explicitly be computed in a step-by-step
into the same frame ensures that all RF signals are defined fashion.
with respect to the same time base. Hence, phase relations are Having eight equations, ratio-based expressions, as in (6),
preserved in the RF domain as well as in the baseband domain. can be used to solve for the unknowns. Substituting the ampli-
Even though RF signal analysis is not used, preserving phase tude relations, there are four equations and four unknowns
relation is necessary to minimize the number of variables and that can be solved. In (6), 1 and 2 are the phase shifts
solve the equations. in the RF path for the first and second measurements. The
Fig. 2 shows the defined test signals, which can easily left sides of the equations are known by taking the FFT of the
be generated by on-chip digital resources (e.g., the DSP). RXs output signal
Dividing the test signal into two phases and exciting one arm
A IIinout1 cos(1 )
at a time with a simple sinusoidal signal are the first step in =
decoupling various internal parameters. Note that even if the A IIinout2 cos(2 )
baseband input is set as zero, there are still dc offsets generated Q in
by transceiver components and local oscillator (LO) leakage. A Iout1 sin(1 TX )
=
We do not rely on the dc component of the output signal. Q in
A Iout2 sin(2 TX )
Hence, dc offsets do not affect the system model.
A IQinout1 sin(1 + RX )
=
C. Computation of I/Q Mismatches A IQinout2 sin(2 + RX )
Linear gains in the path are inseparable in the loopback Q
A Q inout1 sin(1 + RX TX )
mode, since the TX is directly connected to the RX through = . (6)
AQ in sin(2 + RX TX )
the loopback path. The proposed BIST circuit in this paper can Q out2
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4 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

It is very important to note that there is no need to know the where d2k1 is the output complex envelope, and it is
parameters of the BIST circuit, such as delay or attenuation. given in
While these parameters may have large variations in them due
to process variations, the computations are immune to these 
N
2 j 1C j k 2 j 1
variations. After solving (6) to obtain TX and RX , path gain d2k1 = a2 j 1 Ain . (11)
4 j 1
and gain mismatch for the TX and the RX can be computed as j =k

A IIinout Although the proposed technique can be used to model

G=
Ain cos() higher orders of nonlinearity, complex coefficients up to the
Q
A Ioutin fifth order are considered in this analysis.
gTX = 1 DUT response is divided into two sections, one for the input
Ain G sin( TX ) signal on I arm and the other one for Q arm. Equation (12)
AQ in
Iout shows Iout signal at an output of the RX, where ITX is the input
gRX = 1. (7)
Ain G sin( + RX ) sinusoidal signal. Here, m is the baseband input frequency,
Time skews and the dc offsets can be computed in the while 1 and 2 are the signal phase shifts for the first and
same way as in [14]. The test signal is designed to preserve second measurements
the phase coherence between the low-amplitude and
high-amplitude phases. Therefore, RF delay that is computed Iout_ITX = Iout,1st_ITX cos(m t + 1 )
in this step by solving (6) can be used in the next step to + Iout,3rd_ITX cos(3m t + 31 )
calculate nonlinearity coefficients.
+ Iout,5th_ITX cos(5m t + 51 ) (12)

D. Nonlinear Parameter Computation Q out_ITX = Q out,1st_ITX cos(m t + 1 )

In order to explain our method for nonlinearity computa- + Q out,3rd_ITX cos(3m t + 31 )
tion, we demonstrate our model for the TX, where system + Q out,5th_ITX cos(5m t + 51 ). (13)
nonlinearity is aggregated in the power amplifier (PA). While
all devices in the TX and the RX exhibit nonlinear operation, The RX output includes third- and fifth-order harmonics of
this nonlinearity can be modeled in one circuit component the input signal, as in (12) and (13). For instance, Iout,1st_I TX
(e.g., the PA), and the resulting mathematical model is equiv- is the amplitude of the first-order harmonic. The amplitude
alent to a model, where each component exhibits nonlinear of the signal in each frequency component can be measured
behavior [30]. Here, we focus on the PA, since it presents by taking the FFT of the output signal. The amplitude of
with the most nonlinearity. However, our technique targets each harmonic is a function of a set of unknowns, which
the entire TX or RX chain and not individual components can be used to develop a solution for complex coefficients.
of the chain. Applying the baseband sinusoidal signal to The amplitude of the fundamental term is a function of the
only one arm of the TX generates a two-tone signal at the amplitude term (Aout,1st_ITX ) due to the AM/AM distortion
PA input, since it is multiplied by the carrier signal. In order to and the phase term due to AM/PM distortion (dd,1st_ITX )
characterize the nonlinearity of the system, we model it with a
fifth-order complex polynomial as in (8), which is a commonly Aout,1st_ITX
accepted model for many predistortion algorithms [31][33]. Iout,1st_ITX = cos(dd,1st_ITX ) (14)
2
Using the ratios of these computed coefficients, IIP3 and IIP5,
as well as AM/AM and AM/phase modulation (PM) distortion where
of the TX can be calculated as
PAout = a1 PAin + a3 PA3in + a5 PA5in . (8) Aout,1st_ITX
 
 3 5 
In (8), a1 through a5 are complex nonlinearity coefficients. = a1 Ain G TX + a3 A3in G 3TX + a5 A5in G 5TX  G RX (15)
Applying x 0 (t) = Ain cos(m t) to one arm of the TX, 4 8
a two-tone signal at the input of the PA is given as dd,1st_ITX
 
3 5
PAin =
Ain
[cos((c m )t + (t))+cos((c + m )t + (t))] = c delay +  a1 Ain G TX + a3 A3in G 3TX + a5 A5in G 5TX .
2 4 8
= [x 0 (t)e j c t e j (t )] (9) (16)

where (t) is the phase shift due to the delays in the path. The third-order and fifth-order components are derived
As it is studied in [34] and [35], the complex envelope signal through a similar approach and given by
of the PA output is shown in (10), where N is the maximum
order of the model, which is 5 in this paper Aout,3rd_ITX
Iout,3rd_ITX = cos(dd,3rd_ITX ) (17)

N 2
y(t) = d2k1 cos((2k 1)m t) (10) Aout,5th_ITX
Iout,5th_ITX = cos(dd,5th_ITX ) (18)
k=1 2
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JEONG et al.: BIST AND DIGITAL CALIBRATION OF ZERO-IF RF TRANSCEIVERS 5

where the RX, as in (26)(28) and (A7)(A9)

  b1 = a1 G RX
1 
Aout,3rd_ITX =  a3 A3 G 3 + 5 a5 A5 G 5  G RX (19)
4 in TX
16 in TX  b3 = a3 G RX
 
1 5 b5 = a5 G RX . (25)
dd,3rd_ITX = c delay +  a3 Ain G TX + a5 Ain G TX
3 3 5 5
4 16 Amplitude terms (Aout,ith_ITX ) and phase terms (dd,ith_ITX )
  (20) of the fundamental as well as harmonics are used to compute
1 
Aout,5th_ITX =  a5 A G  G RX
5 5
(21) the nonlinear complex coefficients (b1 through b5 ). Real parts
 16 in TX 
  of these complex coefficients are given in (26)(28), whereas
1 imaginary parts are given in the Appendix
dd,5th_ITX = c delay +  a5 A5in G 5TX . (22)
16 1
b1,R = [ Aout,1st_ITX |cos(dd,1st_ITX dd )|
A
The relation for each frequency location includes Aout,jth_ITX 3 Aout,3rd_ITX |cos(dd,3rd_ITX dd )|
and dd,jth_ITX , which have to be determined. In order to
+ 5 Aout,5th_ITX |cos(dd,5th_ITX dd )|] (26)
determine the nonlinear coefficients, we need to find dd,jth_ITX
first. In (16), delay represents all the delays in the path of 1
b3,R = 3 [4 Aout,3rd_ITX |cos(dd,3rd_ITX dd )|
the RF transceiver including delay in the loopback path (td ). A
Similar to the way we compute linear impairments, we change 20 Aout,5th_ITX |cos(dd,5th_ITX dd )|] (27)
the loopback delay to obtain additional linearly indepen- 1
b5,R = 5 [16Aout,3rd_ITX |cos(dd,5th_ITX dd )|]. (28)
dent equations. Therefore, two consecutive measurements are A
needed to determine dd,1st_ITX for each frequency component. In order to calculate the unknown, dd , we use the linear
The ratio-based equation for the fundamental component of parameters that we have already calculated earlier, as in
Iout and Q out is given in
dd = tan1
 
cos(dd,1st_ITX + ) A1 cos(B1 ) A2 cos(B2 ) A3 cos(B3 ) + A4 cos(B4 )
Iout,1st_ITX1
= =A
Iout,1st_ITX2 cos(dd,1st_ITX ) A1 sin(B1 ) A2 sin(B2 ) A3 sin(B3 ) + A4 sin(B4 )
(29)
Q out,1st_ITX1 sin(dd,1st_ITX + RX + )
= = B. (23)
Q out,1st_ITX2 sin(dd,1st_ITX + RX ) where
A1 = Aout,3rd_ITX , A2 = 5 Aout,5th_ITX
After solving dd,jth_ITX in terms of the ratio of two consec-
Aout,3rd_Q TX 5 Aout,5th_Q TX
utive measurements, they are given by A3 = , A4 =
(1 + gTX )3 (1 + gTX )3
  B1 = dd,3rd_ITX , B2 = dd,5th_ITX
cos() A
dd,1st_ITX = tan1
sin() B3 = dd,3rd_Q TX , B4 = dd,5th_Q TX .
 
B cos()
dd,1st_ITX = RX + cot1 . (24) Using the computed complex coefficients, TX IIP3 and IIP5
sin() can be calculated as
4 |b1| 8 |b1 |
Because we already solved RX in Section II-C, delay A2IIP3 = , A4IIP5 = . (30)
3 |b3| 5 |b5 |
difference () and dd,1st_ITX are solvable from (24). In addi-
tion, Aout,1st_ITX is directly calculated from (14), because the Moreover, using the already obtained information, it is
dd,1st_ITX and Iout,1st_ITX are already obtained. Similar equa- possible to compute the AM/AM and AM/PM distortions at
tions can be derived for the third- and fifth-order components. any desired input power level using
 
Since our input test signal is divided into two sections, we  3 b3 2 5 b5 4 

AM/AM(Ain ) = 1 + A + A (31)
have four responses for I and Q outputs at the RX, namely, 4 b1 in 8 b1 in 
I and Q output at RX with only I input at TX, and I and Q  
3 b3 2 5 b5 4
output at RX with only Q input at TX. Since each output AM/PM(Ain ) =  1 + A + A . (32)
includes three frequency components and each component 4 b1 in 8 b1 in
generates one equation, there are a total of 12 equations, where
10 of them are linearly independent. As shown in (14)(16), E. Digital Calibration of Transmitters Using Predistortion
each component is a function of the nonlinear coefficients Extensive research exists in the communication domain to
that are complex numbers (i.e., each nonlinearity coefficient develop predistortion techniques for calibration of TX impair-
presents with two unknowns). In addition to the coefficients, ments [6][9]. However, these techniques are based on the
the aggregate phase delay is also unknown (dd = c delay ). assumption that impairments are known or can be measured
In order to simplify the analysis, we denote composite non- with high precision. The proposed technique naturally results
linearity parameters for the loopback path, including the RX, in some computation errors due to limited resolution and/or
as in (25). The complex coefficients b1 through b5 can be noise in the system. In this section, we derive a simple
obtained solely based on measurements at the output of predistortion model for I/Q imbalance and use this model to
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6 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

demonstrate that our technique provides adequate measure-

ment accuracy for effective predistortion to reduce error vector
magnitude (EVM).
The predistortion formulation can be obtained by equaliz-
ing the response of the impaired TX with an ideal one as
p
in (33). The ITX is the predistorted signal that needs to be
determined
ITX (t) cos(c t) Q TX (t) sin(c t)
p p
= ITX (t) cos(c t) Q TX (t)(1 + gTX ) cos(c t). (33)
Equation (34) shows the results for baseband compensation
Fig. 3. Proposed BIST circuit.
for I/Q imbalance
p
ITX (t) = ITX (t) + Q TX (t) tan(TX ) for amplitude/power measurement, including envelope detec-
Q TX (t) tors [37], [38] and root-mean-square (rms) detectors [39], [40].
p
Q TX (t) = . (34) These existing solutions are not suitable for our requirements,
(1 + gTX ) cos(TX )
since they require additional steps for measuring and deem-
To calibrate for RX impairments, similar equations can bedding the dc offsets. Here, we design a measurement circuit
be derived for postdistortion. In Section III, we will present suitable for low-frequency dynamic signals.
the effect of measurement errors on the efficacy of digital The proposed measurement circuit, marked as BIST for
calibration. gain measurement in Fig. 3, is an extremely simple frequency
down-converter. In the calibration phase, the LNA input (Vcal )
F. BIST Circuit for Loopback Connection is coupled to the BIST measurement circuit, and the resulting
In order to facilitate the measurements, we need a loopback gain of the entire loop (including the coupler gain, insertion
connection that can switch between two phase delays. While loss of the switches, and the gain of the mixer and filter)
we do not need to know the precise delays or the delay is determined. In the measurement phase, the PA output is
difference between the paths, the two loopback paths need to coupled to the BIST measurement circuit in the same way.
have the same insertion loss, or need to be reasonably matched. Due to the matched signal path, the gain of the TX can
Moreover, the BIST circuit should have a very low insertion be decoupled from the output amplitude measurement. For
loss for the primary path and a respectable attenuation between in-field measurements, no calibration step is necessary, since
the PA and the LNA in order to avoid saturating the RX. the BIST circuit is infrequently used and does not degrade at
To achieve all of these goals, we design the loopback connec- the same rate as the primary circuit.
tion with two couplers to sense the PA output and excite the This BIST circuit has been designed and laid out
LNA input, a power splitter, and a switch to select between using the 0.18-m IBM 7RF technology and presents with
the loopback paths, and two metal traces with different lengths 0.1-mm2 area overhead. It introduces no additional perfor-
to provide the different loopback phase delays. This BIST mance overhead to the primary circuit. Monte Carlo simu-
circuit, marked as BIST for loopback in Fig. 3, is designed lations show less than 0.1-dB mismatch between the alternate
and laid out using the 0.18-m IBM 7RF technology and traces to the BIST measurement circuit. Hence, this circuit
presents with 0.08-mm2 area overhead. We opted to use the can measure the gain within 0.1-dB error in spite of process
couplers for signal connection as opposed to switches (despite variations. In Section IV, we also show an off-the-shelf
slightly larger area), due to very loss insertion loss in the implementation of this circuit and evaluate the mismatches of
functional path, which is <0.17 dB. Another advantage of off-the-shelf circuit components on BIST accuracy.
using the coupler is that in the BIST path, the very low cou-
pling coefficient (30 dB) provides the necessary attenuation H. Limitations of the Proposed Technique
for the PA output. In addition, we conducted Monte Carlo There may be additional undesired behavior, such as
simulations and determined that the gain mismatch between substrate leakage, that is not modeled in the proposed method.
the two loopback traces is <0.1 dB. This mismatch, as we will Substrate leakage would cause additional dc offsets at the
show in Section IV, has virtually no impact on measurement RX output. Since our technique does not rely on the dc values,
accuracy for the target parameters. this offset will not reversely affect the accuracy of the mea-
surements. If additional impairments exist in the system, they
G. BIST Circuit for Transmitter Gain need to be modeled and included in the extraction. In general,
In some cases, it may be necessary to measure the linear for any effect that causes spectral pollution, we have to make
gain of the TX. We propose to compliment the loopback sure that the frequency that we use for our computations is
BIST circuit, which already has the necessary mechanism to clean. For instance, if baseband clock harmonics may leak
sense and inject signals, to measure this gain. The BIST mea- into the RF frequencies and couple back into the baseband at
surement circuit can easily be calibrated during production test the RX, the signals need to be set in a way to avoid distortion
with an external source through the LNA input, without any by these components. Since these clock frequencies are well
additional pins. There are various detectors proposed earlier known, this can easily be achieved during the test signal setup.
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JEONG et al.: BIST AND DIGITAL CALIBRATION OF ZERO-IF RF TRANSCEIVERS 7

Fig. 4. Simulation results for I/Q mismatch.

III. S IMULATION R ESULTS

We first validate the proposed technique through simula-
tions. The system model (Fig. 1) and the proposed solution
are implemented in MATLAB to evaluate the accuracy of the Fig. 5. Simulation results for nonlinear coefficients. a1r: real part of
technique under different impairment scenarios. Monte Carlo fundamental coefficient. a1i: imaginary part of fundamental coefficient.
sampling is used to inject impairments with a wide range, and a3r: real part of the third-order coefficient. a3i: imaginary part of the
third-order coefficient. a5r: real part of the fifth-order coefficient.
the proposed technique is used to determine these impairments. a5i: imaginary part of the fifth-order coefficient.
Up to 2-ns common delay, time skews are injected to both
TX and RX paths. LO frequency is 2.4 GHz, and the input
frequency is chosen as 1 MHz. 1024-point FFT is used to
compute the spectral response. Gaussian white noise is injected
between the TX and the RX with 30-dB SNR. Fig. 4 shows the
computed values versus the injected values for I/Q mismatch.
The results show that the impairments can be computed
with very little error. In addition, TX and RX gains can be
extracted from low power responses using the proposed BIST
circuit. In the simulations, mismatch between BIST paths is
not considered, and hence, gain computations present with
zero error. As mentioned earlier, Monte Carlo simulations
show that the gain computation may have up to 0.1 dB-error
due to the BIST mismatch. It should be noted that neither Fig. 6. Simulation results for IIP3 and IIP5.
TX nor RX gain is used to compute I/Q mismatch. Hence,
I/Q mismatch computations are not affected by errors in the In order to demonstrate that the accuracy of the compu-
gain measurement circuit. In Section IV, we will discuss the tations is adequate for in-field digital calibration, we have
effect of the loopback connection on the computation accuracy used the digital predistortion method outlined in Section II-E
for I/Q imbalance. for the TX and evaluated the EVM of the impaired TX
Computed I/Q imbalance parameters are used to determine and the calibrated TX. We measure EVM as outlined in the
complex nonlinear coefficients of the transceiver. Fig. 5 shows wireless local area network (WLAN) standard. Due to the
the comparison between injected and computed values for long simulation time for EVM, we have selected 20 random
complex nonlinear coefficients. Despite the complexity of the Monte Carlo instances for predistortion and EVM calculation.
mathematical model, coefficients can be computed with very In every Monte Carlo instance, the proposed measurement
high accuracy. Complex coefficients in turn can be used to technique followed by the subsequent digital calibration results
compute IIP3, IIP5, AM/AM, and AM/PM distortions. The in considerable reduction in TX EVM. More importantly,
results of these computations are shown in Figs. 6 and 7. The the calibrated TX EVM in every instance is below 4%.
rms errors for the specifications are summarized in Table II, As an example, Fig. 8 shows the constellation diagrams before
which verify that the proposed method presents high and after calibration for one case of a highly impaired TX
accuracy. (gain mismatch = 20%, phase mismatch = 5). In the
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8 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Fig. 9. Transceiver test board.

Fig. 7. Simulation results for AM/AM and AM/PM distortion.

TABLE II
S UMMARY OF S IMULATION R ESULTS

Fig. 10. PCB test setup.

A. Experiments With RF Transceiver PCB

The zero-IF transceiver PCB contains the TX, attenuator for
loopback test, and the RX, and operates at 2.4 GHz. We used
Analog Device ADL5521 for the low noise amplifier, Hittite
Microwave HMC414MS8G for the PA, Hittite Microwave
HMC213AMS8 for the mixers, Mini-circuits NCS4-272 for
the balun, Mini-circuits BP2U for the splitter, and TDK Cor-
poration MEM2012T35R0T0S1 for the filters. The fabricated
board is shown in Fig. 9.
In order to generate different phase and gain mismatches
between I and Q path in the transceiver PCB, we use different
Fig. 8. (a) Captured QAM symbols before calibration. (b) Captured QAM
symbols after calibration.
lengths of transmission lines. The circuits for gain mismatches
are in the baseband path. These two different paths include two
different resistors, and the desired path is selected according
constellation diagram, red dots are captured quadratic-
to the status of the slide switches. Overall, we fabricated five
amplitude modulation (QAM) symbols, while blue circles are
identical PCBs.
transmitted ones. EVM for this example is reduced from 16%
Baseband signals are generated using vector signal
to 3.8%.
generator (Agilent N5182A) at the TX input. The signals
are captured at the RX output using the oscilloscope
IV. H ARDWARE E XPERIMENTS (Agilent DSO9254A) with an 8-bit resolution. The digitized
In order to demonstrate the feasibility of the proposed I/Q signals are processed using MATLAB. Fig. 10 shows the
technique with all the imperfections of hardware components, test setup for extraction of the target parameters.
we experiment with two different platforms. First, we have To compare the results with the traditional measurement
fabricated an intentionally impaired zero-IF RF transceiver techniques, we have to use multiple test setups and RF equip-
printed circuit board (PCB). The purpose of this experiment ment. For TX I/Q gain mismatch, we apply a dc signal to
is to evaluate how the proposed techniques work with high each arm of the TX, and measure the PA output power. For
impairment levels. Second, we have implemented the zero-IF TX I/Q phase mismatch, a dc voltage is simultaneously applied
transceiver and the associated BIST circuit with discrete to I and Q inputs of the TX, and the signal analyzer (Agilent
off-the-shelf components, where the baseband is implemented N9020A MXA) is used to capture the RF signal. For the
through test equipment. The purpose of this experiment is RX gain and phase mismatch, an RF signal source (Agilent
to evaluate the accuracy of the proposed technique in the N5181A MXG) is used to drive the LNA input, and I/Q output
presence of process variations in the BIST circuit. is captured with the oscilloscope (Agilent DSO9254A).
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JEONG et al.: BIST AND DIGITAL CALIBRATION OF ZERO-IF RF TRANSCEIVERS 9

TABLE III
H ARDWARE M EASUREMENT R ESULTS T RANSCEIVER B OARDS

Fig. 12. PCB hardware measurements. (a) QAM symbols for the PCB with
the impairments. (b) QAM symbols for the PCB with calibration.

TABLE IV
H ARDWARE M EASUREMENT R ESULTS

Fig. 11. (a) Test setup for EVM with PCB. (b) Test setup with discrete
components.

The parameter measurements using traditional methods

were compared with the ones calculated using the proposed
technique for the five fabricated PCBs. In addition, we have indicating that the developed models and analytical
changed the resolution of the signal capture at the RX output solutions are valid for any impairment scenario.
from 8 to 6 bit and repeated the experiments. Table III 2) The bounds of acceptance for impairments can greatly
summarizes the worst case measurement error for all the given be expanded allowing for higher yield, less stringent
impairments. The results indicate that the proposed technique design specifications, and higher reliability, since degra-
can compute the desired parameters accurately even with an dation can be monitored and compensated.
extremely mismatched system, including mismatches in the
BIST path. B. Off-the-Shelf Component Setup
We have also evaluated the effect of these measurement The designed board has intentionally very high gain and
errors on the efficacy of the digital calibration. We have phase imbalance due to existing switches in the path. We also
used the worst case computation error for digital predistortion verify the proposed technique using another test setup in
(i.e., 1.5% for the TX gain mismatch, and 4 for TX phase order to be able to evaluate the accuracy for better devices.
mismatch) at the baseband. The TX output is connected to the In this setup, the RF transceiver is implemented using the
vector signal analyzer (Agilent N9020A MXG) to measure vector signal generator (Agilent N5182A), PA (Mini-Circuits
the EVM. Fig. 11(a) shows the EVM test setup for both the ZX60-2522M+), attenuators, and vector signal analyzer
PCB implementation and the implementation with the discrete (Agilent N9020A). Fig. 11(b) shows the test setup. The same
components. frequencies are used for the second set of experiments.
Fig. 12 shows the constellation diagrams before and after the Measurements have been conducted for two cases of differ-
calibration for the board, whose results are given in Table III. ent impairments and nonlinearity parameters. Although we use
Due to high impairments (68% gain mismatch and 31.2 phase the same PA for all the cases, the actual IIP3 of the TX path
mismatch), symbols in the constellation are distorted and is slightly different due to different baseband gains of the TX.
become unidentifiable. We calibrate this PCB using the com- Table IV summarizes the measurement results for these cases.
puted impairments (69% gain mismatch, and 35.9 phase Computation time, including the FFT, was less than 10 ms
mismatch) for predistortion. As shown in Fig. 12(b), on a PC with an Intel Core2 processor. In addition to these
the predistortion suppresses EVM by fivefold from over parameters, we have measured the AM/AM and AM/PM
100% to 20%. Naturally, we would not recommend that such distortions of these TXs. In Fig. 13, the computed AM/AM
a highly impaired system be shipped to a customer even with and AM/PM distortions are compared with the measured
digital calibration. However, measurement results with the ones. This comparison shows that the computed AM/AM and
PCB demonstrate two points. AM/PM distortions are accurate within reasonable input power
1) The computed impairments and nonlinearity parameters levels (up to 6 dBm, which is 10 dB below IIP3).
using the proposed measurement technique are highly As in the previous case, the TX formed with discrete
accurate even when the system is highly impaired, components has been calibrated using the measured val-
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10 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Fig. 13. Hardware measurement with off-the-shelf components. (a) AM/AM

distortion. (b) AM/PM distortion.
Fig. 15. Hardware demonstration for the proposed BIST circuit.

Fig. 14. Constellation diagram. (a) QAM symbols for impaired TX. Fig. 16. Hardware demonstration for the gain measurement BIST circuit.
(b) QAM symbols for calibrated TX.

TABLE V
ues (25.44% gain mismatch and 7.24 phase mismatch). BIST C IRCUIT M EASUREMENT R ESULTS
Fig. 14 shows the constellation diagram for 100 Orthogonal
frequency-division multiplexing frames before and after cali-
bration. Before the calibration, the measured EVM of the TX
is 25.5%. EVM is reduced to 5% after calibration, which is
within acceptable limits for WLAN applications.
In both experimental setups, the alternate loopback paths
present with 0.1-dB gain mismatch. The results given in
Tables III and IV include this error. We have further experi- attenuator between the mixer and the RF combiner, because
mented with different loopback connections, where the BIST the coupler that we use is not designed to have the low
mismatch is increased to 0.2 dB, and found that the I/Q gain coupling coefficient that we need. The low-pass filter at the
mismatch error increases by 0.1% and the I/Q phase mismatch IF port of the mixer eliminates high-frequency components,
error increases by 0.1. Hence, we conclude that the proposed and hence, only baseband signal can be captured at the BIST
BIST circuit is robust to compute the target parameters. output. Fig. 16 shows the measurement setup for the BIST
Based on our analysis, the BIST circuit and the associated circuit. The output of the BIST circuit is the baseband sine
parameter deembedding technique satisfy the desired aspects wave, and the amplitude of the signal is used to characterize
that we outlined in Section I, namely: 1) the BIST method does the BIST gain as well as the output of the TX.
not rely on RF instrumentation; 2) BIST circuit parameters are In the first phase, we apply a single sinusoidal source to
treated as unknowns; and 3) test time is negligible. the input of the BIST circuit. This step will determine the
gain (or loss) of the overall BIST loop, including couplers,
switches, and traces. After calibration, we use this information
C. Gain Measurement BIST Hardware Demonstration to determine the PA output power. Table V compares the
All of the hardware experiments thus far include the loop- computed power with the actual power. As shown in Table V,
back BIST circuit. We have also implemented the proposed the computed power using our technique is highly accurate.
gain measurement BIST circuit with discrete components and Particularly, despite mismatch in components, the TX power
evaluated its accuracy. This circuit is shown in Fig. 15. Note (or gain) can be measured within 0.1-dB error.
that the gain measurement BIST circuit needs to include We have also evaluated the hardware overhead of the
the couplers, which is a part of the loopback BIST circuit. BIST circuits. The BIST approach requires no additional pins.
Coupler 1 is located at the output of the TX, and the coupler 2 The area of each of the BIST circuit components is given
is located at the other port, which is used for calibration. in Table VI. Compared with RF transceivers (excluding any
In the hardware demonstration, we also need to include an digital processing) manufactured with the same technology
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JEONG et al.: BIST AND DIGITAL CALIBRATION OF ZERO-IF RF TRANSCEIVERS 11

TABLE VI simple analytical equations, which once again can be con-

A REA OVERHEAD E STIMATE W ITH IBM 7RF P ROCESS T ECHNOLOGY ducted by existing on-chip resources. Since the equations are
simple and explicit, computation time is negligible. We also
present a simple predistortion method to compensate for
I/Q mismatch that is measured using the proposed technique.
The calibration approach illustrates that even a highly impaired
system can be characterized and compensated to bring the
EVM within specification. In addition to the loopback BIST
components, we design a complimentary BIST circuit to
measure the TX gain. The accuracy of the technique is verified
with both simulation and hardware measurements.

A PPENDIX
D ERIVATION OF N ONLINEAR C OMPLEX C OEFFICIENTS
Since nonlinear coefficients are complex numbers, they are
divided into real and imaginary parts. The amplitude terms
of frequency components at the output of the RX are given
by (A1)(A3), as shown at the bottom of this page.
And the phase terms of frequency components at the output
of the RX are given by
 
1 b1,I + 34 b3,I A2 + 58 b5,I A4
dd,1st_ITX = dd + tan
b1,R + 34 b3,R A2 + 58 b5,R A4
(A4)
 
1
b 3,I + 5
b
16 5,I A 2
dd,3rd_ITX = dd + tan1 14 (A5)
b
4 3,R + 5
16 b5,R A
2
 
1
1 16 b5,I
dd,5th_ITX = dd + tan 1
. (A6)
Fig. 17. Layout of BIST system.
16 b5,R
The complex coefficients can be expressed in terms of the
and working in the same band of operation, the total area of
amplitude term and the phase term, which are already known.
both BIST circuit is <0.18 mm2 , corresponding to 2% of the
And the imaginary parts of the coefficients are given by
area of the transceiver. Fig. 17 shows the layout of the BIST
system. Hence, with this small additional area, most important 1
b1,I = [ Aout,1st_ITX |cos(dd,1st_ITX dd )|
parameters of the transceiver can be characterized without any A
RF instrumentation, and more importantly recharacterized in tan(dd,1st_ITX dd )
the field. 3Aout,3rd_ITX |cos(dd,3rd_ITX dd )|
tan(dd,1st_ITX dd )
V. C ONCLUSION
+ 5 Aout,5th_ITX | cos(dd,5th_ITX dd )|
In this paper, a step-by-step solution for computation of
linear and nonlinear parameters of zero-IF transceivers in the tan(dd,1st_ITX dd )] (A7)
loopback mode is proposed. We develop this technique with 1
b3,I = 3 [4Aout,3rd_ITX |cos(dd,3rd_ITX dd )|
both production test and in-field performance measurement in A
mind and avoid any assumption on the knowledge of BIST 20 Aout,5th_ITX |cos(dd,5th_ITX dd )|] (A8)
circuit parameters. The targeted parameters can be measured 1
b5,I = 5 (16 Aout,5th_ITX )|cos(dd,5th_ITX dd )|
using two frames with test signals that can easily be generated A
by the baseband processor. The computation is done using tan(dd,5th_ITX dd ). (A9)


 2  2
3 5 3 5
Aout,1st_ITX = b1,R A + b3,R A3 + b5,R A5 + b1,I A + b3,I A3 + b5,I A5 (A1)
4 8 4 8

 2  2
1 5 1 5
Aout,3rd_ITX = b3,R A3 + b5,R A5 + b3,I A3 + b5,I A5 (A2)
4 16 4 16

 2  2
1 1
Aout,5th_ITX = b5,R A5 + b5,I A5 (A3)
16 16
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12 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

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JEONG et al.: BIST AND DIGITAL CALIBRATION OF ZERO-IF RF TRANSCEIVERS 13

Jae Woong Jeong (S14) received the B.S. and Jennifer N. Kitchen (S02M07) received the
M.S. degrees in electronics engineering from Sogang Ph.D. degree in electrical engineering from Arizona
Univeristy, Seoul, Korea, in 2003 and 2005, respec- State University (ASU), Tempe, AZ, USA,
tively. He is currently pursuing the Ph.D. degree in in 2007.
electrical engineering with Arizona State University, She specialized in efficiency enhancement and
Tempe, AZ, USA. linearization techniques for radio frequency (RF)
He was with Samsung Electronics, Suwon, power amplifiers in wireless transmitters with
Korea, as a Radio Frequency (RF) Engineer, from ASU. While at ASU from 2003 to 2006, she was
2005 to 2009, where he was involved in RF circuit with the RF Power Amplifier Handset Product
design and Electrostatic discharge simulation. His Group, Motorola, Inc., Schaumburg, IL, USA,
current research interests include built-in self-test for and Freescale Semiconductor, Austin, TX, USA.
RF/analog integrated circuit and RF/analog circuit design. In 2007, she became the Arizona Design Center Manager with Ubidyne, Inc.,
Phoenix, AZ, USA, a startup company that aims to revolutionize wireless
base stations by producing a digital antenna-embedded radio solution.
In 2009, she joined ViaSat, Inc., Carlsbad, CA, USA, as the Head of the
Integrated Circuit (IC) Design Team with the Advanced Microwave Product
Group. Her group focused on designing low-power integrated transceivers
for SATCOM, among other chipsets for military applications. She joined
ASU as an Assistant Professor in 2012. Her current research interests include
RF IC design for wireless communications and efficiency-enhancement of
power management and RF power amplifier circuits using IIIV materials.

Sule Ozev (S96M02) received the Ph.D. degree

from the Department of Computer Science and
Engineering, University of California at San Diego,
La Jolla, CA, USA, in 2002.
Afsaneh Nassery received the B.S. degree in elec- She was an Assistant Professor with the Depart-
trical engineering from Tehran University, Tehran, ment of Electrical and Computer Engineering, Duke
Iran, in 2008, and the M.S. and Ph.D. degrees University, Durham, NC, USA, from 2002 to 2008.
in electrical and computer engineering from Since 2008, she has been an Associate Professor
Arizona State University, Tempe, AZ, USA, with the School of Electrical, Computer, and Energy
in 2010 and 2013, respectively. Engineering, Arizona State University, Tempe,
She is currently with Qualcomm Technologies AZ, USA. Her current research interests include
Inc., San Diego, CA, USA. Her current research system-level testing and characterization of radio frequency (RF)/analog
interests include system-level testing and charac- circuit, testing cost reduction for RF circuits, and RF/analog circuit design.
terization of radio frequency (RF)/analog circuits, Dr. Ozev has been involved in the organization of many workshops
testing cost reduction for RF circuits, and RF/analog and conferences, including the IEEE International Conference on Computer
circuit design. Design and the IEEE VLSI Test Symposium.