iCEZUM Clock

12Mhz

FPGA I2C
ADC
Serial
USB iCE40HX1K ADS7924

Power FTDI SPI

GND
Serial Pin
Analog Pin
Control 6-17V Depending
on current drawn
Physical Pin
GND
95 1_62
96 1_63
VIN 2.1mm
Absolute MAX per pin 8mA
97 1_64
recommended 6mA 98 1_65
99 1_66
FPGA Direct GPIO (3V3) 101 1_67
102 1_68
104 1_69
2_24 37 38 2_25

0
1
2
3
4
5
6
7
2_26 39 41 2_27 USB_5V
2_28 42 43 2_29

SW1
RST CLK 2_36 49 50 2_35 CLK CLE 10 3_4B
1V2

38 37
41 39
PWR

11 3_5A
5V

SW2 1_59 SCL

SCL SDA
91
RST Reset POWER BUTTON
1_58 SDA
Rev 1.0

90
CLK Clock

AR
AREF
1V2

38 37
41 39
43 42
50 39
PWR

CLE Clock Enable

3V3

GND
G 13 12 11 10 9
5V

NC
0_96
13 12 11 10 9

144
5V
5V R 3V3 5VP

RESET
143 0_95
142 0_94
3V3
3V3X

141 0_93
5V_P

5V 139 0_92
GND

External Analog Reference

0_91
GND

138
8
8

GND
S
V
G

The input voltage to the board when

0_02
G
V
S
PWR

it is running from external power. VIN 112

7

7
D0 D1 D2 D3 D4 D5

Not USB bus power.

PWR 113 0_03
6

1_02 78 114 0_04

D0 D1 D2 D3 D4 D5

5
IceZUM

1_03 79 115 0_05

4

1_04 80 116 0_06

3

1_05 81 117 0_07

2

2
A3
A2
A1
A0

1_07 88 118 0_08

1

1
S

1_06 87 RESET 5V REF AR 119 0_09

0

0
V

ADC Interrupt 1_60

G

93
5V Tolerant Pins 5V Tolerant Pins
RESET BUTTON
Clock 12Mhz 21 3_00
IceZUM

Connected to ADS7924 via I2C

IceZUM

SCK 70 S_00
D3 D4 D5

A2 A1
3

CH2 CH1
MOSI 68 S_01
A3 A0
2

CH3 CH0
A1
A0

MISO 67 S_02
A3
A2
A1
A0

FTDI
1

SS 71 S_02 5V
S

5V REF AR
0

DONE 65 CDONE RESET 5V REF

V

REST 66 CREST
G

Analog Reference
RX 9 3_08
TX 8 3_07
RTS 7 3_06
FTDI CTS 4 3_05 SIGN SIGN
DTR 3 3_04 5V 5V
DSR 2 3_03 GND GND
DCD 1 3_02 Max 3A for all power supply pins
05 MAY 2016
ver 1 rev 1
 1 2 3 4 5 6 7 8

A IceZUM A

Core HX1K Revision History

2016-02-18: Initial release, Rev1.0 (Date code 1607)

GPIO 3.3V (x8)

12 MHz

Level Arduino Sockets

Translators (5V GPIO)
Serial

B FPGA B
USB FTDI User LEDs (x8)
iCE40HX1K
SPI
User Switches (x2)

Config.
I2C
Memory 12bit, 4-Channel ADC

[1]_FPGA.SchDoc [2]_USB_Interface.SchDoc
Power Switch [1]_FPGA.SchDoc [2]_USB_Interface.SchDoc

C 5V C
5V Peripherals
DC Socket DC/DC 5V-3A
6 - 17V, 3A
[3]_Connectors_&_IO.SchDoc [4]_Power_Supply.SchDoc
[3]_Connectors_&_IO.SchDoc [4]_Power_Supply.SchDoc
3.3V
LDO

USB 5V (500 mA)

1.2V
LDO
FD1 FD2 FD3

Fiducial Fiducial Fiducial

3.3V Ext

D
LDO D

Title
Top Sheet
Project
*
Author
Eladio Delgado
Size: A3 Number: Revision: 0

Date: 21-Mar-17 Time: 8:16:59 PM Sheet 0 of 5

Mundo Reader, S.L. This project and all the sheets and layouts enclosed are licensed under Creative Commons by Attribution and Share Alike [CC BY-SA] (www.creativecommons.com)

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+3V3 +3V3
U1A U1C
133 112 46 37
VCCIO_0 IOT_73 FPGA_112 3 VCCIO_2 IOB_24 FPGA_37 3
123 113 57 38
C1 C2 VCCIO_0 IOT_74 FPGA_113 3
C3 C4 VCCIO_2 IOB_25 FPGA_38 3
114 39
A X7R X7R IOT_75 FPGA_114 3
X7R X7R IOB_26 FPGA_39 3
A
115 41
16V 16V IOT_76 FPGA_115 3
16V 16V BANK 2 IOB_27 FPGA_41 3
116 42
100nF 100nF IOT_77 FPGA_116 3
100nF 100nF IOB_28 FPGA_42 3
117 43
BANK 0 IOT_78 FPGA_117 3 IOB_29 FPGA_43 3
118 55 44
IOT_79 FPGA_118 3 NC IOB_30
119 +3V3 45
IOT_80 FPGA_119 3 IOB_31
120 63 47
IOT_81 IOB_42_CBSEL0 IOB_32
121 R1 64 48
IOT_82 IOB_43_CBSEL1 IOB_33
110 122 10k 5% 0.063W 52
NC IOT_83 IOB_34
124 134 65 56
NC IOT_87 2 iCE_CDONE CDONE IOB_37
125 135 R2 66 58
NC IOT_88 2 iCE_CREST CRESET_B IOB_38
130 136 470R 5% 0.063W 60
NC IOT_89 IOB_39
131 137 +3V3 50 61
NC IOT_90 IOB_36_GBIN4 IOB_40
138 49 62
IOT_91 FPGA_138 3 IOB_35_GBIN5 IOB_41
139 R3
IOT_92 FPGA_139 3
141 10k 5% 0.063W iCE40HX1K-TQ144
IOT_93 FPGA_141 3
142
IOT_94 FPGA_142 3 4 FPGA_RESET FPGA_49_GBIN5 3
129 143
IOT_85_GBIN0 IOT_95 FPGA_143 3 FPGA_50_GBIN4 3
128 144
IOT_84_GBIN1 IOT_96 FPGA_144 3

iCE40HX1K-TQ144

+3V3
+3V3 U1D
U1B 6 1
VCCIO_3 IOL_1A FT_DCD 2
89 78 30 2
VCCIO_1 IOR_52 FPGA_78 3
C5 C6 VCCIO_3 IOL_1B FT_DSR 2
100 79 3
C7 C8 VCCIO_1 IOR_53 FPGA_79 3
X7R X7R IOL_2A FT_DTR 2
80 4
B X7R X7R IOR_54 FPGA_80 3
16V 16V IOL_2B FT_CTS 2 B
81 7
16V 16V BANK 1 IOR_55 FPGA_81 3
100nF 100nF IOL_3A FT_RTS 2
87 8
100nF 100nF IOR_56 FPGA_87 3 IOL_3B FT_RX 2
82 88 9
NC IOR_57 FPGA_88 3 BANK 3 IOL_4A FT_TX 2
83 90 10
NC IOR_58 ADC_SDA 3 IOL_4B U_SW1 3
84 91 11
NC IOR_59 ADC_SCL 3 IOL_5A U_SW2 3
85 95 12
NC IOR_62 LED0 3 IOL_5B
96
IOR_63 LED1 3
75 97 19
IOR_50/TCK IOR_64 LED2 3 IOL_6A
73 98 22
IOR_48/TDI IOR_65 LED3 3 IOL_7B
76 99
IOR_51/TDO IOR_66 LED4 3
74 101 15 23
R4 IOR_49/TMS IOR_67 LED5 3 NC IOL_8A
77 102 16 24
NC IOR_68 LED6 3 NC IOL_8B
10k 5% 0.063W 104 17 25
IOR_69 LED7 3 NC IOL_9A
NL 105 18 26
IOR_70 NC IOL_9B
94 106 28
IOR_61_GBIN2 IOR_71 IOL_10A
93 107 29
3 ADC_INT IOR_60_GBIN3 IOR_72 IOL_10B
31
IOL_11A
iCE40HX1K-TQ144 32
IOL_11B
21 33
2 iCE_CLK IOL_7A_GBIN6 IOL_12A
20 34
IOL_6B_GBIN7 IOL_12B
iCE40HX1K-TQ144

C C
+3V3
U1F +3V3
109 D1
VPP_FAST 2 iCE_SCK
108
POWER VPP_2V5
2 iCE_MISO
MMDL101T1G C9

10k 5% 0.063W

10k 5% 0.063W

10k 5% 0.063W

10k 5% 0.063W
5 X7R
GND 2 iCE_MOSI
16V
13
GND R5 100nF R6 R7 R8
14 40
GND NC 2 iCE_SS_B
59 53
GND NC

8
69 54 U2
GND NC
86 126 +3V3
GND NC

VCC
103 127 U1E 6 1
GND NC SCK CS
132 72 70
GND VCC_SPI IOB_46_SCK
+1V2 140 68 2 7
GND IOB_45_SDI SDO HOLD
27 67
R9 VCC C10 SPI IOB_44_SDO
36 51 71 5 3

GND
VCCPLL VCC X7R IOB_47_SS_B SDI WP
100R 5% 0.063W 92
C11 C12 VCC 16V
35 111 iCE40HX1K-TQ144
X5R X7R GNDPLL VCC 100nF
+1V2 N25Q032A

4
16V 16V iCE40HX1K-TQ144
10uF 100nF

C13 C14 C15 C16

X7R X7R X7R X7R
D 16V 16V 16V 16V D
100nF 100nF 100nF 100nF
Title
FPGA
Project
*
Author
Eladio Delgado
Size: A3 Number: Revision: 0

Date: 21-Mar-17 Time: 8:19:33 PM Sheet 1 of 5

Mundo Reader, S.L. This project and all the sheets and layouts enclosed are licensed under Creative Commons by Attribution and Share Alike [CC BY-SA] (www.creativecommons.com)

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

A A

USB_5V +3V3 +1V8_FT

L1
BLM18SG121TN1D F1
10uH 0,1A
C17 C18 C19 C20 C21
C22 L2 C23 PTC_Fuse X5R X7R X7R X7R X7R
X7R X7R 16V 16V 16V 16V 16V
J1 25V 16V 4.7uF 100nF 100nF 100nF 100nF
USB_Micro_Type_B 10nF 100nF
+3V3 +3V3
S1
S3

L3
MPZ1608S221A
S5 C24 C25 C26 C27 C28 C29
X5R X7R X7R X7R X7R X7R
1 4 3 USB_N 16V 16V 16V 16V 16V 16V
5V D- D+ ID G

2 4.7uF 100nF 100nF 100nF 100nF 100nF

3 5 2
4
5 6 1 USB_P +3V3

S6 F2
U3

12
37
64

20
31
42
56
4
9
C30 FT2232H
B X7R 16 SPI_SK
B
ADBUS0

VPHY

VCCIO
VCCIO
VCCIO
VCCIO
VPLL

VCORE
VCORE
VCORE
iCE_SCK 1
S2
S4

16V 17 SPI_DO
100nF ADBUS1 iCE_MOSI 1
18 SPI_DI
ADBUS2 iCE_MISO 1
19
ADBUS3
+1V8_FT 50 21 GPIO_L0
VREGIN ADBUS4 iCE_SS_B 1
22
ADBUS5
49 23 GPIO_L2
C31 VREGOUT ADBUS6 iCE_CDONE 1
24 GPIO_L3
X5R ADBUS7 iCE_CREST 1
16V 26
4.7uF ACBUS0
27
ACBUS1
28
ACBUS2
USB_N 7 29
DM ACBUS3
USB_P 8 30
DP ACBUS4
32
ACBUS5
+3V3 33
ACBUS6
34
R10 ACBUS7
14
RESET
1k 5% 0.063W 38
BDBUS0 FT_TX 1
6 39
R11 REF BDBUS1 FT_RX 1
+3V3 40
BDBUS2 FT_RTS 1
+3V3 12k 1% 0.063W 41
BDBUS3 FT_CTS 1
43
BDBUS4 FT_DTR 1
FT_CS 63 44
C32 EECS BDBUS5 FT_DSR 1
FT_CLK 62 45
EECLK BDBUS6 FT_DCD 1
10k 5% 0.063W

10k 5% 0.063W

10k 5% 0.063W

X7R FT_DATA 61 46
R12

R13

R14

16V EEDATA BDBUS7

100nF 48
C BCBUS0 C
2 52
OSCI BCBUS1
+3V3 U4 53
BCBUS2
U5 1 4 54
STANDBY VDD BCBUS3
8 1 FT_CS 55
VCC CS BCBUS4
7 2 FT_CLK 2 3 57
C33 NC CLK GND OUTPUT BCBUS5
6 3 FT_DATA 3 58
X7R ORG DI OSCO BCBUS6
5 4 R15 DSC1001 59
16V VSS DO BCBUS7
2k2 5% 0.063W

AGND
100nF 93LC56C 13 60

GND
GND
GND
GND
GND
GND
GND
GND
R16 TEST PWREN
36
1 iCE_CLK SUSPEND
0R 5% 0.063W

10

1
5
11
15
25
35
47
51
D D

Title
USB
Project
*
Author
Eladio Delgado
Size: A3 Number: Revision: 0

Date: 21-Mar-17 Time: 8:21:08 PM Sheet 2 of 5

Mundo Reader, S.L. This project and all the sheets and layouts enclosed are licensed under Creative Commons by Attribution and Share Alike [CC BY-SA] (www.creativecommons.com)

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

J4
1x8 Socket Header 2.54mm

J5 DD5

1x10 Socket Header 2.54mm

+5V 10
DD4 +3V3 +5V
1 9
AREF +5V C47 C48
2 SYS_RESET 4 8
J6 AREF
3 7
4 +3V3_AUX 6 D13
6 C41 X7R X7R

4k7 5% 0.063W

4k7 5% 0.063W
+3V3

3
D12 16V 16V

R22

R23
5 5 5
D11 JP1 16V X5R 100nF 100nF
6 +5V_P 4 4 4.7uF
Jumper_3pin C45

2
D10
A 7 3 3 A
D9 C46 U8 TXS0108
8 Power 2 2 R19
D8 16V X7R 2 19
1 1 VCCA VCCB
10R 5% 0.063W 16V X7R 100nF

10k 5% 0.063W

10k 5% 0.063W
1x6 pin Header 2.54mm 100nF 10

R20

R21
JPM1 OE
1 20
A1 B1
U7 ADS7924 3 18
A2 B2
1x6 Socket Header 2.54mm

1x8 Socket Header 2.54mm

J9 J10 15 16 4 17 DD5
AVDD DVDD 1 FPGA_87 A3 B3
D7 Jumper_1x2_Mech 1 5 16 DD4
8 8 RESET 1 FPGA_88 A4 B4

GND & TP
J11 J12 D6 14 6 15 DD3
7 7 ADCIN 1 FPGA_81 A5 B5
DD0 D5 13 3 7 14 DD2
1 1 6 6 MUXOUT SCLK ADC_SCL 1 1 FPGA_80 A6 B6
DD1 D4 J17 4 8 13 DD1
2 2 5 5 SDA ADC_SDA 1 1 FPGA_79 A7 B7
DD2 D3 A0 12 9 12 DD0
3 3 4 4 1 CH0 1 FPGA_78 A8 B8
DD3 D2 A1 11 2
4 4 3 3 2 CH1 INT ADC_INT 1
DD4 D1 A2 10 7
5 5 2 2 3 CH2 PWRCON

11
DD5 D0 A3 9 5
6 6 1 1 4 CH3 A0
1x6 pin Header 2.54mm 1x8 pin Header 2.54mm 1x4 pin Header 2.54mm 8 6
AGND & TP DGND

+3V3 +5V
Arduino Sockets & Replicating Headers C36 C37

X7R X7R
16V 16V
4-Channel I2C ADC

15
2
100nF U6 100nF
+5V_P 1 16 D13
A1 B1

VCCA

VCCB
1 FPGA_144
3 14 D12
B 1 FPGA_143 A2 B2 B
J2 J3 4 13 D11
1 FPGA_142 A3 B3
5 12 D10
1 1 1 FPGA_141 A4 B4
6 11 D9 C38 C39
2 2 1 FPGA_139 A5 B5
7 10

GND
D8 100pF 100pF
3 3 D2 1 FPGA_138 A6 B6

OE
4 4 C40
R17A Yellow 16V 16V
5 5 1 LED0 100pF X7R X7R
270R 0,5% 0,0625W +3V3 TXB0106
6 6

9
16V
1x6 pin Header 2.54mm 1x6 pin Header 2.54mm D3 X7R
C42 C43 C44
R17B Yellow
1 LED1 100pF 100pF 100pF
J7 J8 270R 0,5% 0,0625W
16V 16V 16V
1 1 D4 X7R X7R X7R
2 2 R17C Yellow
3 3 1 LED2
4 4 270R 0,5% 0,0625W
5 5 D5 +3V3 +5V
6 6 R17D Yellow
7 7 1 LED3 C49 C50
8 8 270R 0,5% 0,0625W
X7R X7R
1x8 pin Header 2.54mm 1x8 pin Header 2.54mm D6 16V 16V
R18A Yellow
1 LED4 100nF 100nF
J13 J14 270R 0,5% 0,0625W
U9 TXB0108
1 1 D7 2 19
2 2 R18B Yellow VCCA VCCB
3 3 1 LED5
270R 0,5% 0,0625W 10
4 4 OE
C 1 20 D7 C
5 5 D8 1 FPGA_112 A1 B1
3 18 D6
6 6 R18C Yellow 1 FPGA_113 A2 B2
4 17 D5
1 LED6 1 FPGA_114 A3 B3
1x6 pin Header 2.54mm 1x6 pin Header 2.54mm 270R 0,5% 0,0625W 5 16 D4
1 FPGA_115 A4 B4

GND & TP
6 15 D3
D9 1 FPGA_116 A5 B5
J15 J16 7 14 D2
R18D Yellow 1 FPGA_117 A6 B6
8 13 D1 C51 C52 C53
1 1 1 LED7 1 FPGA_118 A7 B7
270R 0,5% 0,0625W 9 12 D0 100pF 100pF 100pF
2 2 1 FPGA_119 A8 B8
3 3 C54
100pF 16V 16V 16V
4 4 X7R X7R X7R

11
1x4 pin Header 2.54mm 1x4 pin Header 2.54mm 16V
X7R
C55 C56 C57 C58
100pF 100pF 100pF 100pF
16V 16V 16V 16V
SW1 X7R X7R X7R X7R
Power Headers 1 U_SW1
Switch

SW2
1 U_SW2
Switch
C34 C35
1 FPGA_37
J19
1 2 FPGA_38 1
X7R X7R Level Translators for FPGA to Arduino GPIO
16V 16V
1 FPGA_39 3 4 FPGA_41 1
100nF 100nF
1 FPGA_42 5 6 FPGA_43 1
D 1 FPGA_49_GBIN5 7 8 FPGA_50_GBIN4 1 D

2x4 pin Header 2.54mm Title

Connectors & IO
Project
*
FPGA Direct GPIO (3V3) User Switches & LEDs Author
Eladio Delgado
Size: A3 Number: Revision: 0

Date: 21-Mar-17 Time: 8:21:43 PM Sheet 3 of 5

Mundo Reader, S.L. This project and all the sheets and layouts enclosed are licensed under Creative Commons by Attribution and Share Alike [CC BY-SA] (www.creativecommons.com)

1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

+5V
+3V3
DC Power Input: U10 AP7361 TP2
Voltage: 6 - 17V 8 1
IN OUT1
Current: 3A 7 2
A NC NC C59 A
Q1 Q2 Power USB_5V Q3 +5V 6 3
NC ADJ/NC X5R
DMP3017 DMP3017 TP6 TP7 DMP2035U-7 FPGA_PWR_EN 5 4
EN GND 16V
J18 1 R38 4.7uF
4, 5, 6 1, 2 1, 2 4, 5, 6
2
10k 5% 0.063W
3
Power_Jack

3
D10 C60
SMAJ17CA X7R
25V
1k 5% 0.063W 100nF R28
C62
R25 R24
Q5 10k 5% 0.063W 3.3V Rail, 700 mA Max.

BZX384C5V1-E3
47k 5% 0.063W

100k 5% 0.063W

100k 5% 0.063W
X7R PMBT3906

1k 5% 0.063W
25V
D13
R26 100nF R27 R39 R29
47k 5% 0.063W

PWR Switch operation: 5V_P_CTL

+5V
Board powered from JACK: FPGA_PWR_EN

1
It switchesON/OFF entire board +1V2 +3V3_AUX
D11 R30 U11 TLV711 TP3 TP4
BAT54C-G3-08
100k 5% 0.063W 1 6 (3V3X)
B Board powered from USB: 2
EN1 OUT1
5 B
IN OUT2

3
It switchesON/OFF peripheralspower R31 3 4
Logic alwaysON OFF 1 SW3
EN2 GND C64 C65
100k 5% 0.063W
2 X5R X5R
3 R32 FPGA_PWR_EN 16V 16V
Board powered from JACK & USB: ON SPDT Switch 4.7uF 4.7uF
Switch OFF: Logic ON / PeripheralsOFF, 0R 5% 0.063W
logic powered from USB PWR Switch NL

Switch ON: Logic ON / PeripheralsON,

entire board powered from JACK

Power Inputs Control and Protections 1.2V Rail (200 mA) and External 3.3V Rail (200 mA)

C C
Power U12 TPS62133RGTR +5V +5V_P +5V
13 4 TP1 Q4 TP5
EN PG
DMP3017 Current measured for max
L4
11 1 desired luminosity: 0.48 mA.
PVIN SW L5 R33 R34
BLM18SG121TN1D 12 2 FPGA_PWR_EN
Vf @ 0.48 mA = 2.6V
PVIN SW SW4 5k6 5% 0.063W
C66 3
1, 2 4, 5, 6
SW 2,2uH 4,7A 0R 5% 0.063W
220k 5% 0.063W

X7R C67 C68 C69

SYS_RESET 3 Current measured for min
25V X7R 10 14 X7R X5R Switch
AVIN VOS desired luminosity: 0.25 mA.
3

100nF 25V 7 16V 10V R36 R35

FSW FPGA_RESET 1 Vf @ 0.25 mA = 2.56V
10uF C70 100nF 22uF D12
0R 5% 0.063W
X7R 9 8 GND White
25V
SS/TR DEF
5 NL R=5 to 9K6
FB
100nF
AGND

10k 5% 0.063W
PGND
PGND

C71
C0G
25V R37
620pF
15
16
6

5V_P_CTL RESET Power LED

5V, 3A Power Supply

D D

Title
Power Supply
Project
*
Author
Eladio Delgado
Size: A3 Number: Revision: 0

Date: 21-Mar-17 Time: 8:22:17 PM Sheet 4 of 5

Mundo Reader, S.L. This project and all the sheets and layouts enclosed are licensed under Creative Commons by Attribution and Share Alike [CC BY-SA] (www.creativecommons.com)

1 2 3 4 5 6 7 8