Transients Restrikes

Transient Analysis: Prevention of Circuit Breaker Restrikes
Aditya Upadhye and Mohamed El-Sharkawi

Introduction:
The NEPTUNE power system is a large scale, 10 kV direct current network of cables,
power supplies, circuit breakers, converters, loads and control equipment. Because of the
highly reactive nature of NEPTUNE cables, and the need to interrupt the dc currents in
the backbone system as well as the branches, it is very important to perform transient
analyses of the system to identify excessive overvoltages, overcurrents and high
frequency transients. These analyses help design the various components of the circuit
breaker and verify the robustness of the system.
The selected transient simulator for NEPTUNE project is the Alternative Transients
Program (ATP). The ATP is based on the Electromagnetic Transient Program (EMTP)
used by industry for transient simulations. The ATP has extensive modeling capabilities
for lines, cables, breakers, loads, converters, protection devices, non-linear elements,
electromagnetic coupling, and major power electronics devices and equipment. The ATP
has an enhanced graphical interface called ATPDraw that allows for easy entry of system
topology and data. For additional information on the ATP, please visit the EMTP web site
at www.emtp.org.
In this paper, the modeling of cables in ATP is explained in brief. This is followed by the
explanation of what restrikes are and how they occur. The modeling of restrikes in ATP is
explained. It is shown how the proper choice of node capacitor and vacuum switch
prevents these restrikes from occurring.
1
Cable Modeling
The ATP has supporting routines to compute cables parameters based on the various
dimensions of the cable and its materials. The model can account for arbitrary shaped
cables, snaking of cables, etc. The user can select any of the several models for cables
such as lumped or distributed parameters; frequency independent or frequency dependent
models [1, 2]. The choice of cable model is dependent on a number of factors such as the
length of the cable, the nature of the simulation (fault, surges, etc) and the fidelity of the
results. The following are the various options for cable models:
1) Bergeron: Distributed, but frequency dependent parameter model.
2) PI: Nominal PI-equivalent model with lumped parameters which is suitable for short
lines.
3) Noda: Frequency dependent model. This algorithm models the frequency dependent
transmission lines and cables in the phase domain.
4) Semlyen: Frequency dependent simple fitted model. Semlyen model was one of the
first frequency dependent line models. It may give inaccurate or unstable solutions at
high frequency oscillations.
5) JMarti: Frequency dependent model with constant transformation matrix that is
suitable for simulating traveling wave phenomena in long cables. The JMarti model
is the selected model for NEPTUNE power system, since it is fast and most reliable
algorithm developed for accurate modeling of transmission lines over a wide
frequency range. The routine is robust as compared to earlier algorithms such as the
Semlyen model.
The ALCATEL OALC-4 Type 31 cable is used in the simulation. The data of the cable,
which is provided by ALCATEL, is shown in Figure 1. The cable has a steel tube at its
core containing 6 to 12 optical fibers. The steel tube is surrounded by two layers of high
strength steel wires enclosed within a thin copper sheath. The insulation of the outer layer
is made of polyethylene material.
Optical Fibers
Unit Fiber
Structure
16 Ultra-High Strength
Steel Wires:
8 wires 1.50mm diameter
8 wires 1.13mm diameter
Copper
Sheath
Steel Tube
8 Ultra-High Strength
Steel Wires
1.59mm diameter
Elastomeric waterblocking material in
steel interstices
Medium Density
Polyethylene Insulation
OD 17mm
Figure 1: ALCATEL Type 31 cable

2
Restrikes of Circuit Breaker
Restrike is a phenomenon that may occur during the opening of circuit breakers. As the
breakers electrodes separate, the dielectric medium of the circuit breaker starts to regain
its strength. The withstanding voltage of the breaker is the maximum voltage that the
breaker can withstand across its 2 terminals, without arcing. When the breaker opens its
withstanding voltage increases at a near-linear rate. At the same time, the voltage across
the contacts builds up in accordance with the nature of the switching event and the
system characteristics. If the voltage buildup exceeds the regained withstand voltage at
any instance, an interelectrode breakdown occurs, and arc current is produced, this is
known as restrike.
Figure 2 illustrates the restrike phenomenon. The withstanding voltage is assumed to be
linearly increasing to the insulation level of the breaker. In case 1, the contacts voltage
buildup never exceed the withstanding voltage of the breaker, thus restrike does not
occur. In case 2, the voltage buildup exceeds the withstanding voltage at time ts, and
restrike occurs. In the event of restrikes, excessive overvoltage and high dv/dt is
produced. These transients can potentially be damaging to loads, cable and equipment.
Withstanding Voltage
Voltage
Restrike
Contacts Voltage
Case 1
Contacts Voltage
Case 2
ts
Time
Figure 2: Restrikes of Circuit Breaker.

To eliminate restrikes, the dc breaker configuration in Figure 3 is proposed. The full
description of the breaker configuration and operation is given in a separate document.
The selection of the breakers components should be made to ensure that the withstanding
voltage is always higher than the voltage buildup of the breaker. Two components in this
circuit must be carefully selected to prevent restrikes: the vacuum interrupter (S3), which
is the first switch to open; and the bypass capacitor (C). The bypass capacitor controls the
voltage across the vacuum interrupter during the opening process. The vacuum
interrupter must be selected as fast as possible to allow for rapid recovery of its
withstanding voltage. Faster switches demand smaller bypass capacitors.
S3
S2
R1
S1
Rd
S4
Figure 3: DC Breaker
3
Modeling of Restrikes
There are 2 methods by which restrikes can be modeled:

1. Using the MODELS feature of the ATP. MODELS is a general-purpose description
language supported by an extensive set of simulation tools. It allows the use of freeformat, keyword-driven syntax. It also allows the description of arbitrary userdefined control and circuit components. As a general-purpose programmable tool,
MODELS can be used for processing simulation results either in the frequency
domain or in the time domain.
In this study, restrike is modeled by a voltage dependent switch. After the main
interrupter (S3) is opened, the voltage across the capacitor is observed. If the
capacitor voltage exceeds the withstanding voltage of the interrupter, S3 is closed
representing the occurrence of a restrike. The withstanding voltage is modeled as a
ramp function with its slope equal to the maximum withstanding voltage divided by
the travel time of the interrupter.
2. An alternative simulation for restrikes is to model the arc resistance as a non-linear
element. This can be implemented using the Transient Analysis of Control Systems
(TACS) Module. TACS is suitable for simulating several complex systems such as
HVDC converter controls, excitation systems of synchronous machines, power
electronics and drives, and electric arcs (circuit breaker and fault arcs). The electrical
network and TACS can exchange signals such as node voltage, switch current, switch
status, time-varying resistance, voltage, and current sources. To model an open
switch, the TACS resistance is set to infinite value. To model a closed switch, the
TACS resistance is set to zero. When the voltage across the capacitor exceeds the
withstanding voltage at any moment after opening the breaker, the TACS resistor will
have a value depending on the arc dynamics [5] as follows:
dg
1
(G g )
dt
and
G
iarc
(u 0 R iarc )l
Where:
iarc: arc current
g: dynamic arc conductance.
G: static arc conductance
: arc time constant
l: time-dependant arc length.
u0: constant percentage of static arc characteristic.
Modeling these arc dynamics will be explored in future transient simulations.
However, if the objective is to identify the presence of an arc rather than arc
dynamics, the first method should be adequate.
4
Selection of Capacitor and Vacuum Interrupter
The prevention of restrikes depends on 3 parameters: 1) the capacitor size, 2) the speed of
the vacuum interrupter (travel time), and 3) the maximum withstanding voltage of the
vacuum interrupter.
If the capacitor value is sufficiently large, its voltage buildup may not be fast enough to
exceed the withstanding voltage of the vacuum interrupter. Thus, restrikes can be
prevented. However, a large capacitor will have a bigger physical size and higher cost,
which are limiting factors.
The maximum withstanding voltage and travel time of the vacuum interrupter determines
the slope with which the withstanding voltage increases. If the slope is shallow with
respect to the voltage buildup of the capacitor, restrikes will occur.
S3
S2
20km
R1
R2
S4
S1
V
d
c
20km
Z2
Z11
Figure 4: Simulation circuit

To determine the proper value of the capacitance, a preliminary study is carried out based
on the circuit in Figure 4. The chosen cable section is 20 km in length at each side of the
breaker. Although the length between the nodes may exceed these values, the 20 km cable
should provide a rapid voltage buildup across the capacitor; hence the possibility of
restrikes is greater. The various resistances are selected so that the cable current is about
10A.
Table 1 shows the summary of the initial simulations. The various speeds and maximum
withstanding voltages are selected based on the market availability of vacuum
interrupters. The table also shows the minimum capacitance that prevents restrikes.
The simulations are made for successive integer values of capacitance, starting from an
arbitrary low value. The minimum capacitance that did not produce a restrike, is given in
the table.
Maximum Voltage
across switch
15 kV
15 kV
15 kV
25 kV
25 kV
25 kV
Table 1: Restrike studies

Travel Time of switch Minimum value of capacitor
to prevent restrikes...
5 ms
10ms
18 ms
15 ms
18 ms
20 ms
2 F
5 F
9 F
4 F
5 F
6 F
Capacitor Current (A)
2
1
Figure 5: Current through capacitors with restrikes when C=4 F

Voltage across Switch (V)
Figure 6: Voltage across switch for C=4 F
Capacitor Current (A)
Figure 7: Capacitor current without restrikes when C=5 F

Figures 5 and 6 show the capacitor current and the voltage across the breaker,
respectively. In this simulation, the vacuum switch is assumed to have a maximum
withstanding voltage of 25 kV and a traveling time of 20 ms. The figures are for a bypass
capacitor of 4 F.
As seen in Figure 5, at 800 ms when switch S3 is opened (point 1), a restrike occurred.
After 10 ms, the arc is assumed extinguished and the breaker opened again at point 2.
Between the time instants 1 and 2, the capacitor current oscillates at high frequencies.
Voltage across Switch (kV)
Figure 8: Voltage across switch for C=5 F

The second case shown in Figures 7 and 8 are for a larger capacitance (5 F). As seen in
the figures, no restrikes occur and the opening of the capacitor is successful.
References:
[1] Meyer, W.S.; Liu, T.-H
Alternative Transients Program (ATP) Rule Book, Canadian/American EMTP User
Group, 1987-2000 (distributed by EEUG).
[2] Prikler, L.; Hoidalen H.K.
ATPDraw Users Manual, 1998 (distributed by EEUG)
[3] Marti, J.R.
Accurate Modeling of frequency-dependant transmission lines in electromagnetic
transient simulations, IEEE Transactions on PAS, Vol. PAS 101, No.1, pp147-155,
Jan 1982
[4] Report on DC Circuit Breaker by Mohamed El-Sharkawi and Aditya Upadhye.
[5] Kizilcay, M.; Pniok, T.
Digital Simulation of Fault Arcs in Power Systems, ETEP Vol.1, No.1,
January/February 1991.

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Transient Analysis: Prevention of Circuit Breaker Restrikes

Aditya Upadhye and Mohamed El-Sharkawi

Figure 1: ALCATEL Type 31 cable

Restrikes of Circuit Breaker

Figure 2: Restrikes of Circuit Breaker.

There are 2 methods by which restrikes can be modeled:

Selection of Capacitor and Vacuum Interrupter

Figure 4: Simulation circuit

Table 1: Restrike studies

Capacitor Current (A)

Figure 5: Current through capacitors with restrikes when C=4 F

Figure 6: Voltage across switch for C=4 F

Capacitor Current (A)

Figure 7: Capacitor current without restrikes when C=5 F

Voltage across Switch (kV)

Figure 8: Voltage across switch for C=5 F

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