Ananth Shetty K R Mobile No: 8105010222 Objective

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ANANTH SHETTY K R

Email: [email protected]
Mobile No: 8105010222

Objective
To become a more challenging full custom layout design engineer proficient in effective floor plan and optimized layout
designs in future technologies.
Profile Summary

Knowledge of Layout development and Verification (DRC,LVS& Parasitic Extraction)

Working experience on IC Studio from Mentor Graphics: Pyxis - Schematic and Layout Editor, Calibre -DRC
and LVS Checks.

Basic Understanding of an ASIC flow from RTL design to Tape-out of the chip

Good understanding of Full Custom Design flow from circuit design to physical verification of the design

Beginner level knowledge in Scripting capabilities in Perl

Exposure to Shell Scripting and Linux operating system

Good exposure to technology by undergoing additional training in VLSI

Good understanding of fundamentals of Transistors and CMOS device operation

Good knowledge of Digital Design Concepts

Strong analytical capabilities and ability to work with a broader team


Tools Used

Mentor Graphics - IC studio

Pyxis Editor (for layout and schematics)

Calibre RVE (for DRC and LVS)

Education Profile

M.Tech - Industrial Electronics from SJCE, Mysore, Affiliated to VTU, 2015, with 8.48 CGPA (77.3%)

B.E Electronics and Communication Engineering (under VTU) from KLEIT, Hubli, 2012, with aggregate of
70.12%

Senior Secondary Class 12 (PUC II), Fatima Composite PU College, Hubli, 2008, with aggregate of 78%

Class 10 (SSLC), Saint Andrews English Medium High School, Hubli, 2006, with aggregate of 82.24%
Academic Projects

M.Tech Project - A robust algorithm for text detection in complicated background images

Platform - Matlab

Description - In this project, a new algorithm is to be proposed to detect texts of varying orientations under different
kinds of backgrounds.

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