e

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microID™ 125 kHz RFID

System Design Guide
INCLUDES:
• Passive RFID Basics Application Note
• MCRF200 Data Sheet
• MCRF250 Data Sheet
• Contact Programming Support
• RFID Coil Design
• FSK Reader Reference Design
• PSK Reader Reference Design
• ASK Reader Reference Design
• FSK Anti-Collision Reader Reference Design
• Using the microID Programmer
 1998 Microchip Technology Inc. December 1998 /DS51115E

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December 1998 /DS51115E  1998 Microchip Technology Inc.

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DATA SHEET MARKINGS
Microchip uses various data sheet markings to designate each document phase as it relates to the product development
stage. The markings appear at the bottom of the data sheet, between the copyright and document and page numbers.
The definitions for each marking are provided below for your use.
Marking Description
Advance Information The information is on products in the design phase. Your designs should not be
finalized with this information as revised information will be published when the
product becomes available.
Preliminary This is preliminary information on new products in production but not yet fully
characterized. The specifications in these data sheets are subject to change with-
out notice. Before you finalize your design, please ensure that you have the most
current revision of the data sheet by contacting your Microchip sales office.
No Marking Information contained in the data sheet is on products in full production.
“All rights reserved. Copyright © 1998, Microchip Technology Trademarks

Incorporated, USA. Information contained in this publication
regarding device applications and the like is intended through The Microchip name, logo, KEELOQ, and PICmicro are
suggestion only and may be superseded by updates. No rep- registered rademarks of Microchip Technology Incorporated in
resentation or warranty is given and no liability is assumed by the U.S.A.
Microchip Technology Incorporated with respect to the accu-
racy or use of such information, or infringement of patents or microID and RFLAB are a trademarks of Microchip
other intellectual property rights arising from such use or oth- Technology Inc.
erwise. Use of Microchip’s products as critical components in
life support systems is not authorized except with express All other trademarks mentioned herein are property of their
written approval by Microchip. No licenses are conveyed, respective companies.
implicitly or otherwise, under any intellectual property rights.
The Microchip logo and name are registered trademarks of
Microchip Technology Inc. in the U.S.A. and other countries.
All rights reserved. All other trademarks mentioned herein are
the property of their respective companies. No licenses are
conveyed, implicitly or otherwise, under any intellectual prop-
erty rights.”
 1998 Microchip Technology Inc. December 1998 /DS51115E

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December 1998 /DS51115E  1998 Microchip Technology Inc.

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Table of Contents
PAGE
AN680 PASSIVE RFID BASICS
Introduction ........................................................................................................................................ 1
Definitions .......................................................................................................................................... 1
Reader ........................................................................................................................................ 1
Tag ............................................................................................................................................. 1
Carrier ........................................................................................................................................ 1
Modulation .................................................................................................................................. 1
System Handshake ........................................................................................................................... 2
Backscatter Modulation ..................................................................................................................... 2
Data Encoding ................................................................................................................................... 3
Data Modulation ................................................................................................................................ 4
Anticollision ....................................................................................................................................... 5
MCRF200 DATA SHEET

Features ............................................................................................................................................ 7
Application ......................................................................................................................................... 7
Package Type ................................................................................................................................... 7
Description ........................................................................................................................................ 7
Block Diagram ................................................................................................................................... 7
1.0 Electrical Characteristics ............................................................................................................ 8
1.1 Maximum Ratings ................................................................................................................ 8
2.0 Functional Description ................................................................................................................ 9
2.1 Rectifier – AC Clamp ........................................................................................................... 9
2.2 Coil Load Modulation ........................................................................................................... 9
2.3 VDD Regulator ..................................................................................................................... 9
2.4 VPP Regulator ..................................................................................................................... 9
2.5 Clock Generator .................................................................................................................. 9
2.6 IRQ Detector ....................................................................................................................... 9
2.7 Power-On Reset .................................................................................................................. 9
2.8 Modulation Logic ................................................................................................................. 9
3.0 Configuration Logic Control Bit Register .................................................................................. 10
3.1 Organization ...................................................................................................................... 10
3.2 Baud Rate Timing .............................................................................................................. 10
3.3 Column and Row Decoder Logic and Bit Counter ............................................................. 10
4.0 Modes of Operation .................................................................................................................. 12
4.1 Native Mode ...................................................................................................................... 12
4.2 Read Mode ........................................................................................................................ 12
microID™ Design Guide Product Identification System .................................................................. 13
 1998 Microchip Technology Inc. DS51115E-page v

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Table of Contents (Continued)
PAGE
MCRF250 DATA SHEET
Features .......................................................................................................................................... 15
Description ...................................................................................................................................... 15
Application ....................................................................................................................................... 15
Block Diagram ................................................................................................................................. 15
1.0 Electrical characteristics ........................................................................................................... 16
1.1 Maximum Ratings .............................................................................................................. 16
2.0 Functional Description .............................................................................................................. 17
2.1 Rectifier – AC Clamp ......................................................................................................... 17
2.2 Coil Load Modulation ......................................................................................................... 17
2.3 VDD Regulator ................................................................................................................... 17
2.4 VPP Regulator ................................................................................................................... 17
2.5 Clock Generator ................................................................................................................ 17
2.6 IRQ Detector ..................................................................................................................... 17
2.7 Power On Reset ................................................................................................................ 17
2.8 Modulation Logic ............................................................................................................... 17
3.0 ConfigurationLogic ................................................................................................................... 18
3.1 Control Bit Register ........................................................................................................... 18
3.2 Organization ...................................................................................................................... 18
3.3 Baud Rate Timing .............................................................................................................. 18
3.4 Column and Row Decoder Logic and Bit Counter ............................................................. 18
4.0 Modes of operation ................................................................................................................... 20
4.1 Native Mode ...................................................................................................................... 20
4.2 Read Mode ........................................................................................................................ 20
5.0 Anticollision .............................................................................................................................. 21
MCRF250 Product Identification System ........................................................................................ 22
TB023 CONTACT PROGRAMMING SUPPORT

Introduction ...................................................................................................................................... 23
Definitions ........................................................................................................................................ 23
File Specification ............................................................................................................................. 23
DS51115E-page vi  1998 Microchip Technology Inc.

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Table of Contents
PAGE
AN678 RFID COIL DESIGN
Introduction ...................................................................................................................................... 25
Review of a Basic Theory for Antenna Coil Design ......................................................................... 25
Current and Magnetic Fields .................................................................................................... 25
Induced Voltage in Antenna Coil ..................................................................................................... 27
Wire Types and Ohmic Losses ....................................................................................................... 30
Wire Size and DC Resistance .................................................................................................. 30
AC Resistance of Wire ............................................................................................................. 30
Inductance of Various Antenna Coils .............................................................................................. 32
Inductance of a Straight Wire ................................................................................................... 32
Inductance of a Single Layer Coil ............................................................................................. 32
Inductance of a Circular Loop Antenna Coil with Multilayer ..................................................... 33
Inductance of a Square Loop Coil with Multilayer .................................................................... 33
Configuration of Antenna Coils ........................................................................................................ 34
Tag Antenna Coil ...................................................................................................................... 34
Reader Antenna Coil ................................................................................................................ 35
Resonance Circuits, Quality Factor Q, and Bandwidth ................................................................... 36
Parallel Resonant Circuit .......................................................................................................... 36
Series Resonant Circuit ............................................................................................................ 37
Q and Bandwidth ...................................................................................................................... 39
Limitation on Q ......................................................................................................................... 39
Tuning Method ......................................................................................................................... 40
FSK READER REFERENCE DESIGN

Read Range of RFID Devices ......................................................................................................... 41
References ...................................................................................................................................... 42
1.0 Introduction ............................................................................................................................... 43
2.0 Reader Circuits ......................................................................................................................... 43
2.1 Transmitting Section .......................................................................................................... 44
2.2 Receiving Section .............................................................................................................. 44
3.0 microID™ FSK Reader ............................................................................................................ 45
4.0 FSK Reader Schematic ............................................................................................................ 46
5.0 FSK Reader Bill of Materials .................................................................................................... 47
6.0 FSK Source Code for the PICmicro® MCU .............................................................................. 49
PSK READER REFERENCE DESIGN

1.0 Introduction ............................................................................................................................... 59
2.0 Reader Circuits ......................................................................................................................... 59
3.0 microID™ PSK Reader ............................................................................................................ 61
4.0 PSK Reader Schematic ............................................................................................................ 63
5.0 PSK Reader Bill of Materials .................................................................................................... 64
6.0 PSK Source Code for the PICmicro® MCU .............................................................................. 67
 1998 Microchip Technology Inc. DS51115E-page vii

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Table of Contents
PAGE
ASK READER REFERENCE DESIGN
1.0 Introduction ............................................................................................................................... 77
2.0 Reader Circuits ......................................................................................................................... 77
3.0 microID™ ASK Reader ............................................................................................................ 79
4.0 ASK Reader Schematic ............................................................................................................ 80
5.0 ASK Reader Bill of Materials .................................................................................................... 81
6.0 ASK Reader Source Code for the PICmicro® MCU ................................................................. 83
FSK ANTICOLLISION READER REFERENCE DESIGN

1.0 Introduction ............................................................................................................................... 99
2.0 Reader Circuits ....................................................................................................................... 100
3.0 AntiCollision Reader Schematic ............................................................................................. 102
4.0 Anticollision Reader Bill of Materials ...................................................................................... 103
5.0 FSK Anticollision Source Code for the PICmicro® MCU ........................................................ 105
USING THE microID™ PROGRAMMER

1.0 Introduction ............................................................................................................................. 117
2.0 Programming Signal Waveform ............................................................................................. 118
2.1 Power-up, Gap, and Verification Signals ......................................................................... 118
2.2 Programming Sequence .................................................................................................. 118
3.0 Calibration of Programming Voltage ...................................................................................... 120
4.0 Programming Procedure ........................................................................................................ 121
4.1 Error Conditions .............................................................................................................. 121
5.0 Programming in a Standard Terminal Mode .......................................................................... 123
5.1 Programmer Wake-up ..................................................................................................... 123
5.2 Blank Check .................................................................................................................... 123
5.3 Program and Verify the Device ....................................................................................... 123
5.4 Error Conditions .............................................................................................................. 123
6.0 microID™ Programmer Schematic ....................................................................................... 126
7.0 microID™ Programmer Bill of Materials ................................................................................. 127
8.0 Programmer Source Code for PIC16C73 ............................................................................... 129
WORLDWIDE SALES AND SERVICE
DS51115E-page viii  1998 Microchip Technology Inc.

M AN680
Passive RFID Basics
Author: Pete Sorrells

Modulation
Microchip Technology Inc. Periodic fluctuations in the amplitude of the carrier,
used to transmit data back from the tag to the reader.
Systems incorporating passive RFID tags operate in
INTRODUCTION ways that may seem unusual to anyone who already
Radio Frequency Identification (RFID) systems use understands RF or microwave systems. There is only
radio frequency to identify, locate and track people, one transmitter – the passive tag is not a transmitter or
assets, and animals. Passive RFID systems are transponder in the purest definition of the term, yet bidi-
composed of three components – an interrogator rectional communication is taking place. The RF field
(reader), a passive tag, and a host computer. The tag generated by a tag reader (the energy transmitter) has
is composed of an antenna coil and a silicon chip that three purposes:
includes basic modulation circuitry and non-volatile 1. Induce enough power into the tag coil to
memory. The tag is energized by a time-varying energize the tag. Passive tags have no battery
electromagnetic radio frequency (RF) wave that is or other power source; they must derive all
transmitted by the reader. This RF signal is called a power for operation from the reader field.
carrier signal. When the RF field passes through an 125 kHz and 13.56 MHz tag designs must
antenna coil, there is an AC voltage generated across operate over a vast dynamic range of carrier
the coil. This voltage is rectified to supply power to the input, from the very near field (in the range of
tag. The information stored in the tag is transmitted 200 VPP) to the maximum read distance (in the
back to the reader. This is often called backscattering. range of 5 VPP).
By detecting the backscattering signal, the information 2. Provide a synchronized clock source to the
stored in the tag can be fully identified. tag. Most RFID tags divide the carrier frequency
down to generate an on-board clock for state
DEFINITIONS machines, counters, etc., and to derive the data
transmission bit rate for data returned to the
Reader
reader. Some tags, however, employ on-board
Usually a microcontroller-based unit with a wound out- oscillators for clock generation.
put coil, peak detector hardware, comparators, and 3. Act as a carrier for return data from the tag.
firmware designed to transmit energy to a tag and read Backscatter modulation requires the reader to
information back from it by detecting the backscatter peak-detect the tag's modulation of the reader's
modulation. own carrier. See Section for additional
Tag information on backscatter modulation.
An RFID device incorporating a silicon memory chip
(usually with on-board rectification bridge and other RF
front-end devices), a wound or printed input/output coil,
and (at lower frequencies) a tuning capacitor.
Carrier
A Radio Frequency (RF) sine wave generated by the
reader to transmit energy to the tag and retrieve data
from the tag. In these examples the ISO frequencies of
125 kHz and 13.56 MHz are assumed; higher frequen-
cies are used for RFID tagging but the communication
methods are somewhat different. 2.45 GHz, for
example, uses a true RF link. 125 kHz and 13.56 MHz,
utilize transformer-type electromagnetic coupling.
 1998 Microchip Technology Inc. DS00680A-page 1

AN680
SYSTEM HANDSHAKE BACKSCATTER MODULATION
Typical handshake of a tag and reader is as follows: This terminology refers to the communication method
1. The reader continuously generates an RF used by a passive RFID tag to send data back to the
carrier sine wave, watching always for modula- reader. By repeatedly shunting the tag coil through a
tion to occur. Detected modulation of the field transistor, the tag can cause slight fluctuations in the
would indicate the presence of a tag. reader's RF carrier amplitude. The RF link behaves
essentially as a transformer; as the secondary winding
2. A tag enters the RF field generated by the
(tag coil) is momentarily shunted, the primary winding
reader. Once the tag has received sufficient
(reader coil) experiences a momentary voltage drop.
energy to operate correctly, it divides down the
The reader must peak-detect this data at about 60 dB
carrier and begins clocking its data to an output
down (about 100 mV riding on a 100V sine wave) as
transistor, which is normally connected across
shown in Figure 1.
the coil inputs.
3. The tag’s output transistor shunts the coil, This amplitude-modulation loading of the reader's
sequentially corresponding to the data which is transmitted field provides a communication path back
being clocked out of the memory array. to the reader. The data bits can then be encoded or
further modulated in a number of ways.
4. Shunting the coil causes a momentary
fluctuation (dampening) of the carrier wave,
FIGURE 1: AMPLITUDE – MODULATED
which is seen as a slight change in amplitude of
the carrier. BACKSCATTERING SIGNAL
5. The reader peak-detects the
amplitude-modulated data and processes the 100 mV
resulting bitstream according to the encoding
and data modulation methods used.
100V
DS00680A-page 2  1998 Microchip Technology Inc.

AN680
DATA ENCODING 2. Differential Biphase. Several different forms of
differential biphase are used, but in general the
Data encoding refers to processing or altering the data bitstream being clocked out of the data array is
bitstream in-between the time it is retrieved from the modified so that a transition always occurs on
RFID chip’s data array and its transmission back to the every clock edge, and 1's and 0's are distin-
reader. The various encoding algorithms affect error guished by the transitions within the middle of
recovery, cost of implementation, bandwidth, synchro- the clock period. This method is used to embed
nization capability, and other aspects of the system clocking information to help synchronize the
design. Entire textbooks are written on the subject, but reader to the bitstream; and because it always
there are several popular methods used in RFID has a transition at a clock edge, it inherently
tagging today: provides some error correction capability. Any
1. NRZ (Non-Return to Zero) Direct. In this clock edge that does not contain a transition in
method no data encoding is done at all; the 1’s the data stream is in error and can be used to
and 0’s are clocked from the data array directly reconstruct the data.
to the output transistor. A low in the 3. Biphase_L (Manchester). This is a variation of
peak-detected modulation is a ‘0’ and a high is a biphase encoding, in which there is not always a
‘1’. transition at the clock edge.
FIGURE 2: VARIOUS DATA CODING WAVEFORMS

SIGNAL WAVEFORM DESCRIPTION
Data Digital Data

1 0 1 1 0 0 0 1 1 0 1 0
Bit Rate Clock Signal

CLK
Non-Return to Zero - Level

NRZ_L
‘1’ is represented by logic high level.
(Direct) ‘0’ is represented by logic low level.
Biphase - Level (Split Phase)

Biphase_L A level change occurs at middle of
(Manchester) every bit clock period.
‘1’ is represented by a high to low
level change at midclock.
‘0’ is represented by a low to high
level change at midclock.
Differential Differential Biphase - Space

Biphase_S A level change occurs at middle of
every bit clock period.
‘1’ is represented by a change in
level at start of clock.
‘0’ is represented by no change in
level at start of clock.

AN680
DATA MODULATION and 1's in the bitstream, and the reader has only
to count cycles between the peak-detected
Although all the data is transferred to the host by clock edges to decode the data. FSK allows for
amplitude-modulating the carrier (backscatter modula- a simple reader design, provides very strong
tion), the actual modulation of 1’s and 0’s is accom- noise immunity, but suffers from a lower data
plished with three additional modulation methods: rate than some other forms of data modulation.
1. Direct. In direct modulation, the Amplitude In Figure 3, FSK data modulation is used with
Modulation of the backscatter approach is the NRZ encoding:
only modulation used. A high in the envelope is 3. PSK (Phase Shift Keying). This method of data
a ‘1’ and a low is a ‘0’. Direct modulation can pro- modulation is similar to FSK, except only one
vide a high data rate but low noise immunity. frequency is used, and the shift between 1's and
2. FSK (Frequency Shift Keying). This form of 0's is accomplished by shifting the phase of the
modulation uses two different frequencies for backscatter clock by 180 degrees. Two common
data transfer; the most common FSK mode is types of PSK are:
Fc/8/10. In other words, a ‘0’ is transmitted as an • Change phase at any ‘0’, or
amplitude-modulated clock cycle with period • Change phase at any data change
corresponding to the carrier frequency divided (0 to 1 or 1 to 0).
by 8, and a ‘1’ is transmitted as an
PSK provides fairly good noise immunity, a
amplitude-modulated clock cycle period corre-
moderately simple reader design, and a faster
sponding to the carrier frequency divided by 10.
data rate than FSK. Typical applications utilize a
The amplitude modulation of the carrier thus
backscatter clock of Fc/2, as shown in Figure 4.
switches from Fc/8 to Fc/10 corresponding to 0's
FIGURE 3: FSK MODULATED SIGNAL, FC/8 = 0, FC/10 = 1
8 cycles = 0 8 cycles = 0 10 cycles = 1 10 cycles = 1 8 cycles = 0
FIGURE 4: PSK MODULATED SIGNAL
Phase Phase Phase Phase

Shift Shift Shift Shift

AN680
ANTICOLLISION
In many existing applications, a single-read RFID tag is
sufficient and even necessary: animal tagging and
access control are examples. However, in a growing
number of new applications, the simultaneous reading
of several tags in the same RF field is absolutely criti-
cal: library books, airline baggage, garment, and retail
applications are a few.
In order to read multiple tags simultaneously, the tag
and reader must be designed to detect the condition
that more than one tag is active. Otherwise, the tags
will all backscatter the carrier at the same time, and the
amplitude-modulated waveforms shown in Figures 3
and 4 would be garbled. This is referred to as a
collision. No data would be transferred to the reader.
The tag/reader interface is similar to a serial bus, even
though the “bus” travels through the air. In a wired serial
bus application, arbitration is necessary to prevent bus
contention. The RFID interface also requires arbitration
so that only one tag transmits data over the “bus” at one
time.
A number of different methods are in use and in
development today for preventing collisions; most are
patented or patent pending, but all are related to
making sure that only one tag “talks” (backscatters) at
any one time. See the MCRF250 Data Sheet (page 15)
and the FSK Anticollision Reader Reference Design
(page 99) chapters for more information.

AN680
NOTES:

M MCRF200
Contactless Programmable Passive RFID Device
FEATURES PACKAGE TYPE
• Contactless programmable after encapsulation PDIP/SOIC
• Read only data transmission
VA 1 8 VB
• 96 or 128 bits of One-Time Programmable (OTP)
user memory (also supports 48 and 64-bit
NC 2 7 NC
protocols)
• Typical operates at 125 kHz NC 3 6 NC
• On chip rectifier and voltage regulator NC NC
4 5
• Ultra low power operation
• Factory programming and device serialization
available DESCRIPTION
• Encoding options:
- NRZ Direct, Differential Biphase, Manchester This device is a Radio Frequency Identification (RFID)
Biphase tag that provides a bidirectional interface for program-
ming and reading the contents of the user array. The
• Modulation options:
device is powered by an external RF transmitter
- Direct, FSK, PSK (change on data change), through inductive coupling. When in read mode, the
PSK (change at the beginning of a one) device transmits the contents of its memory array by
damping (modulating) the incoming RF signal. The
APPLICATION reader is able to detect the damping and decodes the
data being transmitted. Code length, modulation
RF option, encoding option, and bit rate are set at the
Signal factory to fit the needs of particular applications.
Transmitter/ The user memory array of this device can be
Receiver MCRF200
programmed contactlessly after encapsulation. This
Data allows the user to keep encapsulated blank tags in
stock for on-demand personalization. The tags can
then be programmed with data as they are needed.
These devices are available in die, wafer, PDIP, SOIC,
and COB module form. The encoding, modulation,
frequency, and bit rate options are specified by the
customer and programmed by Microchip Technology
Inc. prior to shipment. Array programming and
serialization (SQTP) can also be arranged upon
request. See TB023 (page 23) for more information.
BLOCK DIAGRAM
Modulation Data
Control
Load Clock
Generator Row Memory
coil Decode Array
connections Vcc
Rectifier
Vss
Counter Column
Decode
 1998 Microchip Technology Inc. DS21219D-page 7

MCRF200
1.0 ELECTRICAL TABLE 1-1: PAD FUNCTION TABLE
CHARACTERISTICS Name Function
1.1 Maximum Ratings* VA,VB Coil connection
Storage temperature ....................................- 65°C to +150°C NC No connection, test pad

Ambient temp. with power applied ................-40°C to +125°C
Maximum current into coil pads ....................................50 mA
*Notice: Stresses above those listed under “Maximum ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is
not implied. Exposure to maximum rating conditions for extended peri-
ods may affect device reliability.
TABLE 1-2: AC AND DC CHARACTERISTICS
All parameters apply across the Industrial (I): Tamb = -40°C to +85°C
specified operating ranges
unless otherwise noted.
Parameter Symbol Min. Typ. Max. Units Conditions
Clock frequency FCLK 100 — 150 kHz
Contactless programming time TWC — 2 — s 128-bit array
Data retention 200 — — Years 25°C
Coil current (Dynamic) ICD — 50 µA
Operating current IDD — 5 µA VCC = 2V
Turn-on-voltage (Dynamic) for VAVB 10 — — VPP

modulation
VCC 2 — — VDC
Input Capacitance CIN — 2 — pF Between VA and VB
FIGURE 1-1: DIE PLOT TABLE 1-3 RFID PAD COORDINATES

(MICRONS)
NC NC NC NC
Passivation
Openings
Pad Pad Pad Pad Pad

Name Width Height Center X Center Y
VA 90.0 90.0 427.50 -734.17
VB 90.0 90.0 -408.60 -734.17
Note 1: All coordinates are referenced from the

center of the die.
2: Die size 1.1215 mm x 1.7384 mm.
VB VA
DS21219D-page 8  1998 Microchip Technology Inc.

MCRF200
2.0 FUNCTIONAL DESCRIPTION 2.5 Clock Generator
The RF section generates all the analog functions This circuit generates a clock based on the interrogator
needed by the transponder. These include rectification frequency. This clock is used to derive all timing in the
of the carrier, on-chip regulation of VPP (programming tag, including the baud rate, modulation rate, and
voltage), and VDD (operating voltage), as well as high programming rate.
voltage clamping to prevent excessive voltage from
being applied to the transponder. This section gener- 2.6 IRQ Detector
ates a system clock from the interrogator carrier of the
same frequency, detects carrier interrupts, and modu- This circuitry detects an interrupt in the continuous
lates the tuned LC antenna for transmission to the electromagnetic field of the interrogator. An IRQ
interrogator. The chip detects a power-up condition and (interrupt request) is defined as the absence of the
resets the transponder when sufficient voltage electromagnetic field for a specific number of clock
develops. cycles. This feature is used during contactless
programming.
2.1 Rectifier – AC Clamp
2.7 Power-On-Reset
The AC voltage generated by the transponder tuned LC
circuit is full wave rectified. This unregulated voltage is This circuit generates a power-on-reset when the tag
used as the maximum DC supply voltage for the rest of first enters the interrogator field. The reset releases
the chip. The peak voltage on the tuned circuit is when sufficient power has developed on the VDD
clamped by the internal circuitry to a safe level to regulator to allow correct operation. The reset trip
prevent damage to the IC. This voltage is adjusted points are set such that sufficient voltage across VDD
during programming to allow sufficient programming has developed, which allows for correct clocking of the
voltage to the EEPROM. logic for reading of the EEPROM and configuration
data, and correct modulation.
2.2 Coil Load Modulation
2.8 Modulation Logic
The MCRF200 communicates to the reader by
AM-modulating the coil voltage across the tuned LC This logic acts upon the serial data being read from the
circuit. EEPROM and performs two operations on the data.
The logic first encodes the data according to the
2.3 VDD Regulator configuration bits CB6 and CB7. The data can be sent
out direct to the modulation logic or encoded Biphase
The device generates a fixed supply voltage from the Differential, Biphase Manchester or Manchester with
unregulated coil voltage. IDI option.
2.4 VPP Regulator The encoded data is then either passed NRZ Direct out
to modulate the coil, or FSK modulated, or PSK
This regulates a programming voltage during the pro- modulated with changes on the change of data, or PSK
gramming mode. The voltage is used for the EEPROM with changes on the bit edge of a one. Configuration
array to perform block erasure of the memory as well as bits CB8 and CB9 determine the modulation option.
single-bit programming during both contact and CB10 is used if the PSK option has been selected, and
contactless programming. During reading, this voltage determines if the return carrier rate is FCLK/2 or FCLK/4.
is level-shifted down and kept below the programming
voltages to insure that the part is not inadvertently
programmed.

MCRF200
3.0 CONFIGURATION LOGIC 3.2 Baud Rate Timing
CONTROL BIT REGISTER The chip will access data at a baud rate determined by
The configuration register determines the operational bits CB2, CB3, CB4, and CB5 of the configuration
parameters of the device. The configuration register register. CB2, CB3, and CB4 determine the return data
cannot be programmed contactlessly; it is programmed rate (CACLK). The default rate of FCLK/128 is used for
during wafer probe at the Microchip factory. CB11 is contact and contactless programming. Once the array
always a zero; CB12 is set when successful contact or is successfully programmed, the lock bit CB12 is set.
contactless programming of the data array has been When the lock bit is cleared, programming and erasing
completed. Once CB12 is set, device programming and the device becomes permanently disabled. The config-
erasing is disabled. Figure 3-1 contains a description of uration register has no effect on device timing until after
the control register bit functions. the EEPROM data array is programmed. If CB2 is set
to a one and CB5 is set to a one, the 1.5 bit SYNC word
3.1 Organization option is enabled.
The configuration bit register directly controls logic 3.3 Column and Row Decoder Logic and
blocks which generate the baud rate, memory size, Bit Counter
encoded data, and modulated data. This register also
contains bits which lock the data array. The column and row decoders address the EEPROM
array at the clock rate and generate a serial data
stream for modulation. This data stream can be up to
128 bits in length. The size of the stream is user
programmable with CB1 and can be set to 96 or 128
bits. Data lengths of 48 and 64 bits are available by pro-
gramming the data twice in the array, end-to-end. The
data is then encoded by the modulation logic. The data
length during contactless programming is 128 bits.
The column and row decoders route the proper voltage
to the array for programming and reading. In the
programming modes, each individual bit is addressed
serially from bit 1 to bit 128.

MCRF200
FIGURE 3-1: CONFIGURATION REGISTER
CB12 CB11 CB10 CB9 CB8 CB7 CB6 CB5 CB4 CB3 CB2 CB1
ARRAY SIZE
CB1 = 1 128-bit user array
CB1 = 0 96-bit user array
TIMING
CB2 CB3 CB4 Rate
0 0 0 MOD128
0 0 1 MOD100
0 1 0 MOD80
0 1 1 MOD32
1 0 0 MOD64
1 0 1 MOD50
1 1 0 MOD40
1 1 1 MOD16
SYNC WORD
CB5 = 1 1.5-bit sync word enable
CB5 = 0 1.5-bit sync word disable
DATA ENCODING
CB6 = 0; CB7 = 0 NRZ_L (Direct)
CB6 = 0; CB7 = 1 Biphase_S (Differential)
CB6 = 1; CB7 = 0 Biphase_L (Manchester)
CB6 = 1; CB7 = 1 (Not Used)
MODULATION OPTIONS
CB8 = 0; CB9 = 0 FSK 0 = Fc/8, 1 = Fc/10
CB8 = 0; CB9 = 1 Direct
CB8 = 1; CB9 = 0 psk_1
(phase change on change of data)
CB8 = 1; CB9 = 1 psk_2
(phase change at beginning of a one)
PSK RATE OPTION
CB10 = 1 clk/4 carrier
(READ ONLY)
CB11 = 0
ARRAY LOCK BIT (READ ONLY)
CB12 = 0 array not locked
CB12 = 1 array is locked

MCRF200
4.0 MODES OF OPERATION
The device has two basic modes of operation: Native
Mode and Read Mode.
4.1 Native Mode

In native mode, a transponder will have an
unprogrammed array and will be in the default mode for
contactless programming (default baud rate FCLK/128,
FSK, NRZ_direct).
4.2 Read Mode

The second mode is a read mode after the contactless
or contact programming has been completed and for
the rest of the lifetime of the device. The lock bit CB12
will be set, and when the transponder is powered, it will
have the ability to transmit according to the protocol in
the configuration register.
FIGURE 4-1: TYPICAL APPLICATION CIRCUIT
IAC 740 µH 390 pF Input capacitance: 2 pF

From 4.05 mH
oscillator Energy
125 kHz
Pad VA
Pad VB
To reader MCRF200
amplifier/filter Data
2.2 nF
1
fres = ------------------ = 125 kHz
2π LC

MCRF200
MCRF200 PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
MCRF 200 – I /WFxxx

Hex Code = Three digit hex value to be programmed into the
configuration register. Three hex characters corre-
Configuration: spond to 12 binary bits. These bits are programmed
into the configuration register MSB first (CB12,
CB11…CB1). See the example below.
WF = Sawed wafer on frame (7 mil backgrind)

W = Wafer (11 mil backgrind)
S = Dice in waffle pack
Package: SN = 150 mil SOIC
P = PDIP
1C = 0.45 mm COB module with 1000 pF capacitor
3C = 0.70 mmCOB module with 330 pF capacitor
Temperature I = -40°C to +85°C
Range:
Sample Part MCRF200-I /W00A
Number:
MCRF200-I/W00A = 125 kHz, industrial temperature, wafer package,

contactlessly programmable, 96 bit,
FSK Fc/8 Fc/10, direct encoded, Fc/50 data return
rate tag. The configuration register is:
0 0 0 0 0 0 0 0 1 0 1 0

MCRF200
NOTES:

M MCRF250
Contactless Programmable Passive RFID Device With Anticollision
FEATURES APPLICATION
• Anticollision feature to resolve multiple tags in the
same RF field
• Read-only data transmission
RF
• 96 or 128 bits of One-Time Programmable (OTP) Signal
user memory (also supports 48 and 64-bit
Transmitter/ MCRF250
protocols) Receiver
• Operates up to 150 kHz Data
• On-chip rectifier and voltage regulator
• Low power operation
• Factory programming and device serialization
available
• Encoding options: The MCRF250 is equipped with an anticollision
feature that allows multiple tags in the same field to
- NRZ Direct, Differential Biphase, Manchester
be read simultaneously. This revolutionary feature
Biphase, Biphase IDI
eliminates the issue of data corruption due to
• Modulation options: simultaneous transmissions from multiple tags.
- FSK, Direct, PSK (change on data change),
The user memory array of this device can be
PSK (change at the beginning of a one)
programmed contactlessly after encapsulation. This
• Contactless programmable after encapsulation allows the user to keep encapsulated blank tags in
stock for on-demand personalization. The tags can
DESCRIPTION then be programmed with data as they are needed.
This device is a Radio Frequency Identification (RFID)
tag that provides a variety of operating modes. The These devices are available in die form or packaged in
device is powered by an external RF transmitter SOIC, PDIP or COB modules. The encoding,
(reader) through inductive coupling. When in the reader modulation, frequency, and bit rate options are
field, the device will transmit the contents of its memory specified by the customer and programmed by
array by damping (modulating) the incoming RF signal. Microchip Technology Inc. prior to shipment. Array pro-
A reader is able to detect the damping and decodes the gramming and serialization (SQTP) can also be
data being transmitted. Code length, modulation arranged upon request. See TB023 (page 23) for more
option, encoding option and bit rate are set at the information.
factory to fit the needs of particular applications.
BLOCK DIAGRAM
Modulation Data
Control
Clock Anticollision
Modulation
Generator Circuitry Row Memory

Circuit
Coil Decode Array

Connections VCC
Rectifier
VSS
Counter Column
Decode
 1998 Microchip Technology Inc. DS21267C-page 15

MCRF250
1.0 ELECTRICAL TABLE 1-1: PAD FUNCTION TABLE
CHARACTERISTICS Name Function
1.1 Maximum Ratings* VA,VB Coil connection
Storage temperature .....................................-65°C to +150°C NC No connection, test pad
Ambient temp. with power applied ................-40°C to +125°C
Maximum current into coil pads ....................................50 mA
*Notice: Stresses above those listed under “Maximum ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is
not implied. Exposure to maximum rating conditions for extended peri-
ods may affect device reliability.
TABLE 1-2: AC AND DC CHARACTERISTICS

All parameters apply across the speci- Industrial (I): Tamb = -40°C to +85°C
fied operating ranges unless otherwise
noted.
Parameter Symbol Min. Typ. Max. Units Conditions
Clock frequency FCLK 100 — 150 kHz
Contactless programming time TWC — 2 — s 128-bit array
Data retention 200 — — Years 25°C
Coil current (Dynamic) ICD — 50 µA
Operating current IDD — 2 µA
Turn-on-voltage (Dynamic) VAVB 10 — — VPP
for modulation VCC 2 — — VDC
FIGURE 1-1: DIE PLOT

NC NC NC NC TABLE 1-3: RFID PAD COORDINATES
(MICRONS)
Passivation
Openings
Pad Pad Pad Pad Pad

Name Width Height Center X Center Y
VA 90.0 90.0 427.50 -734.17
VB 90.0 90.0 -408.60 -734.17
Note 1: All coordinates are referenced from the cen-
ter of the die.
2: Die size 1.1215 mm x 1.7384 mm.
FIGURE 1-2: PIN DIAGRAM

PDIP, SOIC
VA 1 8 VB
MCRF250
NC 2 7 NC
NC 3 6 NC
NC 4 5 NC
VB VA
DS21267C-page 16  1998 Microchip Technology Inc.

MCRF250
2.0 FUNCTIONAL DESCRIPTION 2.5 Clock Generator
The RF section generates all the analog functions This circuit generates a clock with a frequency equal to
needed by the transponder. These include rectification the interrogator frequency. This clock is used to derive
of the carrier, on-chip regulation of VPP (programming all timing in the device, including the baud rate,
voltage), and VDD (operating voltage), as well as high modulation rate, and programming rate.
voltage clamping to prevent excessive voltage from
being applied to the device. This section generates a 2.6 IRQ Detector
system clock from the interrogator carrier frequency,
detects carrier interrupts and modulates the tuned LC This circuitry detects an interrupt in the continuous
antenna for transmission to the interrogator. The chip electromagnetic field of the interrogator. An IRQ
detects a power up condition and resets the transpon- (interrupt request) is defined as the absence of the
der when sufficient voltage develops. electromagnetic field for a specific number of clock
cycles. Detection of an IRQ will trigger the device to
2.1 Rectifier – AC Clamp enter the Anticollision mode. This mode is discussed in
detail in Section 5.0.
The AC voltage induced by the tuned LC circuit is full
wave rectified. This unregulated voltage is used as the 2.7 Power-On-Reset
DC supply voltage for the rest of the chip. The peak
voltage on the tuned circuit is clamped by the internal This circuit generates a power-on-reset when the tag
circuitry to a safe level to prevent damage to the IC. first enters the interrogator field. The reset releases
This voltage is adjusted during programming to allow when sufficient power has developed on the VDD
sufficient programming voltage to the EEPROM. regulator to allow correct operation. The reset trip
points are set such that sufficient voltage across VDD
2.2 Coil Load Modulation has developed which allows for correct clocking of the
logic for reading of the EEPROM and configuration
The MCRF250 communicates by shunting a transistor data, and correct modulation.
across the tuned LC circuit, which modulates the
received RF field. 2.8 Modulation Logic
2.3 VDD Regulator This logic acts upon the serial data being read from the
EEPROM and performs two operations on the data.
The device generates a fixed supply voltage from the The logic first encodes the data according to the
unregulated coil voltage. configuration bits CB6 and CB7. The data can be sent
out direct to the modulation logic or encoded
2.4 VPP Regulator Biphase_s (Differential), Biphase_l (Manchester) or IDI
This regulates a programming voltage during the (Manchester).
programming mode. The voltage is switched into the The encoded data is then either passed NRZ Direct out
EEPROM array to perform block erasure of the to modulate the coil, or FSK modulated, or PSK
memory as well as single bit programming during both modulated with phase changes on the change of data,
contact and contactless programming. During reading or PSK with phase changes on the bit edge of a one.
this voltage is level shifted down and kept below the Configuration bits CB8 and CB9 determine the
programming voltages to insure that the part is not modulation option. CB10 is used if the PSK option has
inadvertently programmed. been selected and determines whether the return
carrier rate is FCLK/2 or FCLK/4.

MCRF250
3.0 CONFIGURATIONLOGIC 3.3 Baud Rate Timing
3.1 Control Bit Register The chip will access data at a baud rate determined by
bits CB2, CB3, CB4, and CB5 of the configuration
The configuration register determines the operational register. CB2, CB3, and CB4 determine the return data
parameters of the device. The configuration register rate (CACLK). The default rate of FCLK/128 is used for
can not be programmed contactlessly; it is contact and contactless programming. Once the array
programmed during wafer probe at the Microchip is successfully programmed, the lock bit CB12 is set.
factory. CB11 is always a one; CB12 is set when When the lock bit is set, programming and erasing the
successful contact or contactless programming of the device becomes permanently disabled. The
data array has been completed. Once CB12 is set, configuration register has no effect on device timing or
programming and erasing of the device is disabled. modulation until after the EEPROM data array is
Figure 3-1 contains a description of the control register programmed. If CB2 is set to a one and CB5 is set to a
bit functions. one, the 1.5 bit SYNC word option is enabled.
3.2 Organization 3.4 Column and Row Decoder Logic and

Bit Counter
The configuration bit register directly controls logic
blocks, which generate the baud rate, memory size, The column and row decoders address the EEPROM
encoded data, and modulated data. This register also array at the CACLK rate and generate a serial data
contains bits which lock the data array. stream for modulation. This data stream can be up to
128 bits in length. The size of the stream is user
programmable with CB1, and can be set to 96 or 128
bits. Data lengths of 48 and 64 bits are available by
programming the data twice in the array end to end.
The data is then encoded by the modulation logic. The
data length during contactless programming is 128 bits.
The column and row decoders route the proper voltage
to the array for programming and reading. In the
programming modes, each individual bit is addressed
serially from bit 1 to bit 128.

MCRF250
FIGURE 3-1: CONFIGURATION REGISTER
ARRAY SIZE
CB1 = 1: 128-bit user array
CB1 = 0: 96-bit user array
TIMING
CB2 CB3 CB4 Rate
0 0 0 MOD128
0 0 1 MOD100
0 1 0 MOD80
0 1 1 MOD32
1 0 0 MOD64
1 0 1 MOD50
1 1 0 MOD40
1 1 1 MOD16
SYNC WORD
CB5 = 1: 1.5-bit sync word enable
CB5 = 0: 1.5-bit sync word disable
DATA ENCODING
CB6 = 0; CB7 = 0 nrz_I (direct)
CB6 = 0; CB7 = 1 biphase_s (differential)
CB6 = 1; CB7 = 0 biphase_I (manchester)
CB6 = 1; CB7 = 1 (Not Used)
MODULATION OPTIONS
CB8 = 0; CB9 = 0 FSK 0 = /8, 1 = /10
CB8 = 0; CB9 = 1 Direct
CB8 = 1; CB9 = 0 psk_1
(phase change on change of data)
CB8 = 1; CB9 = 1 psk_2
(phase change at beginning of a one
PSK RATE OPTION
(READ ONLY)
CB11 = 1
ARRAY LOCK BIT (READ ONLY)
CB12 = 0 array not locked
CB12 = 1 array is locked

MCRF250
4.0 MODES OF OPERATION
The device has two basic modes of operation: Native
Mode and Read Mode.
4.1 Native Mode

In native mode, the MCRF250 will have an
unprogrammed array and will be in the default mode for
contactless programming (default baud rate FCLK/128,
FSK, NRZ_direct).
4.2 Read Mode

The second mode is a read mode after the contactless
or contact programming has been completed and for
the rest of the lifetime of the device. The lock bit CB12
will be set, and the transponder will have the ability to
transmit when powered and enter the anticollision algo-
rithm.
FIGURE 4-1: TYPICAL APPLICATION CIRCUIT
IAC 740 µH 390 pF Input parasitic

From 4.05 mH
carrier RF Energy capacitance 2pF
signal 125 kHz
generator
Pad VA
Pad VB
To reader MCRF250
amplifier/ Data
data detector (Backscattering
2.2 nF Signal)
1
fres = ------------------ = 125 kHz
2π LC

MCRF250
5.0 ANTICOLLISION FIGURE 5-1: ANTICOLLISION
FLOWCHART
The anticollision feature is enabled when the array is
locked. In this mode, the MCRF250 has the ability to
stop transmitting when a collision has occurred. The
device will begin transmitting again when its internal Begin
anticollision algorithm indicates that it is time to do so.
Multiple tags can enter the same reader field and be
read by the reader in a short period of time. The reader
must provide “gaps” (RF field off) at proper timing Provide Gap*
intervals as shown in Figure 5-1 in order to inform the
MCRF250 of collisions, and to sequence from one tag
to another.
Wait 5-bit times
Is
modulation No
present?
Yes
Is
only one tag No
modulating?
Yes
Read Tag
Provide gap in the

first half of the first
bit time to make
tag stop
transmitting
Note: *Gap = lack of RF carrier signal

= 60 µs ± 20%.

MCRF250
MCRF250 PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
MCRF250 - I /WFxxx
Hex = Three digit hex value to be programmed into the
Code configuration register. Three hex characters corre-
Configuration:
spond to 12 binary bits. These bits are programmed
into the configuration register MSB first (CB12,
CB11…CB1). See the example below.
WF = Sawed wafer on frame (7 mil backgrind)
W = Wafer
S = Dice in wafer pack
Package: SN = 150 mil SOIC
P = PDIP
1C = COB module with 1000 pF capacitor
3C = COB module with 330 pF capacitor
Temperature I = –40°C to +85°C
Range:
Device: 250 = 125 kHz
Sample Part MCRF250-I /40A

Number:
MCRF250-I/W40A = 125 kHz, Industrial temperature, wafer package,

anticollision, 96 bit, FSK/8 /10,direct encoded, F/50
data return rate tag. The configuration register is:
0 1 0 0 0 0 0 0 1 0 1 0

M TB023
Contact Programming Support
INTRODUCTION FILE SPECIFICATION
The MCRF200 and MCRF250 are 125 kHz RF tags, SQTP codes supplied to Microchip must comply with
which can be contact or contactlessly programmed. the following format:
The contact programming of the device is performed by The ID code file is a plain ASCII text file from floppy disk
Microchip Technology, Inc. upon customer request. The or email (no headers).
customer can choose any ID code suitable to their
application subject to a minimum order quantity. These The code files should be compressed. Please make
devices can also be contactlessly programmed after self-extracting files.
encapsulation using the Microchip microID contactless The code files are used in alphabetical order of their file
programmer (PG103001). names (including letters and numbers).
Used (i.e., programmed) code files are discarded by
DEFINITIONS
Microchip after use.
First, the customer has to define the following operation Each line of the code file must contain one ID code for
options of the MCRF200 and MCRF250 (refer to one IC.
individual data sheets page 7 and page 15,
The code is in hexadecimal format.
respectively):
The code line is exactly as long as the selected code
• Bit rate Defined as clocks per bit e.g., length (e.g., code length = 64, ID code = 16 hex char-
Fc/16, Fc/32, Fc/40, Fc/50, Fc/64, acters = 64-bit number).
Fc/80, Fc/100, and Fc/128
Each line must end with a carriage return.
• Modulation FSK, PSK1, PSK2, ASK Direct
Each hexadecimal ID code must be preceded by a
• Encoding NRZ_L (Direct), Biphase_L
decimal series number.
(Manchester), Differential
Biphase_S Series number and ID code must be separated by a
• Code length 32, 48, 64, 96, and 128 bits space.
The series number must be unique and ascending to
Second, the ID codes and series numbers must be
avoid double programming.
supplied by the customer or an algorithm can be
specified by the customer. This section describes only The series numbers of two consecutive files must also
the case in which actual serial numbers are supplied. count up for proper linking.
The customer must supply the ID codes and series
numbers on floppy disk or via email. The codes should
conform to the SQTP format below:
FIGURE 1: EXAMPLE OF TWO CODE FILES, CODE LENGTH = 64 BITS
Filename
FILE0000.TXT FILE0001.TXT
00001 A34953DBCA001F26 Next Code 12346 EA43786937DCFB87
00002 C4F55308B492A783 12347 459724FCA487ED24
00003 38FAC359981200B7 " "
" " " " Code File
12345 9278256DCAFE8756 Last Code
ID Code
Serial Number Carriage Return Space Necessary

TB023
NOTES:

M AN678
RFID Coil Design
Author: Youbok Lee

REVIEW OF A BASIC THEORY FOR
Microchip Technology Inc. ANTENNA COIL DESIGN
Current and Magnetic Fields
INTRODUCTION Ampere’s law states that current flowing on a conductor
produces a magnetic field around the conductor.
In a Radio Frequency Identification (RFID) application, Figure 1 shows the magnetic field produced by a
an antenna coil is needed for two main reasons: current element. The magnetic field produced by the
• To transmit the RF carrier signal to power up the current on a round conductor (wire) with a finite length
tag is given by:
• To receive data signals from the tag
EQUATION 1:
An RF signal can be radiated effectively if the linear
dimension of the antenna is comparable with the µo I 2
wavelength of the operating frequency. In an RFID B φ = --------- ( cos α 2 – cos α 1 ) ( Weber ⁄ m )
4πr
application utilizing the VLF (100 kHz – 500 kHz) band,
the wavelength of the operating frequency is a few where:
kilometers (λ = 2.4 Km for 125 kHz signal). Because of
its long wavelength, a true antenna can never be I = current
formed in a limited space of the device. Alternatively, a r = distance from the center of wire
small loop antenna coil that is resonating at the µo = permeability of free space and given as
frequency of the interest (i.e., 125 kHz) is used. This µo = 4 π x 10-7 (Henry/meter)
type of antenna utilizes near field magnetic induction
coupling between transmitting and receiving antenna In a special case with an infinitely long wire where
coils. α1 = -180° and α2 = 0°, Equation 1 can be rewritten as:
The field produced by the small dipole loop antenna is

EQUATION 2:
not a propagating wave, but rather an attenuating wave.
The field strength falls off with r-3 (where r = distance µo I 2
from the antenna). This near field behavior (r-3) is a B φ = --------- ( Weber ⁄ m )
2πr
main limiting factor of the read range in RFID
applications.
FIGURE 1: CALCULATION OF
When the time-varying magnetic field is passing
through a coil (antenna), it induces a voltage across the MAGNETIC FIELD B AT
coil terminal. This voltage is utilized to activate the LOCATION P DUE TO
passive tag device. The antenna coil must be designed CURRENT I ON A STRAIGHT
to maximize this induced voltage. CONDUCTING WIRE
This application note is written as a reference guide for Ζ
antenna coil designers and application engineers in the
RFID industry. It reviews basic electromagnetics Wire
theories to understand the antenna coils, a procedure α2
for coil design, calculation and measurement of dL
inductance, an antenna-tuning method, and the α R
relationship between read range vs. size of antenna I
coil. α1
P
0 X B (into the page)
r
 1998 Microchip Technology Inc. DS00678B-page 25

AN678
The magnetic field produced by a circular loop antenna FIGURE 2: CALCULATION OF
coil with N-turns as shown in Figure 2 is found by: MAGNETIC FIELD B AT
LOCATION P DUE TO
EQUATION 3: CURRENT I ON THE LOOP
2
µ o INa
B z = --------------------------------
-
2 2 3⁄2
2(a + r )
2 I
µ o INa coil
------------------  ----3
1 2 2 α
= for r >>a
2  
r a R
where:
a = radius of loop r
y P
Equation 3 indicates that the magnetic field produced
by a loop antenna decays with 1/r3 as shown in Bz z
Figure 3. This near-field decaying behavior of the
magnetic field is the main limiting factor in the read
range of the RFID device. The field strength is FIGURE 3: DECAYING OF THE
maximum in the plane of the loop and directly MAGNETIC FIELD B VS.
proportional to the current (I), the number of turns (N), DISTANCE r
and the surface area of the loop.
B
Equation 3 is frequently used to calculate the
ampere-turn requirement for read range. A few
examples that calculate the ampere-turns and the field r-3
intensity necessary to power the tag will be given in the
following sections.
Note: The magnetic field produced by a

loop antenna drops off with r-3.
DS00678B-page 26  1998 Microchip Technology Inc.

AN678
INDUCED VOLTAGE IN ANTENNA The magnetic flux Ψ in Equation 4 is the total magnetic
field B that is passing through the entire surface of the
COIL
antenna coil, and found by:
Faraday’s law states a time-varying magnetic field
through a surface bounded by a closed path induces a EQUATION 5:
voltage around the loop. This fundamental principle
has important consequences for operation of passive ψ = ∫ B· dS
RFID devices.
Figure 4 shows a simple geometry of an RFID where:
application. When the tag and reader antennas are
within a proximity distance, the time-varying magnetic B = magnetic field given in Equation 3
field B that is produced by a reader antenna coil S = surface area of the coil
induces a voltage (called electromotive force or simply • = inner product (cosine angle between
EMF) in the tag antenna coil. The induced voltage in two vectors) of vectors B and surface
the coil causes a flow of current in the coil. This is called area S
Faraday’s law.
The induced voltage on the tag antenna coil is equal to
Note: Both magnetic field B and surface S are
the time rate of change of the magnetic flux Ψ.
vector quantities.
The inner product presentation of two vectors in
EQUATION 4:
Equation 5 suggests that the total magnetic flux ψ that
dΨ is passing through the antenna coil is affected by an
V = – N -------- orientation of the antenna coils. The inner product of
dt
two vectors becomes maximized when the two vectors
where: are in the same direction. Therefore, the magnetic flux
that is passing through the tag coil will become
N = number of turns in the antenna coil maximized when the two coils (reader coil and tag coil)
Ψ = magnetic flux through each turn are placed in parallel with respect to each other.
The negative sign shows that the induced voltage acts
in such a way as to oppose the magnetic flux producing
it. This is known as Lenz’s Law and it emphasizes the
fact that the direction of current flow in the circuit is
such that the induced magnetic field produced by the
induced current will oppose the original magnetic field.
FIGURE 4: A BASIC CONFIGURATION OF READER AND TAG ANTENNAS IN AN RFID

APPLICATION
Tag Coil
V = V0sin(ωt)
Tag
B = B0sin(ωt)
Reader Coil
Reader
Electronics Tuning Circuit
I = I0sin(ωt)

AN678
From Equations 3, 4, and 5, the induced voltage V0 for EXAMPLE 1: B-FIELD REQUIREMENT
an untuned loop antenna is given by:
The strength of the B-field that is needed to turn on
the tag can be calculated from Equation 7:
EQUATION 6:
EQUATION 8:
Vo = 2πfNSB o cos α
Vo
B o = ------------------------------------
2πf o NQS cos α
where:
7 ( 2.4 )
= -------------------------------------------------------------------------------------------
f = frequency of the arrival signal 2
( 2π ) ( 125 kHz ) ( 100 ) ( 15 ) ( 38.71cm )
N = number of turns of coil in the loop
2
S = area of the loop in square meters (m2) ≈ 1.5 µWb/m
Bo = strength of the arrival signal
where the following parameters are used in the
α = angle of arrival of the signal
above calculation:
tag coil size = 2 x 3 inches =
If the coil is tuned (with capacitor C) to the frequency of
38.71 cm2: (credit
the arrival signal (125 kHz), the output voltage Vo will
card size)
rise substantially. The output voltage found in
Equation 6 is multiplied by the loaded Q (Quality frequency = 125 kHz
Factor) of the tuned circuit, which can be varied from 5 number of turns = 100
to 50 in typical low-frequency RFID applications: Q of antenna coil = 15
AC coil voltage
EQUATION 7:
to turn on the tag = 7V
cos α = 1 (normal direction,
V o = 2πf o NQSB o cos α
α = 0).
where the loaded Q is a measure of the selectivity of

the frequency of the interest. The Q will be defined in
EXAMPLE 2: NUMBER OF TURNS AND
Equations 30, 31, and 37 for general, parallel, and CURRENT (AMPERE-
serial resonant circuit, respectively. TURNS) OF READER COIL
Assuming that the reader should provide a read
FIGURE 5: ORIENTATION DEPENDENCY range of 10 inches (25.4 cm) with a tag given in
OF THE TAG ANTENNA. Example 1, the requirement for the current and
number of turns (Ampere-turns) of a reader coil that
has an 8 cm radius can be calculated from
Line of axis Equation 3:
(Tag)
EQUATION 9:
B-field
2 2 3⁄2
2B z ( a + r )
( NI ) = ------------------------------
2
-
µa
α
–6 2 2 3⁄2
Tag 2 ( 1.5 × 10 ) ( 0.08 + 0.254 )
= -------------------------------------------------------------------------
–7
( 4π × 10 ) ( 0.08 )
= 7.04 ( ampere - turns )
The induced voltage developed across the loop This is an attainable number. If, however, we wish to
antenna coil is a function of the angle of the arrival sig- have a read range of 20 inches (50.8 cm), it can be
nal. The induced voltage is maximized when the found that NI increases to 48.5 ampere-turns. At
antenna coil is placed perpendicular to the direction of 25.2 inches (64 cm), it exceeds 100 ampere-turns.
the incoming signal where α = 0.

AN678
For a longer read range, it is instructive to consider The optimum radius of loop that requires the minimum
increasing the radius of the coil. For example, by number of ampere-turns for a particular read range can
doubling the radius (16 cm) of the loop, the be found from Equation 3 such as:
ampere-turns requirement for the same read range (10
inches: 25.4 cm) becomes: EQUATION 11:
3
---
EQUATION 10: 2 2 2
(a + r )
NI = K -----------------------
-
–6 2 2 3⁄2 2
2 ( 1.5 × 10 ) ( 0.16 + 0.25 ) a
NI = ----------------------------------------------------------------------
–7 2
( 4π × 10 ) ( 0.16 )
where:
= 2.44 (ampere-turns)
2Bz
K = ---------
µo
At a read range of 20 inches (50.8 cm), the
ampere-turns becomes 13.5 and at 25.2 inches (64
cm), 26.8. Therefore, for a longer read range, By taking derivative with respect to the radius a,
increasing the tag size is often more effective than
increasing the coil current. Figure 6 shows the relation- 2 2 1⁄2 3 2 2 3⁄2
d ( NI ) 3 ⁄ 2 ( a + r ) ( 2a ) – 2a ( a + r )
ship between the read range and the ampere-turns -------------- = K -----------------------------------------------------------------------------------------------
-
da 4
(IN). a
FIGURE 6: AMPERE-TURNS VS. READ 2 2 2 2 1⁄2

( a – 2r ) ( a + r )
RANGE FOR AN ACCESS = K -----------------------------------------------------
3
-
a
CONTROL CARD (CREDIT
CARD SIZE) The above equation becomes minimized when:
2 2
100
a – 2r = 0
NI for 1.5 µ-Weber/m2
10 The above result shows a relationship between the

read range vs. tag size. The optimum radius is found
a = 50 cm as:
1 a = 20 cm
a = 10 cm
a = 5 cm
0.1 a = 2 cm
a= 2r
0.01 a = sqrt(2)*r
where:
0.001
0.001 0.01 0.1 1 10 a = radius of coil
r (m)
r = read range
Note: BO = 1.5 µWb/m2 is used. The above result indicates that the optimum radius of
loop for a reader antenna is 1.414 times the read
range r.

AN678
WIRE TYPES AND OHMIC LOSSES EXAMPLE 3:
The skin depth for a copper wire at 125 kHz can be
Wire Size and DC Resistance
calculated as:
The diameter of electrical wire is expressed as the
American Wire Gauge (AWG) number. The gauge EQUATION 14:
number is inversely proportional to diameter and the
1
diameter is roughly doubled every six wire gauges. The δ = --------------------------------------------------------------------
–7 –7
wire with a smaller diameter has higher DC resistance. πf ( 4π × 10 ) ( 5.8 × 10 )
The DC resistance for a conductor with a uniform
cross-sectional area is found by:
0.06608
= ------------------- ( m)
EQUATION 12: f
l
RDC = ------ (Ω)
σS
= 0.187 ( mm )
where:
l = total length of the wire
The wire resistance increases with frequency, and the
σ = conductivity resistance due to the skin depth is called an AC
S = cross-sectional area resistance. An approximated formula for the ac resis-
tance is given by:
Table 1 shows the diameter for bare and
enamel-coated wires, and DC resistance.
EQUATION 15:
AC Resistance of Wire
1 a
At DC, charge carriers are evenly distributed through Rac ≈ ------------- = ( R DC ) ------ (Ω)
2 σ πδ 2δ
the entire cross section of a wire. As the frequency
increases, the reactance near the center of the wire
where:
increases. This results in higher impedance to the cur-
rent density in the region. Therefore, the charge moves a = coil radius
away from the center of the wire and towards the edge
For copper wire, the loss is approximated by the DC
of the wire. As a result, the current density decreases
resistance of the coil, if the wire radius is greater than
in the center of the wire and increases near the edge of
0.066 ⁄ f cm. At 125 kHz, the critical radius is 0.019
the wire. This is called a skin effect. The depth into the
cm. This is equivalent to #26 gauge wire. Therefore, for
conductor at which the current density falls to 1/e, or
minimal loss, wire gauge numbers of greater than #26
37% of its value along the surface, is known as the skin
should be avoided if coil Q is to be maximized.
depth and is a function of the frequency and the perme-
ability and conductivity of the medium. The skin depth
is given by:
EQUATION 13:
1
δ = -----------------
πfµ σ
where:
f = frequency
µ = permeability of material
σ = conductivity of the material

AN678
TABLE 1: AWG WIRE CHART
Wire Dia. in Dia. in Cross Wire Dia. in Dia. in Cross

Ohms/ Ohms/
Size Mils Mils Section Size Mils Mils Section
1000 ft. 1000 ft.
(AWG) (bare) (coated) (mils) (AWG) (bare) (coated) (mils)
1 289.3 — 0.126 83690 26 15.9 17.2 41.0 253
2 287.6 — 0.156 66360 27 14.2 15.4 51.4 202
3 229.4 — 0.197 52620 28 12.6 13.8 65.3 159
4 204.3 — 0.249 41740 29 11.3 12.3 81.2 123
5 181.9 — 0.313 33090 30 10.0 11.0 106.0 100
6 162.0 — 0.395 26240 31 8.9 9.9 131 79.2
7 166.3 — 0.498 20820 32 8.0 8.8 162 64.0
8 128.5 131.6 0.628 16510 33 7.1 7.9 206 50.4
9 114.4 116.3 0.793 13090 34 6.3 7.0 261 39.7
10 101.9 106.2 0.999 10380 35 5.6 6.3 331 31.4
11 90.7 93.5 1.26 8230 36 5.0 5.7 415 25.0
12 80.8 83.3 1.59 6530 37 4.5 5.1 512 20.2
13 72.0 74.1 2.00 5180 38 4.0 4.5 648 16.0
14 64.1 66.7 2.52 4110 39 3.5 4.0 847 12.2
15 57.1 59.5 3.18 3260 40 3.1 3.5 1080 9.61
16 50.8 52.9 4.02 2580 41 2.8 3.1 1320 7.84
17 45.3 47.2 5.05 2060 42 2.5 2.8 1660 6.25
18 40.3 42.4 6.39 1620 43 2.2 2.5 2140 4.84
19 35.9 37.9 8.05 1290 44 2.0 2.3 2590 4.00
20 32.0 34.0 10.1 1020 45 1.76 1.9 3350 3.10
21 28.5 30.2 12.8 812 46 1.57 1.7 4210 2.46
22 25.3 28.0 16.2 640 47 1.40 1.6 5290 1.96
23 22.6 24.2 20.3 511 48 1.24 1.4 6750 1.54
24 20.1 21.6 25.7 404 49 1.11 1.3 8420 1.23
25 17.9 19.3 32.4 320 50 0.99 1.1 10600 0.98
-3
Note: 1 mil = 2.54 x 10-3 cm Note: 1 mil = 2.54 x 10 cm

AN678
INDUCTANCE OF VARIOUS Inductance of a Straight Wire
ANTENNA COILS The inductance of a straight wound wire shown in
Figure 1 is given by:
The electrical current flowing through a conductor
produces a magnetic field. This time-varying magnetic
EQUATION 17:
field is capable of producing a flow of current through
another conductor. This is called inductance. The
L = 0.002l log 2l 3 ( µH )
inductance L depends on the physical characteristics of e ----
- – ---
a 4
the conductor. A coil has more inductance than a
straight wire of the same material, and a coil with more where:
turns has more inductance than a coil with fewer turns.
The inductance L of inductor is defined as the ratio of l and a = length and radius of wire in cm,
the total magnetic flux linkage to the current Ι through respectively.
the inductor: i.e.,
EXAMPLE 4: CALCULATION OF
EQUATION 16: INDUCTANCE FOR A
STRAIGHT WIRE
Nψ (Henry)
L = -------- The inductance of a wire with 10 feet (304.8 cm)
I
long and 2 mm diameter is calculated as follows:
where:
EQUATION 18:
N = number of turns
I = current ( 304.8 )
L = 0.002 ( 304.8 ) ln  2-------------------- 3
- – ---
 0.1  4
Ψ = magnetic flux
= 0.60967 ( 7.965 )
In a typical RFID antenna coil for 125 kHz, the
inductance is often chosen as a few (mH) for a tag and
from a few hundred to a few thousand (µH) for a reader. = 4.855 ( µH )
For a coil antenna with multiple turns, greater
inductance results with closer turns. Therefore, the tag
antenna coil that has to be formed in a limited space Inductance of a Single Layer Coil
often needs a multi-layer winding to reduce the number The inductance of a single layer coil shown in Figure 7
of turns. can be calculated by:
The design of the inductor would seem to be a relatively
simple matter. However, it is almost impossible to EQUATION 19:
construct an ideal inductor because:
2
( aN )
a) The coil has a finite conductivity that results in L = -------------------------------- ( µH )
22.9l + 25.4a
losses, and
b) The distributed capacitance exists between where:
turns of a coil and between the conductor and
surrounding objects. a = coil radius (cm)
The actual inductance is always a combination of l = coil length (cm)
resistance, inductance, and capacitance. The apparent N = number of turns
inductance is the effective inductance at any frequency,
i.e., inductive minus the capacitive effect. Various FIGURE 7: A SINGLE LAYER COIL
formulas are available in literatures for the calculation
of inductance for wires and coils[ 1, 2].
l
The parameters in the inductor can be measured. For
example, an HP 4285 Precision LCR Meter can
measure the inductance, resistance, and Q of the coil. a
Note: For best Q of the coil, the length should

be roughly the same as the diameter of
the coil.

AN678
Inductance of a Circular Loop Antenna Coil EXAMPLE 5: EXAMPLE ON NUMBER OF
with Multilayer TURNS
To form a big inductance coil in a limited space, it is Equation 21 results in N = 200 turns for L = 3.87 mH
more efficient to use multilayer coils. For this reason, a with the following coil geometry:
typical RFID antenna coil is formed in a planar
a = 1 inch (2.54 cm)
multi-turn structure. Figure 8 shows a cross section of
the coil. The inductance of a circular ring antenna coil h = 0.05 cm
is calculated by an empirical formula[2]: b = 0.5 cm
To form a resonant circuit for 125 kHz, it needs a
EQUATION 20: capacitor across the inductor. The resonant capaci-
2
tor can be calculated as:
0.31 ( aN )
L = ---------------------------------- ( µH )
6a + 9h + 10b EQUATION 22:
where: 1 1
C = ------------------
2
- = ----------------------------------------------------------------------------
2 3 –3
( 2πf ) L ( 4π ) ( 125 × 10 ) ( 3.87 × 10 )
a = average radius of the coil in cm
N = number of turns
b = winding thickness in cm = 419 ( pF )
h = winding height in cm
FIGURE 8: A CIRCULAR LOOP AIR CORE Inductance of a Square Loop Coil with
ANTENNA COIL WITH Multilayer
N-TURNS If N is the number of turns and a is the side of the
square measured to the center of the rectangular cross
section that has length b and depth c as shown in
N-Turn Coil Figure 9, then[2]:
b a
center of coil EQUATION 23:
a
X
L = 0.008aN  2.303log 10  ------------ + 0.2235 ------------ + 0.726 ( µH )
2 a b+c
b   b + c a 
h
The formulas for inductance are widely published and
provide a reasonable approximation for the relationship
The number of turns needed for a certain inductance between inductance and number of turns for a given
value is simply obtained from Equation 20 such that: physical size[1]-[4]. When building prototype coils, it is
wise to exceed the number of calculated turns by about
EQUATION 21: 10%, and then remove turns to achieve resonance. For
production coils, it is best to specify an inductance and
tolerance rather than a specific number of turns.
L µH ( 6a + 9h + 10b )
N = -------------------------------------------------
2
-
( 0.31 )a FIGURE 9: A SQUARE LOOP ANTENNA
COIL WITH MULTILAYER
b
N-Turn Coil
c
a a
(a) Top View (b) Cross Sectional View

AN678
CONFIGURATION OF ANTENNA inductance of the coil. A typical number of turns of the
coil is in the range of 100 turns for 125 kHz and 3~5
COILS
turns for 13.56 MHz devices.
Tag Antenna Coil For a longer read range, the antenna coil must be tuned
An antenna coil for an RFID tag can be configured in properly to the frequency of interest (i.e., 125 kHz).
many different ways, depending on the purpose of the Voltage drop across the coil is maximized by forming a
application and the dimensional constraints. A typical parallel resonant circuit. The tuning is accomplished
inductance L for the tag coil is a few (mH) for 125 kHz with a resonant capacitor that is connected in parallel
devices. Figure 10 shows various configurations of tag to the coil as shown in Figure 10. The formula for the
antenna coils. The coil is typically made of a thin wire. resonant capacitor value is given in Equation 22.
The inductance and the number of turns of the coil can
be calculated by the formulas given in the previous sec-
tion. An Inductance Meter is often used to measure the
FIGURE 10: VARIOUS CONFIGURATIONS OF TAG ANTENNA COIL

a
N-turn Coil
2a
b
d = 2a
2a
Co Co Co

AN678
Reader Antenna Coil (125 kHz). The other loop is called a coupling loop
(primary), and it is formed with less than two or three
The inductance for the reader antenna coil is typically
turns of coil. This loop is placed in a very close
in the range of a few hundred to a few thousand
proximity to the main loop, usually (but not necessarily)
micro-Henries (µH) for low frequency applications. The
on the inside edge and not more than a couple of cen-
reader antenna can be made of either a single coil that
timeters away from the main loop. The purpose of this
is typically forming a series resonant circuit or a double
loop is to couple signals induced from the main loop to
loop (transformer) antenna coil that forms a parallel
the reader (or vise versa) at a more reasonable
resonant circuit.
matching impedance.
The series resonant circuit results in minimum
The coupling (primary) loop provides an impedance
impedance at the resonance frequency. Therefore, it
match to the input/output impedance of the reader. The
draws a maximum current at the resonance frequency.
coil is connected to the input/output signal driver in the
On the other hand, the parallel resonant circuit results
reader electronics. The main loop (secondary) must be
in maximum impedance at the resonance frequency.
tuned to resonate at the resonance frequency and is
Therefore, the current becomes minimized at the reso-
not physically connected to the reader electronics.
nance frequency. Since the voltage can be stepped up
by forming a double loop (parallel) coil, the parallel The coupling loop is usually untuned, but in some
resonant circuit is often used for a system where a designs, a tuning capacitor C2 is placed in series with
higher voltage signal is required. the coupling loop. Because there are far fewer turns on
the coupling loop than the main loop, its inductance is
Figure 11 shows an example of the transformer loop
considerably smaller. As a result, the capacitance to
antenna. The main loop (secondary) is formed with
resonate is usually much larger.
several turns of wire on a large frame, with a tuning
capacitor to resonate it to the resonance frequency
FIGURE 11: A TRANSFORMER LOOP ANTENNA FOR READER
Coupling Coil
(primary coil)
C2
To reader electronics
Main Loop
(secondary coil)
C1

AN678
RESONANCE CIRCUITS, QUALITY Parallel Resonant Circuit
FACTOR Q, AND BANDWIDTH Figure 12 shows a simple parallel resonant circuit. The
total impedance of the circuit is given by:
In RFID applications, the antenna coil is an element of
resonant circuit and the read range of the device is
EQUATION 25:
greatly affected by the performance of the resonant
circuit. jωL
Z ( jω ) = --------------------------------------------- (Ω)
2 ωL
Figures 12 and 13 show typical examples of resonant ( 1 – ω LC ) + j -------
R
circuits formed by an antenna coil and a tuning
capacitor. The resonance frequency (fo) of the circuit is where:
determined by:
ω = angular frequency = 2πf
EQUATION 24: R = load resistor
1 The ohmic resistance r of the coil is ignored. The

f o = ------------------ maximum impedance occurs when the denominator in
2π LC
the above equation minimized such as:
where:
EQUATION 26:
L = inductance of antenna coil
C = tuning capacitance 2
ω LC = 1
The resonant circuit can be formed either series or
parallel. This is called a resonance condition and the resonance
The series resonant circuit has a minimum impedance frequency is given by:
at the resonance frequency. As a result, maximum
current is available in the circuit. This series resonant EQUATION 27:
circuit is typically used for the reader antenna.
On the other hand, the parallel resonant circuit has 1
f o = ------------------
maximum impedance at the resonance frequency. It 2π LC
offers minimum current and maximum voltage at the By applying Equation 26 into Equation 25, the
resonance frequency. This parallel resonant circuit is impedance at the resonance frequency becomes:
used for the tag antenna.
EQUATION 28:
Z = R
FIGURE 12: PARALLEL RESONANT

CIRCUIT
R C L
The R and C in the parallel resonant circuit determine

the bandwidth, B, of the circuit.
EQUATION 29:
1
B = --------------- ( Hz )
2πRC

AN678
The quality factor, Q, is defined by various ways such Series Resonant Circuit
as:
A simple series resonant circuit is shown in Figure 13.
The expression for the impedance of the circuit is:
EQUATION 30:
EQUATION 33:
Energy Stored in the System per One Cycle
Q = ------------------------------------------------------------------------------------------------------------------
Energy Dissipated in the System per One Cycle
Z ( jω ) = r + j ( XL – XC ) (Ω)
fo
= ---- where:
B
r = ohmic resistance of the circuit
where:
fo = resonant frequency EQUATION 34:
B = bandwidth
X L = 2πfo L (Ω)
By applying Equation 27 and Equation 29 into
Equation 30, the loaded Q in the parallel resonant
circuit is:
EQUATION 35:
EQUATION 31: 1
Xc = --------------- (Ω)
2πf o C
C
Q = R ----
L The impedance in Equation 33 becomes minimized
when the reactance component cancelled out each
The Q in parallel resonant circuit is directly proportional
other such that XL = XC. This is called a resonance
to the load resistor R and also to the square root of the
condition. The resonance frequency is same as the
ratio of capacitance and inductance in the circuit.
parallel resonant frequency given in Equation 27.
When this parallel resonant circuit is used for the tag
antenna circuit, the voltage drop across the circuit can FIGURE 13: SERIES RESONANCE
be obtained by combining Equations 7 and 31, CIRCUIT
EQUATION 32: r C
Eo
V o = 2πfo NQSBo cos α
EIN L
= 2πf o N  R ---- SB o cos α
C 125 kHz
L
The above equation indicates that the induced voltage

in the tag coil is inversely proportional to the square
root of the coil inductance, but proportional to the num-
ber of turns and surface area of the coil.
The parallel resonant circuit can be used in the trans- The half power frequency bandwidth is determined by
former loop antenna for a long-range reader as dis- r and L, and given by:
cussed in "Reader Antenna Coil" (Figure 11). The
voltage in the secondary loop is proportional to the turn EQUATION 36:
ratio (n2/n1) of the transformer loop. However, this high
voltage signal can corrupt the receiving signals. For this r
reason, a separate antenna is needed for receiving the B = ---------- ( Hz )
2πL
signal. This receiving antenna circuit should be tuned
to the modulating signal of the tag and detunned to the
carrier signal frequency for maximum read range.

AN678
The quality factor, Q, in the series resonant circuit is EXAMPLE 6: CIRCUIT PARAMETERS.
given by:
If the series resistance of the circuit is 15 Ω, then the
L and C values form a 125 kHz resonant circuit with
EQUATION 37: Q = 8 are:
ωL 1
------- = ------------ ; for unloaded circuit EQUATION 40:
fo r ωC r
Q = ---- = X L = Qr s = 120Ω
B 1 L
--- ---- ; for loaded circuit
r C XL 120
L = -------- = --------------------------------- = 153 ( µH )
2πf 2π ( 125 kHz )
The series circuit forms a voltage divider; the voltage
drops in the coil is given by: 1 1
C = ----------------- = ----------------------------------------------- = 10.6 ( nF )
2πfX L 2π ( 125 kHz ) ( 120 )
EQUATION 38:
jX L
V o = -------------------------------V in EXAMPLE 7: CALCULATION OF READ
r + jX L – jX c
RANGE
or Let us consider designing a reader antenna coil with
L = 153 µH, diameter = 10 cm, and winding
EQUATION 39: thickness and height are small compared to the
diameter.
Vo XL XL Q
--------- = ---------------------------------------------- = ----------------------------------------------- = -------------------------------------------- The number of turns for the inductance can be
Vin 2 2 2 2
r + ( X L – Xc )  X L – X c  X L – X c calculated from Equation 21, resulting in 24 turns.
r 1 +  --------------------- 1 +  ---------------------
 r   r 
If the current flow through the coil is 0.5 amperes,
the ampere-turns becomes 12. Therefore, the read
range for this coil will be about 20 cm with a credit
card size tag.

AN678
Q and Bandwidth This problem may be solved by separating the
transmitting and receiving coils. The transmitting coil
Figure 14 shows the approximate frequency bands for
can be designed with higher Q and the receiving coil
common forms of Amplitude Shift Keying (ASK),
with lower Q.
Frequency Shift Keying (FSK), and Phase Shift Keying
(PSK) modulation. For a full recovery of data signal Limitation on Q
from the tag, the reader circuit needs a bandwidth that When designing a reader antenna circuit, the
is at least twice the data rate. Therefore, if the data rate temptation is to design a coil with very high Q. There
is 8 kHz for an ASK signal, the bandwidth must be at are three important limitations to this approach.
least 16 kHz for a full recovery of the information that is
coming from the tag. a) Very high voltages can cause insulation
breakdown in either the coil or resonant
The data rate for FSK (÷ 10) signal is 12.5 kHz. capacitor.
Therefore, a bandwidth of 25 kHz is needed for a full
data recovery. For example, a 1 ampere of current flow in a 2 mH
coil will produce a voltage drop of 1500 VPP. Such
The Q for this FSK (÷ 10) signal can be obtained from voltages are easy to obtain but difficult to isolate.
Equation 30. In addition, in the case of single coil reader
designs, recovery of the return signal from the tag
EQUATION 41: must be accomplished in the presence of these
fo high voltages.
125 kHz
Q = ---- = -------------------- b) Tuning becomes critical.
B 25 kHz
To implement a high Q antenna circuit, high volt-
= 5 age components with a close tolerance and high
stability would have to be used. Such parts are
For a PSK (÷ 2) signal, the data rate is 62.5 kHz (if the generally expensive and difficult to obtain.
carrier frequency is 125 kHz) therefore, the reader c) As the Q of the circuit gets higher, the amplitude
circuit needs 125 kHz of bandwidth. The Q in this case of the return signal relative to the power of the
is 1, and consequently the circuit becomes carrier gets proportionally smaller complicating
Q-independent. its recovery by the reader circuit.
FIGURE 14: Q FACTOR VS. MODULATION SIGNALS

35
30
Q = 30
25
20
15
Q = 14
10
Q=8
Q =5
5
PSK FSK
FSK PSK
÷2 ASK ÷8,10
÷8,10 ÷2
0
50 75 100 125 150 175 200

AN678
Tuning Method • S-parameter or Impedance Measurement
Method using Network Analyzer:
The circuit must be tuned to the resonance frequency
for a maximum performance (read range) of the device. a) Set up an S-Parameter Test Set (Network
Two examples of tuning the circuit are as follows: Analyzer) for S11 measurement, and do a
calibration.
• Voltage Measurement Method:
b) Measure the S11 for the resonant circuit.
a) Set up a voltage signal source at the
c) Reflection impedance or reflection
resonance frequency (125 kHz)
admittance can be measured instead of the
b) Connect a voltage signal source across the S11.
resonant circuit.
d) Tune the capacitor or the coil until a
c) Connect an Oscilloscope across the maximum null (S11) occurs at the
resonant circuit. resonance frequency, fo. For the impedance
d) Tune the capacitor or the coil while measurement, the maximum peak will occur
observing the signal amplitude on the for the parallel resonant circuit, and
Oscilloscope. minimum peak for the series resonant
e) Stop the tuning at the maximum voltage. circuit.
FIGURE 15: VOLTAGE VS. FREQUENCY FOR RESONANT CIRCUIT
f
fo
FIGURE 16: FREQUENCY RESPONSES FOR RESONANT CIRCUIT
S11 Z Z
f f f
fo fo fo
(a) (b) (c)

Note 1: (a) S11 Response, (b) Impedance Response for a Parallel Resonant Circuit, and (c)
Impedance Response for a Series Resonant Circuit.
2: In (a), the null at the resonance frequency represents a minimum input reflection at
the resonance frequency. This means the circuit absorbs the signal at the frequency
while other frequencies are reflected back. In (b), the impedance curve has a peak
at the resonance frequency. This is because the parallel resonant circuit has a max-
imum impedance at the resonance frequency. (c) shows a response for the series
resonant circuit. Since the series resonant circuit has a minimum impedance at the
resonance frequency, a minimum peak occurs at the resonance frequency.

AN678
READ RANGE OF RFID DEVICES With a given operating frequency, the above conditions
(a – c) are related to the antenna configuration and
Read range is defined as a maximum communication tuning circuit. The conditions (d – e) are determined by
distance between the reader and tag. The read range a circuit topology of the reader. The condition (f) is
of typical passive RFID products varies from about called the communication protocol of the device, and
1 inch to 1 meter, depending on system configuration. (g) is related to a firmware program for data interpreta-
The read range of an RFID device is, in general, tion.
affected by the following parameters:
Assuming the device is operating under a given
a) Operating frequency and performance of condition, the read range of the device is largely
antenna coils affected by the performance of the antenna coil. It is
b) Q of antenna and tuning circuit always true that a longer read range is expected with
c) Antenna orientation the larger size of the antenna. Figures 17 and 18 show
typical examples of the read range of various passive
d) Excitation current and voltage
RFID devices.
e) Sensitivity of receiver
f) Coding (or modulation) and decoding (or
demodulation) algorithm
g) Number of data bits and detection
(interpretation) algorithm
h) Condition of operating environment (metallic,
electrical noise), etc.
FIGURE 17: READ RANGE VS. TAG SIZE FOR PROXIMITY APPLICATIONS
0.5" diameter
Tag
ch 1" diameter
1 in
Tag
s
2 inche
Proximity Reader
Antenna 2" diameter
(4" x 3") 3 ~ 4 inches
Tag
4 ~ 5 inch 3.37" x 2.125"

es
(Credit Card Type: ISO Card)
Tag
FIGURE 18: READ RANGE VS. TAG SIZE FOR LONG RANGE APPLICATIONS
0.5" diameter
Tag
s
he
i nc
4 ~5 1" diameter
Tag
he s
8~ 12 inc
Long Range 2" diameter
Reader Antenna 18 ~ 22 inches Tag
(16" x 32")
27 ~ 3
2 inch 3.37" x 2.125"
es
(Credit Card Type: ISO Card)
Tag

AN678
REFERENCES
1. Frederick W. Grover, Inductance Calculations:
Working Formulas and Tables, Dover
Publications, Inc., New York, NY., 1946.
2. Keith Henry, Editor, Radio Engineering
Handbook, McGraw-Hill Book Company, New
York, NY., 1963.
3. V. G. Welsby, The Theory and Design of
Inductance Coils, John Wiley and Sons, Inc.,
1960.
4. James K. Hardy, High Frequency Circuit Design,
Reston Publishing Company, Inc., Reston,
Virginia, 1975.

M microID™ 125 kHz DESIGN GUIDE
FSK Reader Reference Design
1.0 INTRODUCTION 2.0 READER CIRCUITS
This application note is written as a reference guide for The RFID reader consists of transmitting and receiving
FSK reader designers. Microchip Technology Inc. sections. It transmits a carrier signal, receives the
provides basic reader electronics circuitry for the backscattering signal, and performs data processing.
MCRF200 customers as a part of this design guide. The reader also communicates with an external host
The circuit is designed for a read range of 3 ~ 5 inches computer. A basic block diagram of the typical RFID
with an access control card. The microID FSK Reader reader is shown in Figure 2-1.
(demo unit), which is built based on the FSK reference
design, is available in the microID Designers Kit
(DV103001). The circuit can be modified for longer
read range or other applications with the MCRF200. An
electronic copy of the FSK microID PICmicro® source
code is available upon request.
FIGURE 2-1: BLOCK DIAGRAM OF TYPICAL RFID READER FOR FSK SIGNAL (125 kHz)
Transmitting Section
Time Base Signal Generator Carrier Signal Amplifier

÷ 32 Antenna Coil
(4 MHz Crystal Oscillator) (Power Driver)
125 kHz
Microcontroller
Data Decoding Filter, Amplifier,
Interface with and Pulse Shaping Envelope Detector
CLK Host Computer
Serial Interface (RS-232) Receiving Section
To Host Computer
PICmicro is a registered trademark of Microchip Technology Inc.

microID™ 125 kHz Design Guide
2.1 Transmitting Section 2.2 Receiving Section
The transmitting section contains circuitry for a carrier The receiving section consists of an antenna coil,
signal (125 kHz), power amplifiers, and a tuned demodulator, filters, amplifiers, and microcontroller. In
antenna coil. applications for close proximity read range, a single coil
The 125 kHz carrier signal is typically generated by is often used for both transmitting and receiving. For
dividing a 4 MHz (4 MHz/32 = 125 kHz) crystal long read-range applications, however, separated
oscillator signal. The signal is amplified before it is fed antennas may be used. More details on the antenna
into the antenna tuning circuit. A complementary power coil are given in AN678, RFID Coil Design, page 25.
amplifier circuit is typically used to boost the In the FSK communication protocol, a ‘0’ and a ‘1’ are
transmitting signal level. represented by two different frequencies. In the
An antenna impedance tuning circuit consisting of MCRF200, a ‘0’ and a ‘1’ are represented by Fc/8 and
capacitors is used to maximize the signal level at the Fc/10, respectively. Fc is the carrier frequency. The
carrier frequency. This tuning circuit is also needed to MCRF200 sends this FSK signal to the reader by an
form an exact LC resonant circuit for the carrier signal. amplitude modulation of the carrier signal.
The tuning compensates the variations in the The FSK reader needs two steps for a full recovery of
component values and the perturbation of coil the data. The first step is demodulating the
inductance due to environment effect. A design guide backscattering signal, and the second step is detecting
for the antenna coil is given in AN678, RFID Coil the frequency (or period) of the demodulation signal.
Design, page 25. The demodulation is accomplished by detecting the
2.1.1 LIMITS ON TRANSMITTING SIGNAL LEVEL envelope of the carrier signal. A half-wave
(FCC PART 15) IN THE USA capacitor-filtered rectifier circuit is used for the
demodulation process. A diode detects the peak
Each country limits the signal strength of the RF wave voltage of the backscattering signal. The voltage is then
that is intentionally radiated by a device. In the USA, the fed into an RC charging/discharging circuit. The RC
signal strength of the carrier signal (125 kHz) radiating time constant must be small enough to allow the
from the antenna coil must comply with the FCC voltage across C to fall fast enough to keep in step with
(Federal Communications Commission) part 15 the envelope. However, the time constant must not be
regulation. The signal level is specified by the 47 CFR so small as to introduce excessive ripple. The
Part 15.209a of the federal regulation. For a 125 kHz demodulated signal must then pass through a filter and
signal, the FCC limits the signal level to 19.2 µv per signal shaping circuit before it is fed to the microcon-
meter, or 25.66 dBµV (i.e., 20 log(19.2) = 25.66 dBµV), troller. The microcontroller performs data decoding and
at 300 meters away from the antenna. For a close communicates with the host computer through an
distance measurement, an extrapolation rule (40 dB RS-232 or other serial interface protocols.
per decade) is applied (Part 15.31.f.2). For example,
the signal level at 30 meters away from the device must
not exceed:
25.66 dBµV + 40 dBµV = 65.66 dBµV

3.0 microID FSK READER frequency. Since the C2 is grounded, the carrier signal
(125 kHz) is filtered out to ground after passing the
The electronic circuitry for an FSK reader is shown in antenna coil. The circuit provides a minimum imped-
Figure 3-1. The reader needs +9 VDC power supply. ance at the resonance frequency. This results in
The 125 kHz carrier signal is generated by dividing the maximizing the antenna current, and therefore, the
4 MHz time base signal that is generated by a crystal magnetic field strength is maximized.
oscillator. A 16-stage binary ripple counter (74HC4060)
is used for this purpose. The 74HC4060 also provides L2, C15, D7, and the other bottom parts in the circuit
a clock signal for the PIC16C84 microcontroller. The form a signal receiving section. The voltage drop in the
125 kHz signal is passed to an RF choke (L1) and filter antenna coil is a summation (superposition) of
before it is fed into a power amplifier that is formed by transmitting signal and backscattering signal. The D7 is
a pair of complementary bipolar transistors (Q2 and a demodulator which detects the envelope of the
Q3). backscattering signal. The FSK signal waveforms are
shown in Figure 3-1.
For long read-range applications, this power amplifier
circuit can be modified. Power MOSFETs may be used D7 and C19 form a half-wave capacitor-filtered rectifier
instead of the bipolar transistors (2N2222). These circuit. The detected envelope signal is charged into
power MOSFETs can be driven by +24 VDC power the C19. R21 provides a discharge path for the voltage
supply. A push-pull predriver can be added at the front charged in the C19. This voltage passes active filters
of the complementary circuit. This modification will (U8) and the pulse shaping circuitry (U8) before it is fed
enhance the signal level of the carrier signal. into the PIC16C84 for data processing.
The reader circuit uses a single coil for both The PIC16C84 microcontroller performs data decoding
transmitting and receiving signals. An antenna coil and communicates with the host computer via an
(L2: 1.62 mH) and a resonant capacitor (C2: 1000 pF) RS-232 serial interface.
forms a series resonant circuit for a 125 kHz resonance
FIGURE 3-1: SIGNAL WAVEFORM FOR FSK PROTOCOL (Fc = 125 KHZ)
1 2 3 4 5 6 7 8 9 10 ô í ÷ û ø ù î 1 2 3 4 5 6 7 8 9 10 ôí ÷û øù î 1 2 3
Transmitting Signal
Fc/8 =
Fc/10 = 12.5 kHz 15.625 kHz
(‘1’) (‘0’) (‘1’) (‘0’)
Data Signal
80 µsec 64 µsec 80 µsec 64 µsec
Backscattering
Signal
Signal in Receiver
Coil
Output Signal of
Envelop Detector
Detected Signal
after Pulse Shaping
Circuit

4.0 FSK READER SCHEMATIC
PIC16C84

5.0 FSK READER BILL OF MATERIALS
Reference
Item # Qty Part # Part Description Manufacturer Vendor Vendor Part #
Designator
1 1 110-93-318-41-001 xU5 SOCKET, 18P OPEN MILL-MAX DIGIKEY ED3318-ND
FRAME COLLET
(0.300)
2 1 DE9S-FRS P2 CONN, D-SUB 9P SPC
RECPT RT ANGLE TECHNOLOGY
3 1 DJ005B P1 JACK, POWER, LZR
2.5 mm DC ELECTRONICS
PC MOUNT
4 1 PKM22EPP-4001 SP1 BUZZER, PIEZO, MURATA
4kHz, 3-20V
5 2 D220J20COGHAAAC C2, C3 CAP, 22 pF CER DISK PHILIPS DIGIKEY 1330PH-ND
RAD COG 100V
6 6 ECQ-P6102JU C7, C8, C10, CAP, 0.001 uF PHILIPS DIGIKEY P3497-ND
C14, C16, POLYPROPYLENE
C18 630V
7 2 2222 370 52102 C15, C17 CAP, 0.001 uF METAL PHILIPS DIGIKEY 3001PH-ND
FILM, 5%, RAD, 400V
8 1 ECU-S2A182JCB C9 CAP, 1800 pF PHILIPS DIGIKEY P4864-ND
MONOLITH CERM,
5%, RAD, 100V
9 1 2222 370 52222 C19 CAP, 0.0022 UF 400V PHILIPS DIGIKEY 3003PH-ND
5% MF BOX
10 1 ECU-S1H682JCB C12 CAP, 6800 pF 50V PANASONIC DIGIKEY P4946-ND
CERAMIC MONO 5%
11 2 ECQ-E1104KF C4, C11 CAP, 0.1UF 100VDC PANASONIC DIGIKEY EF1104-ND
10% RAD METAL
POLY CAP
12 3 ECS-F1CE106K C5, C6, C13 CAP, TANT, 10uF, 16V PANASONIC DIGIKEY P2038-ND
13 1 ECS-F1AE107 C1 CAP, 100 UFD @ PANASONIC DIGIKEY P2032-ND
10VDC 20%
TANTALUM CAP
14 6 1N4148 D1-D6 DIODE, GENERAL DIODES INC. DIGIKEY 1N4148DITR-
PURPOSE, 1N4148 ND
(DO-35)
15 1 1N4936 D7 DIODE, 1A 400V DIODES INC DIGIKEY 1N4936CT-ND
FAST-RECOVERY
RECTIFIER
16 1 -SPARE- LED1 -SPARE- LOCATION
DO NOT INSTALL
17 1 78F102J L1 INDUCTOR, 1000 µH, JW MILLER DIGIKEY M7849-ND
COATED
18 1 MCT0003-001 L2 INDUCTOR, 1.62 mH CORNELL DUBI-
LIER
19 3 2N2907A Q1, Q3, Q4 TRANSISTOR, PNP, MOTOROLA
2N2907A, TO-92
20 1 2N2222A Q2 TRANSISTOR, NPN, MOTOROLA ALLIED 2N2222A
2N2222A, TO-92
21 2 5043CX10R0J R10, R13 RES, CF 10 OHM PHILLIPS
1/4W 5%
22 1 82E CR-1/4W-B 5% R11 RES, CF 82 OHM YAGEO DIGIKEY 82QBK-ND
1/4W 5%
23 2 5043CX100R0J R18, R21 RES, CF 100 OHM PHILLIPS
1/4W 5%
24 3 5043CX330R0J R4, R14, R17 RES, CF 330 OHM PHILLIPS
1/4W 5%

Reference
Designator
25 1 5043CX470R0J R7 RES, CF 470 OHM PHILLIPS
5% 1/4W
26 1 1K8 CR-1/4W-B 5% R3 RES, CF 1.8K OHM YAGEO DIGIKEY 1.8KQBK-ND
1/4W 5%
27 1 1K82 MF-1/4W-B 1% R12 RES, MF 1.82K OHM YAGEO DIGIKEY 1.82KXBK-ND
1/4W 1%
28 1 2K67 MF-1/4W-B 1% R15 RES, 2.67K OHM YAGEO DIGIKEY 2.67KXBK-ND
1/4W 1% MF
1/4W 5%
30 4 10K CR-1/4W-B 5% R1, R26, R27, RES, CF 10K OHM YAGEO DIGIKEY 10KQBK-ND
R28 1/4W 5%
31 3 5043ED10K00F R16, R29, RES, MF 10K PHILLIPS
R30 1/4W 1%
32 2 12K CR-1/4W-B 5% R20, R25 RES, CF 12K OHM YAGEO DIGIKEY 12KQBK-ND
1/4W 5%
1/4W 1%
34 1 22K CR-1/4W-B 5% R6 RES, CF 22K OHM YAGEO DIGIKEY 22KQBK-ND
1/4W 5%
1/4W 1%
36 1 82K5 MF-1/4W-B 1% R23 RES, 82.5K OHM YAGEO DIGIKEY 82.5KXBK-ND
1/4W 1% MF
37 1 5043CX100K0J R9 RES, CF 100K PHILLIPS
5% 1/4W
38 2 1M0 CR-1/4W-B 5% R5, R24 RES, CF 1.0M OHM YAGEO DIGIKEY 1.0MQBK-ND
1/4W 5%
39 1 390K CR-1/4W-B 5% R31 RES, 390K OHM YAGEO DIGIKEY 390KQBK-ND
1/4W 5% CF
40 1 LM78M12Ct U1 IC, REG 12V 3 TERM NATIONAL DIGIKEY LM78M12CT-
POS (TO-220) ND
41 1 LM78L05ACZ U2 IC, REG, +5V 0.1A NATIONAL DIGIKEY LM78L05ACZ-
TO-92 ND
42 1 MM74HC04N U3 IC, HEX INVERTER FAIRCHILD DIGIKEY MM74HC04N-
14P DIP SEMICONDUC- ND
TOR
43 1 MM74HC4060N U4 IC, 14 STAGE BINARY FAIRCHILD DIGIKEY MM74HC4060N
COUNTER, 16P DIP SEMICONDUC- -ND
TOR
44 1 PIC16C84/P U5 IC, PIC16C84 MICROCHIP
PLASTIC, 14P DIP
45 1 CD4017BCN U6 IC, DECADE FAIRCHILD DIGIKEY CD4017BCN-
COUNTER ND
46 1 MM74HC74AN U7 IC, DUAL D TYPE FAIRCHILD DIGIKEY MM74HC74AN-
FLIP FLOP 14P DIP ND
47 1 TL084CN U8 IC, QUAD OP AMP, SGS THOMP- MOUSER 511-TL084CN
14P DIP SON
48 1 EFO-EC4004A4 Y1 RESONATOR, PANASONIC DIGIKEY PX400-ND
4.00MHZ CERAMIC
W/CAP

6.0 FSK SOURCE CODE FOR THE PICmicro® MCU
The following source code is for the PIC16C84 microcontroller used in the FSK reader electronics.
; #=#=#=#=#=#=#=#=#=#=#= PROJECT Microchip FSK Reader =#=#=#=#=#=#=#=#=#=#=#

;
; PIC16C84 running at 4MHz, Ti=1us
; ///////////////////////////////////////////////////////////////////////////
; Revision history
; ///////////////////////////////////////////////////////////////////////////
;
; Ver Date Comment
;
; 0.01 29 Dec 97 Copied from MChip\Reader\FSK
; 0.03 28 Jan 98 TRANSMIT TAB (h’09’) REGULARLY
; 20 Aug 98 Modified to correct FSK comments
;
; Tbit=50Tcy=400Ti
; Ttag=96Tbit
; Header=h’802A’
;
processor pic16c84
#include “p16c84.inc”
__config b’11111111101001’
; Code Protect on, power-up timer on, WDT off, XT oscillator
#define _CARRY STATUS,0

#define _ZERO STATUS,2
#define _TO STATUS,4
#define _RP0 STATUS,5
#define _BUZZ1 PORTA,0

#define _RS232TX PORTA,2
#define _RS232RX PORTA,3
#define _T0CKI PORTA,4
StartPORTA = b’01100’
StartTRISA = b’11000’
BeepPort = PORTA
Beep0 = StartPORTA
Beep1 = StartPORTA | b’00001’
#define _DATA_IN PORTB,0

#define _UNUSED1 PORTB,1
#define _LED1 PORTB,2
StartPORTB = b’00000000’
StartTRISB = b’00000001’
StartOPTION = b’00001111’ ; TMR0 internal, prescaler off
BO3 = h’0C’
DelayReg = h’0C’
BitCtr = h’0D’
BeepCtrHi = h’0D’
TxByte = h’0E’
BeepCtrLo = h’0E’
Buffer0 = h’10’ ; --- IMMOBILE --- IMMOBILE --- IMMOBILE --- IMMOBILE

Buffer1 = h’11’ ; |
Buffer2 = h’12’ ; |
Buffer3 = h’13’ ; |
Buffer4 = h’14’ ; |
Buffer5 = h’15’ ; |
Buffer6 = h’16’ ; |
Buffer7 = h’17’ ; |
Buffer8 = h’18’ ; |
Buffer9 = h’19’ ; |
BufferA = h’1A’ ; |
BufferB = h’1B’ ; |
;BufferC = h’1C’ ; |
;BufferD = h’1D’ ; |
;BufferE = h’1E’ ; |
;BufferF = h’1F’ ; |
Old0 = h’20’ ; |
Old1 = h’21’ ; |
Old2 = h’22’ ; |
Old3 = h’23’ ; |
Old4 = h’24’ ; |
Old5 = h’25’ ; |
Old6 = h’26’ ; |
Old7 = h’27’ ; |
Old8 = h’28’ ; |
Old9 = h’29’ ; |
OldA = h’2A’ ; |
OldB = h’2B’ ; |
;OldC = h’2C’ ; |
;OldD = h’2D’ ; |
;OldE = h’2E’ ; |
;OldF = h’2F’ ; |
SKIP macro
BTFSC PCLATH,7
endm
org h’0000’ ; *#*#*#* RESET VECTOR *#*#*#*

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A
org h’0004’ ; *#*#*#* INTERRUPT VECTOR *#*#*#*

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A
; ***** Subroutines, Page 0
Delay07 ;[0] Delay 7Ti

NOP ; |
NOP ; |
NOP ; |
RETLW 0 ; |
RS232CR ;[1] Transmit CR on RS232

MOVLW d’13’ ; |
GOTO RS232TxW ; |
RS232TxDigit ;[1] Transmit LSnybble of W on RS232
ANDLW h’0F’ ; |
MOVWF TxByte ; |
MOVLW h’0A’ ; |

SUBWF TxByte,W ; |
BTFSS _CARRY ; |
GOTO DigitLT10 ; |
DigitGE10 ; |
MOVLW ‘A’-’0’-h’0A’ ; |
ADDWF TxByte,f ; |
DigitLT10 ; |
MOVLW ‘0’ ; |
ADDWF TxByte,W ; |
RS232TxW ;[1] Transmit W on RS232 at 9615 baud
MOVWF TxByte ; | TxByte=W
RS232Tx ;[1] Transmit TxByte - 104us = 9615.4 baud
BSF _RS232TX ; | Stop bit
MOVLW d’35’ ; | |
MOVLW DelayReg ; | |
RS232TxD1 ; | |
DECFSZ DelayReg,f ; | |
GOTO RS232TxD1 ; | |
BCF _RS232TX ; | Start bit
NOP ; | |
MOVLW d’32’ ; | |
MOVWF DelayReg ; | |
RS232TxD2 ; | |
CLRF BitCtr ; | BitCtr=#8
BSF BitCtr,3 ; | |
RS232TxL1 ; | {% -4Ti
BTFSC TxByte,0 ; | Transmit TxByte.0, RR TxByte
GOTO RS232TxBit1 ; | |
NOP ; | |
RS232TxBit0 ; | |
BCF _RS232TX ; | |
BCF _CARRY ; | |
GOTO RS232TxBitDone ; | |
RS232TxBit1 ; | |
BSF _RS232TX ; | |
BSF _CARRY ; | |
RS232TxBitDone ; | |
RRF TxByte,f ; | |% 4Ti
MOVLW d’30’ ; | delay 1 bit
RS232TxD3 ; | |
DECFSZ BitCtr,f ; | DEC BitCtr
GOTO RS232TxL1 ; | } until (BitCtr==#0)
CALL Delay04 ; | delay
BSF _RS232TX ; | stop bit
RETLW 0 ; end
; ***** End of subroutines, Page 0
RESET_A
CLRWDT
; Initialise registers
CLRF STATUS ; | Access register page 0
CLRF FSR ; | FSR=#0
MOVLW StartPORTA ; | Initialise PORT and TRIS registers
MOVWF PORTA ; | |
MOVLW StartPORTB ; | |
MOVWF PORTB ; | |
BSF _RP0 ;^| |
MOVLW StartTRISA ;^| |

MOVWF TRISA ;^| |
MOVLW StartTRISB ;^| |
MOVWF TRISB ;^| |
MOVLW StartOPTION ;^| Initialise OPTION register
MOVWF OPTION_REG ;^| |
BCF _RP0 ; | |
CLRF Old0 ; | Clear Old buffer
CLRF Old1 ; | |
CLRF Old2 ; | |
CLRF Old3 ; | |
CLRF Old4 ; | |
CLRF Old5 ; | |
CLRF Old6 ; | |
CLRF Old7 ; | |
CLRF Old8 ; | |
CLRF Old9 ; | |
CLRF OldA ; | |
CLRF OldB ; | |
BigLoop1
;303-581-1041
BSF _LED1 ; LEDs “reading”
CALL Delay07 ; |
BCF _LED2 ; |
MOVLW h’09’ ; Transmit TAB regularly
CALL RS232TxW ; |
MOVLW d’96’ ; set BitCtr
MOVWF BitCtr ; |
GetEdge ; Get an edge on _DATA_IN
BTFSC _DATA_IN ; |
GOTO PreSync_H ; |
NOP ; |
PreSync_L ; |
BTFSC _DATA_IN ; |
GOTO PreSync_H ; |
BTFSC _DATA_IN ; |
GOTO PreSync_H ; |
DoSync_L ; |
CLRWDT ; |
BTFSS _DATA_IN ; |
GOTO DoSync_L ; |
BTFSS _DATA_IN ; |
GOTO DoSync_L ; |
GOTO Sync_Done ; |
; |
PreSync_H ; |
BTFSS _DATA_IN ; |
GOTO PreSync_L ; |
BTFSS _DATA_IN ; |
GOTO PreSync_L ; |
DoSync_H ; |
CLRWDT ; |
BTFSC _DATA_IN ; |
GOTO DoSync_H ; |
BTFSC _DATA_IN ; |
GOTO DoSync_H ; |
GOTO Sync_Done ; |
Sync_Done ; |% 6 to (+4) from edge, say 8 from edge
;% -192Ti from sample
MOVLW d’62’
MOVWF DelayReg
ReadBit ; {% -4-DelayReg*3 Ti from sample
GOTO ReadBitD1 ; delay
ReadBitD1 ; |
DECFSZ DelayReg,f ; |

GOTO ReadBitD1 ;|
CLRF BO3 ;BO3.1=_DATA_IN
BTFSC _DATA_IN ;|
INCF BO3,f ;|% effective sample time
BTFSC _DATA_IN ;|
INCF BO3,f ;|
BTFSC _DATA_IN ;|
INCF BO3,f ;|
BCF _CARRY ;_CARRY=BO3.1
BTFSC BO3,1 ;|
BSF _CARRY ;|
RLF Buffer0,f ;roll in _CARRY
RLF Buffer1,f ;|
RLF Buffer2,f ;|
RLF Buffer3,f ;|
RLF Buffer4,f ;|
RLF Buffer5,f ;|
RLF Buffer6,f ;|
RLF Buffer7,f ;|
RLF Buffer8,f ;|
RLF Buffer9,f ;|
RLF BufferA,f ;|
RLF BufferB,f ;|
;
% 19Ti from sample = -381Ti from sample
MOVLW d’124’ ;set bit delay
MOVWF DelayReg ;|% -379Ti from sample
;% -7-DelayReg*3 Ti from sample
DECFSZ BitCtr,f ; DEC BitCtr
GOTO ReadBit ; } until (BitCtr==#0)
HeadSearch
MOVWF BitCtr ; |
HeadSearchL1 ; {
MOVLW h’80’ ; if (header found)
XORWF BufferB,W ; |
BTFSS _ZERO ; |
GOTO NotHead0 ; |
MOVLW h’2A’ ; |
XORWF BufferA,W ; |
BTFSS _ZERO ; |
GOTO NotHead0 ; {
GOTO HeadFound ; goto HeadFound
NotHead0 ; }
RLF Buffer0,f ; ROL Buffer
RLF Buffer1,f ; |
RLF Buffer2,f ; |
RLF Buffer3,f ; |
RLF Buffer4,f ; |
RLF Buffer5,f ; |
RLF Buffer6,f ; |
RLF Buffer7,f ; |
RLF Buffer8,f ; |
RLF Buffer9,f ; |
RLF BufferA,f ; |
RLF BufferB,f ; |
BCF Buffer0,0 ; |
BTFSC _CARRY ; |
BSF Buffer0,0 ; |
GOTO HeadSearchL1 ; } until (BitCtr==#0)
GOTO BigLoop1 ; goto BigLoop1
HeadFound
CheckSame

MOVF Buffer0,W
XORWF Old0,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer1,W
XORWF Old1,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer2,W
XORWF Old2,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer3,W
XORWF Old3,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer4,W
XORWF Old4,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer5,W
XORWF Old5,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer6,W
XORWF Old6,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer7,W
XORWF Old7,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer8,W
XORWF Old8,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer9,W
XORWF Old9,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferA,W
XORWF OldA,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferB,W
XORWF OldB,W
BTFSS _ZERO
GOTO NotSame
GOTO Same
NotSame
MOVF Buffer0,W
MOVWF Old0
MOVF Buffer1,W
MOVWF Old1
MOVF Buffer2,W
MOVWF Old2
MOVF Buffer3,W
MOVWF Old3
MOVF Buffer4,W
MOVWF Old4
MOVF Buffer5,W
MOVWF Old5
MOVF Buffer6,W
MOVWF Old6
MOVF Buffer7,W
MOVWF Old7

MOVF Buffer8,W
MOVWF Old8
MOVF Buffer9,W
MOVWF Old9
MOVF BufferA,W
MOVWF OldA
MOVF BufferB,W
MOVWF OldB
GOTO BigLoop1
Same
TxTag ;- Transmit tag

BSF _LED2 ; LEDs “Found tag”
CALL Delay07 ; |
BCF _LED1 ; |
MOVLW d’4’ ; Beep at 3597Hz for 1024 cycles
MOVWF BeepCtrHi ; |
MOVLW d’0’ ; |
MOVWF BeepCtrLo ; |
BeepLoopJ1 ; |
GOTO BeepLoopJ2 ; |
BeepLoopJ2 ; |
MOVLW Beep1 ; |
MOVWF BeepPort ; |
MOVLW d’34’ ; |
MOVWF DelayReg ; |
BeepD1 ; |
CLRWDT ; |
GOTO BeepD1 ; |
MOVLW Beep2 ; |
MOVWF BeepPort ; |
MOVLW d’32’ ; |
MOVWF DelayReg ; |
NOP ; |
GOTO BeepD2 ; |
BeepD2 ; |
CLRWDT ; |
GOTO BeepD2 ; |
DECFSZ BeepCtrLo,f ; |
GOTO BeepLoopJ1 ; |
DECFSZ BeepCtrHi,f ; |
GOTO BeepLoopJ2 ; |
NOP ; |
MOVLW Beep0 ; |
MOVWF BeepPort ; |
CALL RS232CR ; Transmit tag info

MOVLW ‘F’ ; |
CALL RS232TxW ; |
MOVLW ‘S’ ; |
CALL RS232TxW ; |
MOVLW ‘K’ ; |
CALL RS232TxW ; |
MOVLW ‘ ‘ ; |
CALL RS232TxW ; |
MOVLW ‘/’ ; |
CALL RS232TxW ; |
MOVLW ‘8’ ; |
CALL RS232TxW ; |
MOVLW ‘-’ ; |
CALL RS232TxW ; |
MOVLW ‘/’ ; |
CALL RS232TxW ; |
MOVLW ‘1’ ; |

CALL RS232TxW ; |
MOVLW ‘0’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘b’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘=’ ; |
CALL RS232TxW ; |
MOVLW ‘5’ ; |
CALL RS232TxW ; |
MOVLW ‘0’ ; |
CALL RS232TxW ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘c’ ; |
CALL RS232TxW ; |
MOVLW ‘y’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘C’ ; |
CALL RS232TxW ; |
MOVLW ‘o’ ; |
CALL RS232TxW ; |
MOVLW ‘n’ ; |
CALL RS232TxW ; |
MOVLW ‘s’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘n’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘g’ ; |
CALL RS232TxW ; |
MOVLW ‘=’ ; |
CALL RS232TxW ; |
MOVLW ‘9’ ; |
CALL RS232TxW ; |
MOVLW ‘6’ ; |
CALL RS232TxW ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘b’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘P’ ; |

CALL RS232TxW ; |
MOVLW ‘o’ ; |
CALL RS232TxW ; |
MOVLW ‘l’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘r’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘y’ ; |
CALL RS232TxW ; |
MOVLW ‘ ‘ ; |
CALL RS232TxW ; |
MOVLW ‘0’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW BufferB ; Transmit tag ID

MOVWF FSR ; |
TxLoop1 ; |
SWAPF INDF,W ; |
CALL RS232TxDigit ; |
MOVF INDF,W ; |
DECF FSR,f ; |
BTFSC FSR,4 ; |
GOTO TxLoop1 ; |
CALL RS232CR ; |
end

NOTES:

PSK Reader Reference Design
PSK reader designers. Microchip Technology Inc. sections. It transmits a carrier signal, receives the
provides basic reader schematic for the MCRF200 backscattering signal, and performs data processing.
customers as a part of this design guide. The circuit is The reader also communicates with an external host
designed for a read range of 3 ~ 5 inches with an computer. A basic block diagram of the typical RFID
access control card. The microID PSK Reader (demo reader is shown in Figure 2-1.
unit), which is built based on the PSK reference design,
is available in the microID Designers Kit (DV103001).
The circuit can be modified for longer read range or
other applications with the MCRF200. An electronic
copy of the PSK microID PICmicro® source code is
available upon request.
FIGURE 2-1: BLOCK DIAGRAM OF TYPICAL RFID READER FOR PSK SIGNAL (125 kHz)

÷ 32 Antenna Coil
125 kHz
Microcontroller Filter, Amplifier

Pulse Shaping,
Data Decoding
and Envelope Detector
Interface with
CLK Phase Comparator
Host Computer
Circuits
To Host Computer

signal (125 kHz), power amplifiers, and a tuned demodulator, filter, amplifier, pulse shaping, phase
antenna coil. comparator, and microcontroller. In applications for
The 125 kHz carrier signal is typically generated by proximity read-range, a single coil is often used for both
dividing a 4 MHz (4 MHz/32 = 125 kHz) crystal transmitting and receiving. For long read range
oscillator signal. The signal is amplified before it is fed application, however, separated antennas may be
into the antenna tuning circuit. A complementary power used. More details on the antenna coil are given in
amplifier circuit is typically used to boost the AN678, RFID Coil Design, page 25.
transmitting signal level. In the PSK communication protocol, the phase of the
An antenna impedance tuning circuit consisting of modulation signal changes with the data. Two most
capacitors is used to maximize the signal level at the common types of phase encoding method are: (a)
carrier frequency. This tuning circuit is needed to form change phase at any data change (‘0’ to ‘1’ or ‘1’ to ‘0’),
an exact LC resonant circuit for the carrier signal. The and (b) change phase at ‘1’. A typical data rate for PSK
tuning compensates the variations in the component applications is one half of the carrier frequency, and it
values and the perturbation of coil inductance due to is faster than FSK. However, it requires a wider band-
environment effect. A design guide for the antenna coil width than FSK.
is given in AN678, RFID Coil Design, page 25. The PSK reader needs two steps for a full recovery of
the data. The first step is demodulating the backscat-
2.1.1 LIMITS ON TRANSMITTING SIGNAL LEVEL tering signal, and the second step is detecting the
(FCC PART 15) IN THE USA phase changes in the demodulation signal.
Each country limits the signal strength of the RF wave The demodulation is accomplished by detecting the
that is intentionally radiated by a device. In the USA, the envelope of the carrier signal. A full-wave
signal strength of the carrier signal (125 kHz) radiating capacitor-filtered rectifier circuit is used for the
from the antenna coil must comply with the FCC (Fed- demodulation process. A diode detects the peak
eral Communications Commission) part 15 regulation. voltage of the backscattering signal. The voltage is then
The signal level is specified by the 47 CFR Part fed into an RC charging/discharging circuit. The RC
15.209a of the federal regulation. For a 125 kHz signal, time constant must be small enough to allow the
the FCC limits the signal level to 19.2 µV per meter, or voltage across C to fall fast enough to keep in step with
25.66 dBµV (i.e., 20 log(19.2) = 25.66 dBµV), at 300 the envelope. However, the time constant must not be
meters away from the antenna. For a close distance so small as to introduce excessive ripple. The
measurement, an extrapolation rule (40 dB per demodulated signal must then pass through a filter, an
decade) is applied (Part 15.31.f.2). For example, the amplifier, signal shaping, and phase comparator
signal level at 30 meters away from the device must not circuits before it is fed to the microcontroller. The
exceed: microcontroller performs data decoding and
communicates with the host computer through an
RS-232 or other serial interface protocols.
25.66 dBµV + 40 dBµV = 65.66 dBµV

3.0 microID PSK READER at the resonance frequency. This results in maximizing
the antenna current, and therefore, the magnetic field
The MCRF200 can be configured with either PSK_1 or strength is maximized.
PSK_2 modulation. The PSK_1 changes the phase of
the modulation signal on any change of the data In the circuit, D7 and D8 are amplitude demodulators
(i.e., 0 to 1 or 1 to 0). The PSK_2 changes the phase of that are detecting the envelope of the backscattering
the modulation signal on the first clock edge of a data signal. D7 provides a current path during a positive half
‘1’. Figure 3-1 shows the optional PSK encoding cycle and the D8 during the negative half cycle. The
protocols. The PSK encoded data is amplitude modu- detected envelope signal is charged into the C27. A
lating the carrier signal. A typical PSK modulated signal discharge path for the voltage charged in the C27 is
is shown in Figure 3 in AN680, Passive RFID Basics provided by R33. This voltage passes active filters
page 15. (U11:C) and the pulse shaping circuitry (U11:A).
This reference reader was designed for use with an The output from the U11 is a square wave at 62.5 kHz,
MCRF200 with 08Dh in its configuration register, which which exhibits 180 degree phase-shifts in accordance
represents PSK_1, NRZ Direct, Fc/32, data rate, and with changes in the data stream from the tag. This sig-
128 bits. nal is used as a clock for D flip-flop (U6:A) for which the
D input is a reference 62.5 kHz square wave derived
The electronic circuitry for the PSK reader is shown in from the 125 kHz transmitting signal. As the phase of
Figure 3-1. The reader needs +9 to +15 VDC power the received signal changes, the output of the flip-flop
supply. The 125 kHz carrier signal is generated by changes, based on whether the clocking occurs during
dividing the 4 MHz time-base signal that is generated the high or low portions of the reference signal. The
by a crystal oscillator. A 16-stage binary ripple counter recovered data signal is fed to the input I/O pin of the
(74HC4060) is used for this purpose. The 74HC4060 PICmicro MCU (U7) for decoding.
also provides a clock signal for the PIC16C84 micro-
controller. Signal from the U8 is also used as a phase One of the major problems encountered with the PSK
reference for receiving signals. reader is that the phase of the returned signal with
respect to a reference signal is, for several reasons,
The 125 kHz signal is passed to an RF choke (L1) and indeterminate. If the transitions of the incoming signal
filter before it is fed into a power amplifier that is formed and the reference are occurring at the same time, the
by a pair of complementary bipolar transistors (Q2 and output of the D flip-flop will be unpredictable. To guar-
Q3). antee that this does not happen, additional circuits
For long read-range applications, this power amplifier have been added.
circuit can be modified. Power MOSFETs may be used The received 62.5 kHz signal is buffered by U9:D and a
instead of bipolar transistors (2N2222). These power pulse is generated upon every transition of the received
MOSFETs can be driven by +24 VDC power supply. A signal by U4:C. Likewise, U4:B provides a string of
push-pull predriver can be added at the front of the pulses on every transition of the reference 62.5 kHz
complementary circuit. This modification will enhance signal. Note that these pulse strings are at 125 kHz and
the signal level of the carrier signal. are independent of the phase state of the received
The reader circuit uses a single coil for both transmit- signal.
ting and receiving signals. An antenna coil These pulses are fed to the set and reset lines of U5:A
(L2: 1.62 mH) and a resonant capacitor (C21: 1000 pF) and result in a 125 kHz output at Q whose duty cycle is
forms a series resonant circuit for 125 kHz resonance proportional to the phase difference between the two
frequency. Since the C21 is grounded, the carrier signal pulse signals. If the duty cycle is near 50%, then the
(125 kHz) is filtered out to the ground after passing the transitions of the 62.5 kHz signals are approximately 90
antenna coil. The circuit provides minimum impedance degrees different which is ideal for PSK demodulation.
FIGURE 3-1: PSK DATA MODULATION
‘0’ ‘0’ ‘1’ ‘1’

EE Data
PSK 1
PP PP Change on Data
PP
P PP PSK 2
Change on ‘1’
P PP

R6 and C10 filter the output of U5:A resulting in a DC
level proportional to the phase shift. This level is the
input to a window detector consisting of U10 and U4:A.
If the DC level is near the midpoint, the output of
comparator U10:B would be high and the output of
comparator U10:A would be low. Therefore, the output
of U4:A would be high. If the DC level is higher than the
reference level set by R21, R26, and R30 then the
outputs of both comparators would be high, resulting in
a low output from U4:A. Similarly, if the DC level is low,
both outputs would be low, which would also result in a
low output at U4:A.
Note that the 125 kHz signal from which the 62.5 kHz
reference is obtained passes through gate U4:D. A
change of the state on the control output to this gate
allows the 125 kHz signal to be 180 degree
phase-shifted. This results in a phase-shift in the 62.5
kHz reference of 90 degrees. If the output of the U9:C
is low, the flip-flop U5:B will maintain its current state.
If the output of U4:A goes low, which would signify an
undesirable phase relationship between the 62.5 kHz
signals, then the output of U9:C would have a transition
to high, causing U5:B to change state. This would
change the reference phase 90 degrees, thus bringing
the phases of the 62.5 kHz signals back into a desirable
relationship and return the output of U4:A to a high
state.
In the event that no tag is present, Q of U5:A is always
high which makes the output of U10:B low. This turns
on an oscillator consisting of U9:A, U9:B, C8, R15, and
R19. This oscillator toggles U5:B at about 200 Hz,
allowing the reader to be looking for a tag signal with
both reference signal phases. When a good tag signal
appears, the circuit locks on in a good phase
relationship and demodulates the incoming 62.5 kHz
signal. As the tag comes closer to the reader, the phase
will be shift for a number of reasons. If the shift is
sufficient, the reference signal will shift as necessary to
maintain good demodulation.
The PIC16C84 microcontroller performs data decoding
and communicates with host computer via an RS-232
serial interface.

4.0 PSK READER SCHEMATIC
PIC16C84

5.0 PSK READER BILL OF MATERIALS
Reference
Designator
1 1 110-93-314-41-001 xU6 SOCKET, 14P COLLET MILL-MAX DIGIKEY ED3314-ND
OPEN FRAME
(0.300W)
2 1 DE9S-FRS P2 CONN, D-SUB 9P SPC
RECPT RT ANGLE TECHNOLOGY
3 1 DJ005B P1 JACK, POWER, 2.5mm LZR
DC PC MOUNT ELECTRONICS
4 1 PKM22EPP-4001 SP1 BUZZER, PIEZO, MURATA
4KHz, 3-20V
5 2 D100D20U2MHAAAC C7, C15 CAP, 10 pF CER DISK PHILIPS DIGIKEY 1301PH-ND
RAD, 100V
6 2 D220J20COGHAAAC C2, C3 CAP, 22 pF CER DISK PHILIPS DIGIKEY 1330PH-ND
RAD COG 100V
7 7 ECU-S1H221JCA C13, C14, CAP, 220pF, CER PANASONIC DIGIKEY P4929-ND
C23-C25, MONO, RAD, 50V, 5%
C29, C31
8 1 ECQ-P6102JU C21 CAP, 0.001 µF PHILIPS DIGIKEY P3497-ND
POLYPROPYLENE
630V
9 2 2222 370 52102 C26, C27 CAP, 0.001 µF METAL PHILIPS DIGIKEY 3001PH-ND
FILM, 5%, RAD, 400V
10 1 ECU-S2A152JCB C22 CAP, 1500 pF MONO- PHILIPS DIGIKEY P4863-ND
LITH CERM, 5%, RAD,
100V
11 3 ECU-S2A182JCB C9, C18, C20 CAP, 1800 pF MONO- PHILIPS DIGIKEY P4864-ND
LITH CERM, 5%, RAD,
100V
12 1 ECU-S1H682JCB C12 CAP, 6800 pF 50V PANASONIC DIGIKEY P4946-ND
CERAMIC MONO 5%
13 2 ECK-F1H103ZF C8, C10 CAP, 0.01 µF CERM PHILIPS DIGIKEY P4066A-ND
DISK, +80/-20%, RAD,
50V
14 1 ECQ-V1103JM C16 CAP, 0.01 µF 100V PANASONIC DIGIKEY P4713-ND
STACK METAL FILM
15 3 ECQ-E1104KF C4, C11, C30 CAP, 0.1 µUF 100VDC PANASONIC DIGIKEY EF1104-ND
10% RAD METAL
POLY CAP
16 1 ECU-S1H121JCA C28 CAP, 120 pF, CER PANASONIC DIGIKEY P4926-ND
MONO, RAD, 50V, 5%
17 3 ECE-A16Z10 C5, C6, C19 CAP, 10 µF, ELECTRO, PANASONIC DIGIKEY P6616-ND
RAD, 16V, 20%
18 1 ECE-A25Z100 C1 CAP, 100 µF, ELEC- PANASONIC DIGIKEY P6616-ND
TRO, RAD, 25V, 20%
19 6 1N4148 D1-D6 DIODE, GENERAL DIODES INC. DIGIKEY 1N4148DITR-
PURPOSE, 1N4148 ND
(DO-35)
20 2 1N4936 D7, D8 DIODE, 1A 400V FAST- DIODES INC DIGIKEY 1N4936CT-ND
RECOVERY RECTI-
FIER
21 1 -SPARE- LED1, C17 -SPARE- LOCATION
DO NOT INSTALL
22 2 78F102J L1, L3 INDUCTOR, 1000 µH, JW MILLER DIGIKEY M7849-ND
COATED
23 1 MCT0003-001 L2 INDUCTOR, 1.62 mH CORNELL
DUBILIER

Reference
Designator
24 3 2N2907A Q1, Q3, Q4 TRANSISTOR, PNP, MOTOROLA
2N2907A, TO-92
25 1 2N2222A Q2 TRANSISTOR, NPN, MOTOROLA ALLIED 2N2222A
2N2222A, TO-92
26 2 5043CX10R0J R10, R13 RES, CF 10 OHM 1/4W PHILLIPS
5%
27 1 82E CR-1/4W-B 5% R11 RES, CF 82 OHM 1/4W YAGEO DIGIKEY 82QBK-ND
5%
28 1 5043CX100R0J R18 RES, CF 100 OHM PHILLIPS
1/4W 5%
29 1 5043CX220R0J R40 RES, CF 220 OHM 5% PHILLIPS
1/4W
30 3 5043CX330R0J R4, R14, R17 RES, CF 330 OHM PHILLIPS
1/4W 5%
31 1 5043CX470R0J R7 RES, CF 470 OHM 5% PHILLIPS
1/4W
32 1 1K21 MF-1/4W-B 1% R27 RES, MF 1.21K OHM 1/ YAGEO DIGIKEY 1.21KXBK-ND
4W 1%
1/4W 5%
34 1 1K82 MF-1/4W-B 1% R24 RES, MF 1.82K OHM 1/ YAGEO DIGIKEY 1.82KXBK-ND
4W 1%
1/4W 5%
36 1 5043CX4K700J R29 RES, CF 4.7K 5% PHILLIPS
1/4W, AXIAL
37 6 10K CR-1/4W-B 5% R1, R12, R25, RES, CF 10K OHM YAGEO DIGIKEY 10KQBK-ND
R35, R39, 1/4W 5%
R41
38 3 5043ED10K00F R31, R43, RES, MF 10K 1/4W 1% PHILLIPS
R44
1/4W 5%
1/4W 1%
1/4W 5%
1/4W 1%
1/4W 5%
44 5 5043CX100K0J R9, R16, R21, RES, CF 100K 5% PHILLIPS
R22, R30 1/4W
1/4W 5%
1/4W 5%
47 7 1M0 CR-1/4W-B 5% R5, R19, R23, RES, CF 1.0M OHM YAGEO DIGIKEY 1.0MQBK-ND
R28, R33, 1/4W 5%
R36, R42
48 1 LM78M12CT U1 IC, REG 12V 3 TERM NATIONAL DIGIKEY LM78M12CT-
POS (TO-220) ND
49 1 LM78L05ACZ U2 IC, REG, +5V 0.1 NATIONAL DIGIKEY LM78L05ACZ-
A TO-92 ND

Reference
Designator
50 1 MM74HC04N U3 IC, HEX INVERTER FAIRCHILD DIGIKEY MM74HC04N-
TOR
51 1 CD4030CN U4 IC, QUAD EXCLUSIVE FAIRCHILD DIGIKEY CD4030CN-
OR GATE, 14P DIP SEMICONDUC- ND
TOR
52 2 CD4013BCN U5, U6 IC, DUAL D FLIP FLOP, FAIRCHILD DIGIKEY CD4013BCN-
TOR
53 1 PIC16C84/P U7 IC, PIC16C84 PLAS- MICROCHIP
TIC, 14P DIP
54 1 MM74HC4060N U8 IC, 14 STAGE BINARY FAIRCHILD DIGIKEY MM74HC4060
COUNTER, 16P DIP SEMICONDUC- N-ND
TOR
55 1 CD4001BCN U9 IC, QUAD 2-IN NOR FAIRCHILD DIGIKEY CD4001BCN-
GATE, 14P DIP SEMICONDUC- ND
TOR
56 1 TLC3702CP U10 IC, DUAL VOLTAGE TEXAS MOUSER TLC3702CP
COMPARATORS, INSTRUMENTS
1000mW, 8P DIP
57 1 TL084CN U11 IC, QUAD OP AMP, 1 SGS THOMP- MOUSER 511-TL084CN
4P DIP SON
58 1 EFO-EC4004A4 Y1 RESONATOR, PANASONIC DIGIKEY PX400-ND
4.00MHZ CERAMIC
W/CAP

6.0 PSK SOURCE CODE FOR THE PICmicro® MCU
The following source code is for the PIC16C84 microcontroller used in the PSK reader electronics.
; #=#=#=#=#=#=#=#=#=#=#= PROJECT Microchip PSK Reader =#=#=#=#=#=#=#=#=#=#=#
;
; ///////////////////////////////////////////////////////////////////////////
; Revision history
; ///////////////////////////////////////////////////////////////////////////
;
; Ver Date Comment
;
; 0.01 29 Dec 97 Copied from MChip\Reader\PSK
; 0.03 28 Jan 98 TRANSMIT TAB (h’09’) REGULARLY
; 20 Aug 98 Modified to correct PSK comments
;
; Tbit=32Tcy=256Ti
; Ttag=128Tbit
;
;
processor pic16c84
__config b’11111111101001’


BeepPort = PORTA
Beep0 = StartPORTA

BO3 = h’0C’
DelayReg = h’0C’
BitCtr = h’0D’
TxByte = h’0E’

Buffer1 = h’11’ ; |
Buffer2 = h’12’ ; |
Buffer3 = h’13’ ; |
Buffer4 = h’14’ ; |
Buffer5 = h’15’ ; |
Buffer6 = h’16’ ; |
Buffer7 = h’17’ ; |
Buffer8 = h’18’ ; |
Buffer9 = h’19’ ; |
BufferC = h’1C’ ; |
BufferD = h’1D’ ; |
BufferE = h’1E’ ; |
BufferF = h’1F’ ; |
Old0 = h’20’ ; |
Old1 = h’21’ ; |
Old2 = h’22’ ; |
Old3 = h’23’ ; |
Old4 = h’24’ ; |
Old5 = h’25’ ; |
Old6 = h’26’ ; |
Old7 = h’27’ ; |
Old8 = h’28’ ; |
Old9 = h’29’ ; |
OldA = h’2A’ ; |
OldB = h’2B’ ; |
OldC = h’2C’ ; |
OldD = h’2D’ ; |
OldE = h’2E’ ; |
OldF = h’2F’ ; |
SKIP macro
BTFSC PCLATH,7
endm

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A

NOP ; |
NOP ; |
NOP ; |
RETLW 0 ; |
RS232CR ;[1] Transmit CR on RS232

MOVLW d’13’ ; |
GOTO RS232TxW ; |
RS232TxDigit ;[1] Transmit LSnybble of W on RS232
ANDLW h’0F’ ; |
MOVWF TxByte ; |
MOVLW h’0A’ ; |

SUBWF TxByte,W ; |
BTFSS _CARRY ; |
GOTO DigitLT10 ; |
DigitGE10 ; |
MOVLW ‘A’-’0’-h’0A’ ; |
ADDWF TxByte,f ; |
DigitLT10 ; |
MOVLW ‘0’ ; |
ADDWF TxByte,W ; |
RS232TxW ;[1] Transmit W on RS232 at 9615 baud
RS232Tx ;[1] Transmit TxByte - 104us = 9615.4 baud
MOVLW d’35’ ; | |
MOVLW DelayReg ; | |
RS232TxD1 ; | |
NOP ; | |
MOVLW d’32’ ; | |
RS232TxD2 ; | |
BSF BitCtr,3 ; | |
RS232TxL1 ; | {% -4Ti
NOP ; | |
RS232TxBit0 ; | |
BCF _RS232TX ; | |
BCF _CARRY ; | |
RS232TxBit1 ; | |
BSF _RS232TX ; | |
BSF _CARRY ; | |
RS232TxBitDone ; | |
RS232TxD3 ; | |
RETLW 0 ; end
RESET_A
CLRWDT
CLRF FSR ; | FSR=#0
MOVWF PORTA ; | |
MOVWF PORTB ; | |
BSF _RP0 ;^| |

MOVWF TRISA ;^| |
MOVWF TRISB ;^| |
BCF _RP0 ; | |
CLRF Old1 ; | |
CLRF Old2 ; | |
CLRF Old3 ; | |
CLRF Old4 ; | |
CLRF Old5 ; | |
CLRF Old6 ; | |
CLRF Old7 ; | |
CLRF Old8 ; | |
CLRF Old9 ; | |
CLRF OldA ; | |
CLRF OldB ; | |
CLRF OldC ; | |
CLRF OldD ; | |
CLRF OldE ; | |
CLRF OldF ; | |
BigLoop1
CALL Delay07 ; |
BCF _LED2 ; |
CALL RS232TxW ; |
MOVWF BitCtr ; |
GetEdge ; Get an edge on _DATA_IN
BTFSC _DATA_IN ; |
GOTO PreSync_H ; |
NOP ; |
PreSync_L ; |
BTFSC _DATA_IN ; |
GOTO PreSync_H ; |
BTFSC _DATA_IN ; |
GOTO PreSync_H ; |
DoSync_L ; |
CLRWDT ; |
BTFSS _DATA_IN ; |
GOTO DoSync_L ; |
BTFSS _DATA_IN ; |
GOTO DoSync_L ; |
GOTO Sync_Done ; |
; |
PreSync_H ; |
BTFSS _DATA_IN ; |
GOTO PreSync_L ; |
BTFSS _DATA_IN ; |
GOTO PreSync_L ; |
DoSync_H ; |
CLRWDT ; |
BTFSC _DATA_IN ; |
GOTO DoSync_H ; |
BTFSC _DATA_IN ; |
GOTO DoSync_H ; |
GOTO Sync_Done ; |
Sync_Done ; |% 6 to (+4) from edge, say 8 from edge
NOP
MOVLW d’38’
MOVWF DelayReg

ReadBit ; {% -3-DelayReg*3 Ti from sample
NOP ; delay
ReadBitD1 ; |
GOTO ReadBitD1 ; |
CLRF BO3 ; BO3.1=_DATA_IN
BTFSC _DATA_IN ; |
INCF BO3,f ; |% effective sample time
BTFSC _DATA_IN ; |
INCF BO3,f ; |
BTFSC _DATA_IN ; |
INCF BO3,f ; |
BCF _CARRY ; _CARRY=BO3.1
BTFSC BO3,1 ; |
BSF _CARRY ; |
RLF Buffer0,f ; roll in _CARRY
RLF Buffer1,f ; |
RLF Buffer2,f ; |
RLF Buffer3,f ; |
RLF Buffer4,f ; |
RLF Buffer5,f ; |
RLF Buffer6,f ; |
RLF Buffer7,f ; |
RLF Buffer8,f ; |
RLF Buffer9,f ; |
RLF BufferA,f ; |
RLF BufferB,f ; |
RLF BufferC,f ; |
RLF BufferD,f ; |
RLF BufferE,f ; |
RLF BufferF,f ; |
; % 23Ti from sample = -233Ti from sample
MOVLW d’75’ ; set bit delay
MOVWF DelayReg ; |% -231Ti from sample
;% -6-DelayReg*3 Ti from sample
HeadSearch
MOVWF BitCtr ; |
HeadSearchL1 ; {
MOVLW h’80’ ; if (header found)
XORWF BufferF,W ; |
BTFSS _ZERO ; |
GOTO NotHead0 ; |
MOVLW h’2A’ ; |
XORWF BufferE,W ; |
BTFSS _ZERO ; |
GOTO NotHead0 ; {
GOTO HeadPolarity0 ; goto HeadPolarity0
NotHead0 ; }
MOVLW h’7F’ ; if (inverse header found)
XORWF BufferF,W ; |
BTFSS _ZERO ; |
GOTO NotHead1 ; |
MOVLW h’D5’ ; |
XORWF BufferE,W ; |
BTFSS _ZERO ; |
GOTO NotHead1 ; {
GOTO HeadPolarity1 ; goto HeadPolarity1
NotHead1 ; }
RLF Buffer1,f ; |
RLF Buffer2,f ; |
RLF Buffer3,f ; |

RLF Buffer4,f ; |
RLF Buffer5,f ; |
RLF Buffer6,f ; |
RLF Buffer7,f ; |
RLF Buffer8,f ; |
RLF Buffer9,f ; |
RLF BufferA,f ; |
RLF BufferB,f ; |
RLF BufferC,f ; |
RLF BufferD,f ; |
RLF BufferE,f ; |
RLF BufferF,f ; |
BCF Buffer0,0 ; |
BTFSC _CARRY ; |
BSF Buffer0,0 ; |
GOTO HeadSearchL1 ; } until (BitCtr==#0)
HeadPolarity1
COMF Buffer0,f
COMF Buffer1,f
COMF Buffer2,f
COMF Buffer3,f
COMF Buffer4,f
COMF Buffer5,f
COMF Buffer6,f
COMF Buffer7,f
COMF Buffer8,f
COMF Buffer9,f
COMF BufferA,f
COMF BufferB,f
COMF BufferC,f
COMF BufferD,f
COMF BufferE,f
COMF BufferF,f
HeadPolarity0
HeadFound
CheckSame
MOVF Buffer0,W
XORWF Old0,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer1,W
XORWF Old1,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer2,W
XORWF Old2,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer3,W
XORWF Old3,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer4,W
XORWF Old4,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer5,W
XORWF Old5,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer6,W
XORWF Old6,W

BTFSS _ZERO
GOTO NotSame
MOVF Buffer7,W
XORWF Old7,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer8,W
XORWF Old8,W
BTFSS _ZERO
GOTO NotSame
MOVF Buffer9,W
XORWF Old9,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferA,W
XORWF OldA,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferB,W
XORWF OldB,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferC,W
XORWF OldC,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferD,W
XORWF OldD,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferE,W
XORWF OldE,W
BTFSS _ZERO
GOTO NotSame
MOVF BufferF,W
XORWF OldF,W
BTFSS _ZERO
GOTO NotSame
GOTO Same
NotSame
MOVF Buffer0,W
MOVWF Old0
MOVF Buffer1,W
MOVWF Old1
MOVF Buffer2,W
MOVWF Old2
MOVF Buffer3,W
MOVWF Old3
MOVF Buffer4,W
MOVWF Old4
MOVF Buffer5,W
MOVWF Old5
MOVF Buffer6,W
MOVWF Old6
MOVF Buffer7,W
MOVWF Old7
MOVF Buffer8,W
MOVWF Old8
MOVF Buffer9,W
MOVWF Old9
MOVF BufferA,W
MOVWF OldA
MOVF BufferB,W
MOVWF OldB
MOVF BufferC,W
MOVWF OldC

MOVF BufferD,W
MOVWF OldD
MOVF BufferE,W
MOVWF OldE
MOVF BufferF,W
MOVWF OldF
GOTO BigLoop1
Same
TxTag ;- Transmit tag

CALL Delay07 ; |
BCF _LED1 ; |
MOVWF BeepCtrHi ; |
MOVLW d’0’ ; |
MOVWF BeepCtrLo ; |
BeepLoopJ1 ; |
GOTO BeepLoopJ2 ; |
BeepLoopJ2 ; |
MOVLW Beep1 ; |
MOVWF BeepPort ; |
MOVLW d’34’ ; |
MOVWF DelayReg ; |
BeepD1 ; |
CLRWDT ; |
GOTO BeepD1 ; |
MOVLW Beep2 ; |
MOVWF BeepPort ; |
MOVLW d’32’ ; |
MOVWF DelayReg ; |
NOP ; |
GOTO BeepD2 ; |
BeepD2 ; |
CLRWDT ; |
GOTO BeepD2 ; |
GOTO BeepLoopJ1 ; |
GOTO BeepLoopJ2 ; |
NOP ; |
MOVLW Beep0 ; |
MOVWF BeepPort ; |

MOVLW ‘P’ ; |
CALL RS232TxW ; |
MOVLW ‘S’ ; |
CALL RS232TxW ; |
MOVLW ‘K’ ; |
CALL RS232TxW ; |
MOVLW ‘/’ ; |
CALL RS232TxW ; |
MOVLW ‘2’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘b’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |

MOVLW ‘=’ ; |
CALL RS232TxW ; |
MOVLW ‘3’ ; |
CALL RS232TxW ; |
MOVLW ‘2’ ; |
CALL RS232TxW ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘c’ ; |
CALL RS232TxW ; |
MOVLW ‘y’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘C’ ; |
CALL RS232TxW ; |
MOVLW ‘o’ ; |
CALL RS232TxW ; |
MOVLW ‘n’ ; |
CALL RS232TxW ; |
MOVLW ‘s’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘n’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘g’ ; |
CALL RS232TxW ; |
MOVLW ‘=’ ; |
CALL RS232TxW ; |
MOVLW ‘1’ ; |
CALL RS232TxW ; |
MOVLW ‘2’ ; |
CALL RS232TxW ; |
MOVLW ‘8’ ; |
CALL RS232TxW ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘b’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘P’ ; |
CALL RS232TxW ; |
MOVLW ‘o’ ; |
CALL RS232TxW ; |
MOVLW ‘l’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘r’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |

CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘y’ ; |
CALL RS232TxW ; |
MOVLW ‘ ‘ ; |
CALL RS232TxW ; |
MOVLW ‘0’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW BufferF ; Transmit tag ID

MOVWF FSR ; |
TxLoop1 ; |
SWAPF INDF,W ; |
MOVF INDF,W ; |
DECF FSR,f ; |
BTFSC FSR,4 ; |
GOTO TxLoop1 ; |
CALL RS232CR ; |
end

ASK Reader Reference Design
ASK reader designers. Microchip Technology Inc. sections. It transmits a carrier signal, receives the
provides basic reader electronics circuitry for the backscattering signal, and performs data processing.
MCRF200 customers as a part of this design guide. The reader also communicates with an external host
The circuit is designed for a read range of 3 ~ 5 inches computer. A basic block diagram of the typical ASK
with an access control card. The microID ASK Reader RFID reader is shown in Figure 2-1.
(demo unit), which is built based on the ASK reference
design, is available in the microID Designers Kit
(DV103001). The circuit can be modified for longer
read range or other applications with the MCRF200. An
electronic copy of the ASK microID PICmicro® source
code is available upon request.
FIGURE 2-1: BLOCK DIAGRAM OF TYPICAL RFID READER FOR ASK SIGNAL (125 kHz)

÷ 32 Antenna Coil
125 kHz
Microcontroller
Data Decoding Filter, Amplifier,
Interface with and Pulse Shaping Envelope Detector
CLK Host Computer
To Host Computer

signal (125 kHz), power amplifiers, and a tuned demodulator, filters, amplifiers, and microcontroller. In
antenna coil. applications for close proximity read range, a single coil
The 125 kHz carrier signal is typically generated by is often used for both transmitting and receiving. For
dividing a 4 MHz (4 MHz/32 = 125 kHz) crystal long read-range applications, however, separated
oscillator signal. The signal is amplified before it is fed antennas may be used. More details on the antenna
into the antenna tuning circuit. A complementary power coil are given in AN678, RFID Coil Design page 25.
amplifier circuit is typically used to boost the In the ASK communication protocol, a ‘0’ and a ‘1’ are
ransmitting signal level. represented by an amplitude status of receiving signal.
An antenna impedance tuning circuit consisting of Various data coding waveforms that are available by
capacitors is used to maximize the signal level at the MCRF200 are shown in Figure 1 in AN680 Passive
carrier frequency. The tuning compensates the RFID Basics, page 1.
variations in the component values and the The demodulation of the ASK signal is accomplished
perturbation of coil inductance due to environment by detecting the envelope of the carrier signal. A half-
effect. A design guide for the antenna coil is given in wave capacitor-filtered rectifier circuit is used for the
AN678, RFID Coil Design. demodulation process. The peak voltage of the
back-scattering signal is detected by a diode, and this
2.1.1 LIMITS ON TRANSMITTING SIGNAL LEVEL voltage is then fed into an RC charging/discharging
(FCC PART 15) IN THE USA circuit. The RC time constant must be small enough to
allow the voltage across C to fall fast enough to keep in
Each country limits the signal strength of the RF wave
step with the envelope. However, the time constant
that is intentionally radiated by a device. In the USA,
must not be so small as to introduce excessive ripple.
the signal strength of the carrier signal (125 kHz)
The charging capacitor and load R has the following
radiating from the antenna coil must comply with the
relationship for a full recovery of the data signal.
FCC (Federal Communications Commission) part 15
regulation. The signal level is specified by the 47 CFR
Part 15.209a of the federal regulation. For a 125 kHz
signal, the FCC limits the signal level to 19.2 µv per 1 1
----------- > R > -----------
meter, or 25.66 dBµV (i.e., 20 log(19.2) = 25.66 dBµV), ωo C ωoC
at 300 meters away from the antenna. For a close
distance measurement, an extrapolation rule (40 dB
per decade) is applied (Part 15.31.f.2). For example, where ωs and ωo are the angular frequencies of the
the signal level at 30 meters away from the device must modulation (data) and carrier (125 kHz), respectively. R
not exceed: is the load (discharging) resistor.
The demodulated signal must then pass through a filter
and signal shaping circuit before it is fed to the
25.66 dBµV + 40 dBµV = 65.66 dBµV
microcontroller. The microcontroller performs data
decoding and communicates with the host computer
through an RS-232 or other serial interface protocols.

3.0 microID ASK READER The reader circuit uses a single coil for both transmit-
ting and receiving signals. An antenna coil
The electronic circuitry for an ASK reader is shown in (L2: 1.62 mH) and a resonant capacitor (C14: 1000 pF)
Section 4.0. The reader needs +9 VDC power supply. forms a series resonant circuit for a 125 kHz resonance
The 125 kHz carrier signal is generated by dividing the frequency. Since the C14 is grounded, the carrier signal
4 MHz time base signal that is generated by a crystal (125 kHz) is filtered out to ground after passing the
oscillator. A 16-stage binary ripple counter (74HC4060) antenna coil. The circuit provides a minimum
is used for this purpose. The 74HC4060 also provides impedance at the resonance frequency. This results in
a clock signal for the PIC16C84 microcontroller. The maximizing the antenna current, and therefore, the
125 kHz signal is passed to an RF choke (L1) and filter magnetic field strength is maximized.
before it is fed into a power amplifier that is formed by
a pair of complementary bipolar transistors (Q2 and L2, C14, D7, C15, R24, and the other components in
Q3). the bottom part of the circuit form a signal receiving
section. D9 is a demodulator which detects the
For long read-range applications, this power amplifier envelope of the backscattering signal.
circuit can be modified. Power MOSFETs may be used
instead of the bipolar transistors (2N2222). These D9 and C15 form a half-wave capacitor-filtered rectifier.
power MOSFETs can be driven by +24 VDC power The detected envelope signal is charged into C15. R24
supply. A push-pull predriver can be added at the front provides a discharge path for the voltage charged in
of the complementary circuit. This modification will C15. This voltage passes active filters (U5:B and C)
enhance the signal level of the carrier signal and the and the pulse shaping circuitry (U5:A) before it is fed
read range of the ASK Reader. into the PIC16C84 for data processing.
The PIC16C84 microcontroller performs data decoding
and communicates with the host computer via an
RS-232 serial interface.

4.0 ASK READER SCHEMATIC

5.0 ASK READER BILL OF MATERIALS
Quantity: Part Number Part Description Reference Design
1 02-01518-D PCB ASSEMBLY DWG, microID ASK
READER
1 03-01518 SCHEMATIC, microID ASK READER
1 04-01518 PCB FAB, microID ASK READER
1 08-00161 LABEL, microID ASK @U3
READER,U3,CHKS:C1AAh, v1.0,
ASK1.HEX
1 110-93-318-41-001 SOCKET, 18P OPEN FRAME xU3
COLLET (0.300)
1 DE9S-FRS CONN, D-SUB 9P RECPT RT ANGLE P2
1 DJ005B JACK, POWER, 2.5 mm DC PC MOUNT SP1
1 PKM22EPP-4001 BUZZER, PIEZO, 4 kHz, 3-20V BZ1
2 D470J25COGHAAAC CAP, 47PF 100V D220J20COGHAAAC CAP, 22 pF CER C1, C2
CERAMIC DISC C0G C10,C11 2 DISK RAD COG 100V
1 ECU-S1H221JCA CAP, 220pF, CER MONO, RAD, 50V, 5% C15
1 ECQ-P1102JZ CAP, 0.001uF POLYPROPYLENE 100V C17
3 ECQ-P6102JU CAP, 0.001uF POLYPROPYLENE 630V C13, C14, C16
1 ECU-S2A182JCB CAP, 1800pF MONOLITH CERM, 5%, C6
RAD, 100V
1 ECQ-V1103JM CAP, 0.01uF 100V STACK METAL FILM C9
2 ECQ-E1104KF CAP, 0.1UF 100VDC 10% C7, C8
RAD METAL POLY CAP
3 ECE-A16Z10 CAP, 10uF, ELECTRO, RAD, 16V, 20% C3, C5, C12
1 ECE-A25Z100 CAP, 100uF, ELECTRO, RAD, 25V, 20% C4
8 1N4148 DIODE, GENERAL PURPOSE, D1-D8
1N4148 (DO-35)
1 1N4936 DIODE, 1A 400V FAST-RECOVERY D9
RECTIFIER
1 -SPARE- -SPARE- LOCATION DO NOT
INSTALL LED1,
1 78F102J INDUCTOR, 1000uH, L1
COATED
1 MCT0003-001 INDUCTOR, 1.62 µH, L2
3 2N2907A-TO18 TRANSISTOR, 2N2907A PNP, Q1, Q3, Q4
GEN PURPOUS TO-18
1 2N2222A-TO18 TRANSISTOR, 2N2222A NPN, Q2
GEN PURPOUS TO-18
2 5043CX10R0J RES, CF 10 OHM 1/4W 5% R10,R8
1 82E CR-1/4W-B 5% RES, CF 82 OHM 1/4W 5% R9
1 5043CX100R0J RES, CF 100 OHM 1/4W 5% R15
1 5043CX1K000J RES, CF 1K 1/4W 5% R6
3 5043CX330R0J RES, CF 330 OHM 1/4W 5% R1, R12, R14
1 5043CX470R0J RES, CF 470 OHM 5% 1/4W R4
1 1K8 CR-1/4W-B 5% RES, CF 1.8K OHM 1/4W 5% R7
1 390K CR-1/4W-T 5% RES, CF 390K-OHM,5%,1/4W R24
1 220K CR-1/4W-T 5% RES, CF 220K OHM 1/4W 5% R21
1 8K2 CR-1/4W-T 5% RES, 8.2K OHM 1/4W 5% CF R20
3 10K CR-1/4W-B 5% RES, CF 10K OHM 1/4W 5% R2, R23, R25

Quantity: Part Number Part Description Reference Design
1 5043CX47K00J RES, CF 47K 5% 1/4W R18
1 12K CR-1/4W-B 5% RES, CF 12K OHM 1/4W 5% R16
3 22K CR-1/4W-B 5% RES, CF 22K OHM 1/4W 5% R5, R11, R19
2 5043CX100K0J RES, CF 100K 5% 1/4W R13,R26
3 1M0 CR-1/4W-B 5% RES, CF 1.0M OHM 1/4W 5% R3, R17, R22
1 LM78L05ACZ IC, REG, +5V 0.1A TO-92 U1
1 MM74HC04N IC, HEX INVERTER 14P DIP U2
1 PIC16F84-10/P IC, PIC16F84 PLASTIC, 18P DIP U3
1 MM74HC4060N IC, 14 STAGE BINARY COUNTER, U4
16P DIP
1 TL084CN IC, QUAD OP AMP, 14P DIP U5
1 EFO-EC4004A4 RESONATOR, 4.00MHZ CERAMIC Y1
W/CAP
2 JS-01 SCREW, JACKSCREW, #4-40x0.416" P2

6.0 ASK READER SOURCE CODE FOR THE PICmicro® MCU
The following source code is for the PIC16C84 microcontroller used in the ASK reader electronics.
; #=#=#=#=#=#=#=#=#=#=#= PROJECT Microchip ASK Reader =#=#=#=#=#=#=#=#=#=#=#
; v002.asm
; ///////////////////////////////////////////////////////////////////////////
; Revision history
; ///////////////////////////////////////////////////////////////////////////
;
; Ver Date Comment
;
; 0.01 01 Jul 98 Copied from MCHIP\READER\FSK
; 0.02 29 Jul 98 MICROCHIP TAG HAS 128 BITS
;
; Tbit=64Tcy=512Ti
; Manchester encoded
; Microchip - Header=h’802A’ Ttag=128Tbit
; - OR -
; EM ASK - Header=b’111111111’ trailer=b’0’ Ttag=64Tbit
;
processor pic16c84
__config b’11111111101001’
#define bit_CARRY STATUS,0

#define bit_ZERO STATUS,2
#define bit_RP0 STATUS,5

BeepPort = PORTA
Beep0 = StartPORTA


; PORTB pullups off
BO3 = h’0C’
DelayReg1 = h’0C’
Mask = h’0C’
BitCtr = h’0D’
TxByte = h’0E’
ParityReg1 = h’0E’

Period = h’0F’
ParityReg2 = h’0F’
Buffer1 = h’11’ ; |
Buffer2 = h’12’ ; |
Buffer3 = h’13’ ; |
Buffer4 = h’14’ ; |
Buffer5 = h’15’ ; |
Buffer6 = h’16’ ; |
Buffer7 = h’17’ ; |
Buffer8 = h’18’ ; |
Buffer9 = h’19’ ; |
BufferC = h’1C’ ; |
BufferD = h’1D’ ; |
BufferE = h’1E’ ; |
BufferF = h’1F’ ; |
Old0 = h’20’ ; |
Old1 = h’21’ ; |
Old2 = h’22’ ; |
Old3 = h’23’ ; |
Old4 = h’24’ ; |
Old5 = h’25’ ; |
Old6 = h’26’ ; |
Old7 = h’27’ ; |
Old8 = h’28’ ; |
Old9 = h’29’ ; |
OldA = h’2A’ ; |
OldB = h’2B’ ; |
OldC = h’2C’ ; |
OldD = h’2D’ ; |
OldE = h’2E’ ; |
OldF = h’2F’ ; |
SKIP macro
BTFSC PCLATH,7
endm

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A
Delay07: ;[0] Delay 7Ti

NOP ; |
NOP ; |
NOP ; |
RETLW 0 ; |
RS232CR: ;[1] Transmit CR on RS232

MOVLW d’13’ ; |
GOTO RS232TxW ; |

RS232TxDigit: ;[1] Transmit LSnybble of W on RS232
ANDLW h’0F’ ; |
MOVWF TxByte ; |
MOVLW h’0A’ ; |
SUBWF TxByte,W ; |
BTFSS bit_CARRY ; |
GOTO DigitLT10 ; |
DigitGE10: ; |
MOVLW ‘A’-’0’-h’0A’ ; |
ADDWF TxByte,f ; |
DigitLT10: ; |
MOVLW ‘0’ ; |
ADDWF TxByte,W ; |
RS232TxW: ;[1] Transmit W on RS232 at 9615 baud
RS232Tx: ;[1] Transmit TxByte - 104us = 9615.4 baud
MOVLW d’35’ ; | |
MOVLW DelayReg1 ; | |
RS232TxD1: ; | |
DECFSZ DelayReg1,f ; | |
NOP ; | |
MOVLW d’32’ ; | |
MOVWF DelayReg1 ; | |
RS232TxD2: ; | |
BSF BitCtr,3 ; | |
RS232TxL1: ; | {% -4Ti
NOP ; | |
RS232TxBit0: ; | |
BCF _RS232TX ; | |
BCF bit_CARRY ; | |
RS232TxBit1: ; | |
BSF _RS232TX ; | |
BSF bit_CARRY ; | |
RS232TxBitDone: ; | |
RS232TxD3: ; | |
RETLW 0 ; end
ParityCheck: ;[0] Check parity

CLRF ParityReg1 ; | ParityReg1=0
MOVLW d’10’ ; | BitCtr=10
MOVWF BitCtr ; | |
ParityL1: ; | {
CLRF ParityReg2 ; | ParityReg2=0
MOVLW h’10’ ; | Mask=h’10’
MOVWF Mask ; | |
ParityL2: ; | {

BCF bit_CARRY ; | LSL Buffer0-7
RLF Buffer0,f ; | |
RLF Buffer1,f ; | |
RLF Buffer2,f ; | |
RLF Buffer3,f ; | |
RLF Buffer4,f ; | |
RLF Buffer5,f ; | |
RLF Buffer6,f ; | |
RLF Buffer7,f ; | |
BTFSC Buffer6,7 ; | if (Buffer6.7==1)
INCF ParityReg2,f ; | { INC ParityReg2 }
MOVF Mask,W ; | W=Mask
XORWF ParityReg1,f ; | { ParityReg1=ParityReg1 XOR W }
BCF bit_CARRY ; | LSR Mask
RRF Mask,f ; | |
BTFSS bit_CARRY ; | } until (bit_CARRY==1)
GOTO ParityL2 ; | |
BTFSC ParityReg2,0 ; | if (ParityReg2.0==1)
GOTO ParityBad ; | { goto ParityBad }
GOTO ParityL1 ; | } until (BitCtr==0)
MOVLW h’10’ ; | Mask=h’10’
MOVWF Mask ; | |
ParityL3: ; | {
BCF bit_CARRY ; | LSL Buffer0-7
RLF Buffer0,f ; | |
RLF Buffer1,f ; | |
RLF Buffer2,f ; | |
RLF Buffer3,f ; | |
RLF Buffer4,f ; | |
RLF Buffer5,f ; | |
RLF Buffer6,f ; | |
RLF Buffer7,f ; | |
MOVF Mask,W ; | W=Mask
XORWF ParityReg1,f ; | { ParityReg1=ParityReg1 XOR W }
BCF bit_CARRY ; | LSR Mask
RRF Mask,f ; | |
BTFSS Mask,0 ; | } until (Mask.0==1)
GOTO ParityL3 ; | |
MOVF ParityReg1,W ; | if ((ParityReg1 AND h’1E’)!=0)
ANDLW h’1E’ ; | |
BTFSS bit_ZERO ; | |
GOTO ParityBad ; | { goto ParityBad }
ParityGood: ; |
MOVF BufferF,W ; | Buffer0-7=Buffer8-F
MOVWF Buffer7 ; | |
MOVF BufferE,W ; | |
MOVWF Buffer6 ; | |
MOVF BufferD,W ; | |
MOVWF Buffer5 ; | |
MOVF BufferC,W ; | |
MOVWF Buffer4 ; | |
MOVF BufferB,W ; | |
MOVWF Buffer3 ; | |
MOVF BufferA,W ; | |
MOVWF Buffer2 ; | |
MOVF Buffer9,W ; | |
MOVWF Buffer1 ; | |
MOVWF Buffer0 ; | |
BCF bit_CARRY ; | bit_CARRY=0
RETLW 0 ; |
ParityBad: ; |
MOVF BufferF,W ; | Buffer0-7=Buffer8-F

MOVWF Buffer7 ; | |
MOVF BufferE,W ; | |
MOVWF Buffer6 ; | |
MOVF BufferD,W ; | |
MOVWF Buffer5 ; | |
MOVF BufferC,W ; | |
MOVWF Buffer4 ; | |
MOVF BufferB,W ; | |
MOVWF Buffer3 ; | |
MOVF BufferA,W ; | |
MOVWF Buffer2 ; | |
MOVWF Buffer1 ; | |
MOVWF Buffer0 ; | |
BSF bit_CARRY ; | bit_CARRY=1
RETLW 0 ; |
RESET_A:
CLRWDT
CLRF FSR ; | FSR=#0
MOVWF PORTA ; | |
MOVWF PORTB ; | |
BSF bit_RP0 ;^| |
MOVWF TRISA ;^| |
MOVWF TRISB ;^| |
BCF bit_RP0 ; | |
CLRF Old1 ; | |
CLRF Old2 ; | |
CLRF Old3 ; | |
CLRF Old4 ; | |
CLRF Old5 ; | |
CLRF Old6 ; | |
CLRF Old7 ; | |
BigLoop1:
CALL Delay07 ; |
BCF _LED2 ; |
CALL RS232TxW ; |
MOVWF BitCtr ; |
GetEdge: ; Get an edge on _DATA_IN

BTFSC _DATA_IN ; |
GOTO PreSync_H0 ; |
NOP ; |
PreSync_L0: ; |% 3 from low sample
NOP ; |
BTFSC _DATA_IN ; |
GOTO PreSync_H0 ; |
CLRF Period ; | Period=0
PreSync_L1: ; | { % 7+Period*8 from low sample
INCF Period,f ; | INC Period

BTFSC Period,6 ; | if ((Period*8Ti)>=Tbit*1.25=512Ti*1.25=640Ti)
BTFSS Period,4 ; | |
SKIP ; | |
GOTO BigLoop1 ; | { goto BigLoop1 }
BTFSS _DATA_IN ; | } until (_DATA_IN==1)
GOTO PreSync_L1 ; | |
; |% 6+Period*8 from low sample
; |% 6 from rise
MOVLW d’48’ ; | if ((Period*8)>=Tbit*0.75=512Ti*0.75=384Ti)
SUBWF Period,W ; | |
BTFSC bit_CARRY ; | |
GOTO Sync_Done ; | { goto Sync_Done }
; |% 10 from rise
DoSync_H: ; |% 15 from rise
MOVLW d’2’ ; | Period=2
MOVWF Period ; | |
GOTO DoSync_HL ; | |
DoSync_HL: ; | {% 7+Period*8 from rise
SKIP ; | |
BTFSC _DATA_IN ; | } until (_DATA_IN==0)
GOTO DoSync_HL ; | |
; |% 6+Period*8 from rise
; |% 6 from fall
MOVLW d’16’ ; | if ((Period*8Ti)<Tbit*0.25=512Ti*0.25=128Ti)
BTFSS bit_CARRY ; | |
; |% 10 from fall
GOTO DoSync_L ; | { goto DoSync_L }
GOTO Sync_Done ; | goto Sync_Done
PreSync_H0: ; |% 3 from high sample

NOP ; |
BTFSS _DATA_IN ; |
GOTO PreSync_L0 ; |
CLRF Period ; | Period=0
PreSync_H1: ; | {% 7+Period*8 from high sample
SKIP ; | |
BTFSC _DATA_IN ; | } until (_DATA_IN==0)
GOTO PreSync_H1 ; | |
; |% 6+Period*8 from high sample
; |% 6 from fall
MOVLW d’48’ ; | if ((Period*8Ti)>=Tbit*0.75=512Ti*0.75=384Ti)
BTFSC bit_CARRY ; | |
GOTO Sync_Done ; | { goto Sync_Done }
; |% 10 from fall
DoSync_L: ; |% 15 from fall
MOVLW d’2’ ; | Period=2
MOVWF Period ; | |
GOTO DoSync_LL ; | |

DoSync_LL: ; | {% 7+Period*8 from fall
SKIP ; | |
BTFSS _DATA_IN ; | } until (_DATA_IN==1)
GOTO DoSync_LL ; | |
; |% 6+Period*8 from fall
; |% 6 from rise
; |% 10 from rise
GOTO DoSync_H ; | { goto DoSync_H }
GOTO Sync_Done ; goto Sync_Done
Sync_Done: ; |% 16 from edge

; |% -368 from sample
MOVLW d’121’ ; | DelayReg1=121
NOP ; | delay
ReadBit: ; {% -2-DelayReg1*3 Ti from sample
ReadBitD1: ; delay
DECFSZ DelayReg1,f ; |
GOTO ReadBitD1 ; |
BTFSC _DATA_IN ; |
BTFSC _DATA_IN ; |
INCF BO3,f ; |
BTFSC _DATA_IN ; |
INCF BO3,f ; |
BCF bit_CARRY ; bit_CARRY=BO3.1
BTFSC BO3,1 ; |
BSF bit_CARRY ; |
RLF Buffer0,f ; roll in bit_CARRY
RLF Buffer1,f ; |
RLF Buffer2,f ; |
RLF Buffer3,f ; |
RLF Buffer4,f ; |
RLF Buffer5,f ; |
RLF Buffer6,f ; |
RLF Buffer7,f ; |
RLF Buffer8,f ; |
RLF Buffer9,f ; |
RLF BufferA,f ; |
RLF BufferB,f ; |
RLF BufferC,f ; |
RLF BufferD,f ; |
RLF BufferE,f ; |
RLF BufferF,f ; |% 23 from sample
; |% -233 from sample
MOVLW d’76’ ; delay 230Ti
MOVWF DelayReg1 ; |
NOP ; |
ReadBitD2: ; |
GOTO ReadBitD2 ; |
; |% -3 from sample
BTFSC _DATA_IN ; |

BTFSC _DATA_IN ; |
INCF BO3,f ; |
BTFSC _DATA_IN ; |
INCF BO3,f ; |
BTFSC Buffer0,0 ; BO3.1=BO3.1 XOR Buffer0.0
COMF BO3,f ; |
BTFSS BO3,1 ; if (BO3.1==0)
GOTO BigLoop1 ; { goto BigLoop1 }
; % 8 from sample
; % -248 from sample
MOVLW d’80’ ; DelayReg1=80
MOVWF DelayReg1 ; |
NOP ; delay
; % -5-DelayReg1*3 Ti from sample
HeadSearch1:
MOVWF BitCtr ; |
HeadSearch1L1: ; {
MOVF BufferF,W ; if (header found)
XORLW h’80’ ; |
BTFSS bit_ZERO ; |
GOTO NotHead1A ; |
MOVF BufferE,W ; |
XORLW h’2A’ ; |
BTFSS bit_ZERO ; |
GOTO NotHead1A ; {
GOTO HeadFound0 ; goto HeadFound0
NotHead1A: ; }
MOVF BufferF,W ; if (inverse header found)
XORLW h’7F’ ; |
BTFSS bit_ZERO ; |
GOTO NotHead1B ; |
MOVF BufferE,W ; |
XORLW h’D5’ ; |
BTFSS bit_ZERO ; |
GOTO NotHead1B ; {
NotHead1B: ; }
RLF Buffer1,f ; |
RLF Buffer2,f ; |
RLF Buffer3,f ; |
RLF Buffer4,f ; |
RLF Buffer5,f ; |
RLF Buffer6,f ; |
RLF Buffer7,f ; |
RLF Buffer8,f ; |
RLF Buffer9,f ; |
RLF BufferA,f ; |
RLF BufferB,f ; |
RLF BufferC,f ; |
RLF BufferD,f ; |
RLF BufferE,f ; |
RLF BufferF,f ; |
BCF Buffer0,0 ; |
BTFSC bit_CARRY ; |
BSF Buffer0,0 ; |
GOTO HeadSearch1L1 ; } until (BitCtr==#0)
MOVF Buffer0,W ; if ((Buffer0-7)!=(Buffer8-F)) { goto BigLoop1 }

XORWF Buffer8,W ; |

BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
MOVF Buffer1,W ; |
XORWF Buffer9,W ; |
BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
MOVF Buffer2,W ; |
XORWF BufferA,W ; |
BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
MOVF Buffer3,W ; |
XORWF BufferB,W ; |
BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
MOVF Buffer4,W ; |
XORWF BufferC,W ; |
BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
MOVF Buffer5,W ; |
XORWF BufferD,W ; |
BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
MOVF Buffer6,W ; |
XORWF BufferE,W ; |
BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
MOVF Buffer7,W ; |
XORWF BufferF,W ; |
BTFSS bit_ZERO ; |
GOTO BigLoop1 ; |
HeadSearch2:
MOVWF BitCtr ; |
HeadSearch2L1: ; {
XORLW h’FF’ ; |
BTFSS bit_ZERO ; |
GOTO NotHead2A ; |
BTFSS BufferE,7 ; |
GOTO NotHead2A ; |
BTFSC Buffer8,0 ; |
GOTO NotHead2A ; {
NotHead2A: ; }
RLF Buffer1,f ; |
RLF Buffer2,f ; |
RLF Buffer3,f ; |
RLF Buffer4,f ; |
RLF Buffer5,f ; |
RLF Buffer6,f ; |
RLF Buffer7,f ; |
RLF Buffer8,f ; |
RLF Buffer9,f ; |
RLF BufferA,f ; |
RLF BufferB,f ; |
RLF BufferC,f ; |
RLF BufferD,f ; |
RLF BufferE,f ; |
RLF BufferF,f ; |
BCF Buffer0,0 ; |
BTFSC bit_CARRY ; |
BSF Buffer0,0 ; |

HeadSearch3:
MOVWF BitCtr ; |
HeadSearch3L1: ; {
XORLW h’00’ ; |
BTFSS bit_ZERO ; |
GOTO NotHead3A ; |
BTFSC BufferE,7 ; |
GOTO NotHead3A ; |
BTFSS Buffer8,0 ; |
GOTO NotHead3A ; {
NotHead3A: ; }
RLF Buffer1,f ; |
RLF Buffer2,f ; |
RLF Buffer3,f ; |
RLF Buffer4,f ; |
RLF Buffer5,f ; |
RLF Buffer6,f ; |
RLF Buffer7,f ; |
RLF Buffer8,f ; |
RLF Buffer9,f ; |
RLF BufferA,f ; |
RLF BufferB,f ; |
RLF BufferC,f ; |
RLF BufferD,f ; |
RLF BufferE,f ; |
RLF BufferF,f ; |
BCF Buffer0,0 ; |
BTFSC bit_CARRY ; |
BSF Buffer0,0 ; |
HeadFound3:
COMF BufferF,f
COMF BufferE,f
COMF BufferD,f
COMF BufferC,f
COMF BufferB,f
COMF BufferA,f
COMF Buffer9,f
COMF Buffer8,f
COMF Buffer7,f
COMF Buffer6,f
COMF Buffer5,f
COMF Buffer4,f
COMF Buffer3,f
COMF Buffer2,f
COMF Buffer1,f
COMF Buffer0,f
CALL ParityCheck
BTFSC bit_CARRY
GOTO BigLoop1
GOTO CheckSame
HeadFound2:
CALL ParityCheck
BTFSC bit_CARRY
GOTO HeadSearch3
GOTO CheckSame

HeadFound1:
COMF BufferF,f
COMF BufferE,f
COMF BufferD,f
COMF BufferC,f
COMF BufferB,f
COMF BufferA,f
COMF Buffer9,f
COMF Buffer8,f
COMF Buffer7,f
COMF Buffer6,f
COMF Buffer5,f
COMF Buffer4,f
COMF Buffer3,f
COMF Buffer2,f
COMF Buffer1,f
COMF Buffer0,f
HeadFound0:
CheckSame: ; if (Buffer!=Old) { goto NotSame }

MOVF Buffer0,W ; |
XORWF Old0,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer1,W ; |
XORWF Old1,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer2,W ; |
XORWF Old2,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer3,W ; |
XORWF Old3,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer4,W ; |
XORWF Old4,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer5,W ; |
XORWF Old5,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer6,W ; |
XORWF Old6,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer7,W ; |
XORWF Old7,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer8,W ; |
XORWF Old8,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF Buffer9,W ; |
XORWF Old9,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF BufferA,W ; |
XORWF OldA,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF BufferB,W ; |

XORWF OldB,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF BufferC,W ; |
XORWF OldC,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF BufferD,W ; |
XORWF OldD,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF BufferE,W ; |
XORWF OldE,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
MOVF BufferF,W ; |
XORWF OldF,W ; |
BTFSS bit_ZERO ; |
GOTO NotSame ; |
Same:
TxTag: ;- Transmit tag

CALL Delay07 ; |
BCF _LED1 ; |
MOVWF BeepCtrHi ; |
MOVLW d’0’ ; |
MOVWF BeepCtrLo ; |
BeepLoopJ1: ; |
GOTO BeepLoopJ2 ; |
BeepLoopJ2: ; |
MOVLW Beep1 ; |
MOVWF BeepPort ; |
MOVLW d’34’ ; |
MOVWF DelayReg1 ; |
BeepD1: ; |
CLRWDT ; |
GOTO BeepD1 ; |
MOVLW Beep2 ; |
MOVWF BeepPort ; |
MOVLW d’32’ ; |
MOVWF DelayReg1 ; |
NOP ; |
GOTO BeepD2 ; |
BeepD2: ; |
CLRWDT ; |
GOTO BeepD2 ; |
GOTO BeepLoopJ1 ; |
GOTO BeepLoopJ2 ; |
NOP ; |
MOVLW Beep0 ; |
MOVWF BeepPort ; |
MOVF OldF,W
MOVWF BufferF
MOVF OldE,W
MOVWF BufferE
MOVF OldD,W
MOVWF BufferD
MOVF OldC,W

MOVWF BufferC
MOVF OldB,W
MOVWF BufferB
MOVF OldA,W
MOVWF BufferA
MOVF Old9,W
MOVWF Buffer9
MOVF Old8,W
MOVWF Buffer8
MOVF Old7,W
MOVWF Buffer7
MOVF Old6,W
MOVWF Buffer6
MOVF Old5,W
MOVWF Buffer5
MOVF Old4,W
MOVWF Buffer4
MOVF Old3,W
MOVWF Buffer3
MOVF Old2,W
MOVWF Buffer2
MOVF Old1,W
MOVWF Buffer1
MOVF Old0,W
MOVWF Buffer0

MOVLW ‘A’ ; |
CALL RS232TxW ; |
MOVLW ‘S’ ; |
CALL RS232TxW ; |
MOVLW ‘K’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘b’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘=’ ; |
CALL RS232TxW ; |
MOVLW ‘6’ ; |
CALL RS232TxW ; |
MOVLW ‘4’ ; |
CALL RS232TxW ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘c’ ; |
CALL RS232TxW ; |
MOVLW ‘y’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘C’ ; |
CALL RS232TxW ; |
MOVLW ‘o’ ; |
CALL RS232TxW ; |
MOVLW ‘n’ ; |
CALL RS232TxW ; |
MOVLW ‘s’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |

CALL RS232TxW ; |
MOVLW ‘n’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘g’ ; |
CALL RS232TxW ; |
MOVLW ‘=’ ; |
CALL RS232TxW ; |
MOVF BufferF,W ; |
XORLW h’80’ ; |
BTFSS bit_ZERO ; |
GOTO Ttag64 ; |
Ttag128: ; |
MOVLW ‘1’ ; |
CALL RS232TxW ; |
MOVLW ‘2’ ; |
CALL RS232TxW ; |
MOVLW ‘8’ ; |
CALL RS232TxW ; |
GOTO TtagJ1 ; |
Ttag64: ; |
MOVLW ‘6’ ; |
CALL RS232TxW ; |
MOVLW ‘4’ ; |
CALL RS232TxW ; |
GOTO TtagJ1 ; |
TtagJ1: ; |
MOVLW ‘T’ ; |
CALL RS232TxW ; |
MOVLW ‘b’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW ‘P’ ; |
CALL RS232TxW ; |
MOVLW ‘o’ ; |
CALL RS232TxW ; |
MOVLW ‘l’ ; |
CALL RS232TxW ; |
MOVLW ‘a’ ; |
CALL RS232TxW ; |
MOVLW ‘r’ ; |
CALL RS232TxW ; |
MOVLW ‘i’ ; |
CALL RS232TxW ; |
MOVLW ‘t’ ; |
CALL RS232TxW ; |
MOVLW ‘y’ ; |
CALL RS232TxW ; |
MOVLW ‘ ‘ ; |
CALL RS232TxW ; |
MOVLW ‘0’ ; |
CALL RS232TxW ; |
CALL RS232CR ; |
MOVLW BufferF ; Transmit tag ID

MOVWF FSR ; |
MOVF BufferF,W ; |
XORLW h’80’ ; |
BTFSC bit_ZERO ; |
GOTO TxLoop1 ; |
MOVLW Buffer7 ; |
MOVWF FSR ; |
TxLoop1: ; |
SWAPF INDF,W ; |
MOVF INDF,W ; |
DECF FSR,f ; |
BTFSC FSR,4 ; |
GOTO TxLoop1 ; |
CALL RS232CR ; |
NotSame: ; Old=Data
MOVF Buffer0,W ; |
MOVWF Old0 ; |
MOVF Buffer1,W ; |
MOVWF Old1 ; |
MOVF Buffer2,W ; |
MOVWF Old2 ; |
MOVF Buffer3,W ; |
MOVWF Old3 ; |
MOVF Buffer4,W ; |
MOVWF Old4 ; |
MOVF Buffer5,W ; |
MOVWF Old5 ; |
MOVF Buffer6,W ; |
MOVWF Old6 ; |
MOVF Buffer7,W ; |
MOVWF Old7 ; |
MOVF Buffer8,W ; |
MOVWF Old8 ; |
MOVF Buffer9,W ; |
MOVWF Old9 ; |
MOVF BufferA,W ; |
MOVWF OldA ; |
MOVF BufferB,W ; |
MOVWF OldB ; |
MOVF BufferC,W ; |
MOVWF OldC ; |
MOVF BufferD,W ; |
MOVWF OldD ; |
MOVF BufferE,W ; |
MOVWF OldE ; |
MOVF BufferF,W ; |
MOVWF OldF ; |
end

NOTES:

FSK Anticollision Reader Reference Design
1.0 INTRODUCTION This application note is written as a reference guide for
anticollision reader designers. The anticollision reader
When more than one tag is in the same RF field of a is designed to provide correct signals to the
reader, each tag will transmit data at the same time. anticollision device (MCRF250) to perform an anticolli-
This results in data collision at the receiving end of the sion action during operation.
reader. No correct decision can be made based on this
data. The reader must receive data from a tag at a time Microchip Technology Inc. provides basic anticollision
for correct data processing. FSK reader electronic circuitry for the MCRF250
customers as a part of this design guide. The microID
The anticollision device (MCRF250) is designed to Anticollision Reader (demo unit), that can read 10 tags
send FSK data to reader without data collision, and it or more in the same RF field, is available in the microID
must be read by an anticollision reader. This type of Developers Kit (DV103002). An electronic copy of the
device can be effectively used in inventory and asset microID PICmicro® source code is also available upon
control applications where multiple tags are read in the request.
same RF field. The anticollision algorithm of the device
is explained in the MCRF250 Data Sheet, page 15.
FIGURE 1-1: BLOCK DIAGRAM OF TYPICAL RFID READER FOR FSK SIGNAL (125 kHz)

÷ 32 Antenna Coil
125 kHz
Gap Signal Gate
Microcontroller Envelope Detector
CLK Data Decoding Signal Collision

Interface with Detector
Host Computer
Data
Pulse Waveform Shaping Filter/Amplifier
Serial Interface (RS-232)

To Host Computer Receiving Section
PICmicro is a registered tradmark of Microchip Technology Inc.

2.0 READER CIRCUITS The gap signal from Pin no. 7 of U7 (Microcontroller)
controls the 125 KHz antenna driver circuit (Q1 and
The anticollision RFID reader consists of a transmitting Q2). Q1 and Q2 are turned off during the gap signal
and a receiving section. The transmitting section “high”. There is no RF signal at the antenna coil during
includes a carrier frequency generator, gap signal gate, this gap period.
and an antenna circuit. The receiving section includes
peak detector, signal amplifier/filter, signal collision The reader circuit uses a single coil for both transmit-
detector, and the microcontroller for data processing. ting and receiving signals. L1, C22, D8, and the other
components in the bottom parts of the circuit form a
The reader also communicates with an external host signal receiving section.
computer. A basic block diagram of the typical RFID
reader is shown in Figure 1-1. In the FSK communication protocol, a ‘0’ and a ‘1’ are
represented by two different frequencies. In the
The electronic circuitry for an anticollision FSK reader MCRF250, a ‘0’ and a ‘1’ are represented by Fc/8 and
is shown in Section 3.0. The reader needs a +9 VDC Fc/10, respectively. Fc is the carrier frequency. The
power supply. MCRF250 sends this FSK signal to the reader by an
The 125 kHz carrier signal is generated by dividing the amplitude modulation of the carrier signal.
4 MHz time base signal that is generated by a crystal The demodulation is accomplished by detecting the
oscillator. A 16-stage binary ripple counter (74HC4060) envelope of the carrier signal. A half-wave
is used for this purpose. The 74HC4060 also provides capacitor-filtered rectifier circuit (D8, D9, and C26) is
a clock signal for the PIC16C84 microcontroller. The used for the demodulation process. The detected enve-
125 kHz signal from Pin no. 5 of U6 is fed into U2 (Nor lope signal is charged into the C26. R37 provides a dis-
gate) and two stage power amplifiers that are formed charge path for the voltage charged in the C26. This
by U4, Q1, and Q2. voltage passes active filters (U10:A,C,D) and the pulse
The 125 kHz signal from Q1 and Q2 is fed into the shaping circuitry (U10:B) before it is fed into the
antenna circuit formed by L1(1.62 mH) and C22 (1000 PIC16C84 for data processing. U10 (A,D,C) forms a
pF). L1 and C22 form a series resonant circuit for a 125 bandpass filter for 12 kHz – 16 kHz signals.
kHz resonance frequency. Since the C22 is grounded, When more than one tag are transmitting data at same
the carrier signal (125 kHz) is filtered out to ground time, there will be wobbles in data signals in the
after passing the antenna coil. The circuit provides a receiver. This wobble is detected in U8. If the wobble
minimum impedance at the resonance frequency. This occurs, c10 becomes fully charged. This will set CLK
results in maximizing the antenna current, and input of US:B, and results in a logic “LOW” in Q of the
therefore, the magnetic field strength is maximized. U5:B. The microcontoller (U7) detects the logic “LOW”
and turns on the gap control gate (U5:A) to send a gap
signla to the tags.
The PIC16C84 microcontroller performs data decod-
ing, provides gap timing signals, and communicates
with the host computer via an RS-232 serial interface.
FIGURE 2-1: RFID FSK ANTICOLLISION WINDOW

FIGURE 2-2: ANTICOLLISION ALGORITHM FOR A MCRF250 READER
Field On Yes Data

Collision?
No No
Modulation
Present?
Read
Yes tag data
Gap Carrier
60 µSec
No Verify Header
and Data?
Yes
Wait 5 bit times
Gap Carrier
1st half bit 1
Gap Carrier
60 µSec
No
Modulation Yes
Present?

3.0
U1 *
1 3
VI VO
G
+5V C1
LM78L12ACZA SP1
P1 2 12V 2 U2:A U2:B IRF9520
U3 22 Y1 1 5 ICL7667
1 3 3 4
VI VO
DS51167B-page 102
+9-15V G 6 1 8
NC NC
* Only stuff this part for
22
C2
4.00 MHz Q1 1N4936
2 7
2 5V
use with a 15V supply. U5:A IN1 OUT1
C4
C3
R1
D1
330
U2:C 3 6
6 1 VSS VDD
+5V SET Q 8
R2 5
10uF,16V
D 10 4 5
470uF,16V
3 2 IN2 OUT2
CLK Q 9 Q2
1M 4
RESET
2N2907 4013 U4 10uF

R3 1N4148 C5 IRF740
R4
10K 1M 1000pF,5% 1000pF,5%
Q3 U7 D2
3.3K 1 18 C8
RA2 RA1 U6
out 2 17 +5V
R5 RA3 RA0 C6 C7
11 10 0.1uF
CKI CKO
3 16 12 9
in RTCC CLKIN CLR CKO 100K
U5:B 150k
R7
4 15 7
1.8K
MCLR CKOUT QD R6
5 13 8 R8
gnd QE Q SET
5 14 4 9
VSS VDD QF D
RS-232
+5V 6 12 11
QG Q CLK
6 13 14 1 1 10
RB0 RB7 QH 2 1 RESET
R9
7 12 13
33K
RB1 RB6 QI U8:A - 2

8 11 15 4013 MC34084
RB2 RB5 QJ
9 10 1
RB3 RB4 QL 1
D3
2 5
QM +
74HC4060
1N4148
3 U2:D 1N4148
R10
33K
22K PIC16F84 QN 10K 3

7 +
MC34084
R11 330 ARED 1 R12 6
D5 0.1uF 3 D4 U8:B -
R14
D6
R13 AGRN
100K
820
R15
C11 330 1N4148 C9 1000pF,5% C12 1000pF,5% C13

Q4 R17
1N4148
C10
LED1
.47uF
0.1uF R16 33K

1N4148 C14 1000pF,5% C15 1000pF,5%
2N7000 150K 150K
ANTICOLLISION READER SCHEMATIC
D7 R20
U9:A R18 820 R19
6 1
R21
SET Q
5
D 33K
3 2 9 - U8:C 13 -
CLK Q U8:D
4
+5V RESET
8 14
4013 R22 10 12
+ +
MC34084 MC34084
1.82K,1%
1000pF,5% 1000pF,5%
R23 C27
470uF, 16V
820
C18
R24
2.67K,1% C16 C17
0.1uF
R25
6.8K
C21 47.5K,1% 1N4936 162uHy
R26
C19
C20
10K 1%
R28 R29 R27
1000pF,5%
D8 L1
C23
10uf,16V
1000pF,5%
R30
15K 82.5K,1%
C22
220,5%
R31
0.01uF,630V
1M,5%
U10:A
D9
4 - 6 U10:C - 9 U10:D - 13 - 2
1000pF,5%
1N4936
7 8 14 1
C24
5 10 12 3
U10:B + + + MC34084 +
11
U9:B 1000pF,200V,5%
13 8
Q SET
R32
R33
R34
R35
C26
9
390K
10K,5%
10K,1%
10K,1%
12 11
Q CLK 1000pF,5%
10
RESET
4013 C25
.0022uF,200V,10%
 1998 Microchip Technology Inc.

4.0 ANTICOLLISION READER BILL OF MATERIALS
Quantity Type Value Reference Designator Part Number
1 PIEZO Buzzer PKM17EPP-4001 BZ1 MURATA PART #
2 Capacitor 22 pF C1, C2 1330PH-ND
12 Capacitor lOOO pF, 5% C6,C7,C12,C13,C14C15,C16, P4937-ND
C17,C19,C21,C23,C25
1 Capacitor 1000 pF, 200V, 5% C24 (P3497-ND)
1 Capacitor .0022 µF, 200V, 10% C26 P3S01-ND
1 Capacitor 0.01µF, 630V c22 P3509-ND
4 Capacitor 0.1 µF C8, C9, C11, C18 P4539-ND
1 Capacitor 0.47 µF C10 P4967-ND
3 Capacitor 10 µF, 16V C3, C5, C20 P6616-ND
1 Capacitor l00 µF, 25V C4 P10269-ND
1 Capacitor 470 µF, 16V C27 P10247-ND
6 Diode 1N4148 D2, D3, D4, D5, D6, D7 1N4148DICT-ND
3 Diode 1N4936 D1, DB, D9 1N4936CT-ND
1 Bicolor LED P392 LED 1 p392-ND
1 Coil Antenna 162 uBy L1 Custom Wound
1 P-Chain MOSFET IRF9520 Q1 IRF9520 FUTURE
1 N-Chain MOSFET IRF740 Q2 IRF740-ND
1 PNP Transistor 2N2907 Q3 PN2907A-ND
1 N-Chain MOSFET 2N7000 Q4 2N7000DICT-ND
1 Resistor 220, 5% R30 5043CX220ROJ
3 Resistor 330, 5% R1, R13, R16 5043CX330ROJ
3 Resistor 820, 5% R15, R20, R24 5043CX830ROJ
Resistor 1.8K, 5% R7 1K8CR-1/4W-B 5%
1 Resistor 1.82K, 1% R22 1K82MF-1/4W-B 5%
1 Resistor 2.67K, 15 R23 2K67MF-1/4W-B 1%
1 Resistor 3.3K, 5% R5 3K3CR-1/4W-B 5%
1 Resistor 6.8K, 5% R25 6K8CR-1/4W-B 5%
3 Resistor 10R,1’ R26, R33, R34 5043ED10KOOF
3 Resistor 10K, 5% R3, R12, R32 10KCR-1/4W-B 5%
1 Resistor 15K, 5% R28 15KCR-1/4W-B 5%
1 Resistor 22K, 5% R11 22KCR-1/4W-B 5%
4 Resistor 33K, 5% R9,R10, R17, R21 33JCR1/4-B 5%
1 Resistor 47.5K, 1% R27 47K5MF-1/4W-B 1%
1 Resistor 82.5K, 1% R29 82.5KMF-1/4W-B 1%
2 Resistor 100K, 5% R6, R14 5043CX100KOJ
3 Resistor 150K, 5% R8, R18, R19 150KCR-1/4W-B 5%
1 Resistor 390K, 5% R35 390KCR-1/4-B, 5%
3 Resistor 1M, 5% R2, R4, R31 1MOCR-1/4W-B 5%
1 QUAD NOR GATE 74HC02 U2 MM74HC02N-ND
1 5V Regulator LM78L05 U3 NJM78L05A-ND
1 MOSFET Driver ICL7667 U4 ICL7667CPA-ND
2 DUAL FLIP-FLOP 4013 U5, U9 CD4013BCN-ND
Note: All resistors are 5% 1/4 watt carbon film resistors unless otherwise noted. DIGI-KEY part numbers follow
some parts where applicable (these part numbers are only intended as a reference).

Quantity Type Value Reference Designator Part Number
1 Binary Counter 74HC4060 U6 MM74HC4060N-ND
1 Microprocessor PIC16F84 U7 PIC16F84-04/P
2 OP-AMP MC3407 U8, U10 FUTURE PART #
1 Crystal 4.00 MHz Y1 X405-ND
Note: All resistors are 5% 1/4 watt carbon film resistors unless otherwise noted. DIGI-KEY part numbers follow
some parts where applicable (these part numbers are only intended as a reference).

5.0 FSK ANTICOLLISION SOURCE CODE FOR THE PICmicro® MCU
The following source code is for the PIC16C84 microcontroller used in the FSK reader electronics.
; #=#=#=#=#=#=#=# PROJECT Microchip FSK anticollision Reader #=#=#=#=#=#=#=#
; v008.asm
; PIC16F84 running at 4MHz, Ti=1us
; ///////////////////////////////////////////////////////////////////////////
; Revision history
; ///////////////////////////////////////////////////////////////////////////
;
; Ver Date Comment
;
; 0.01 29 Dec 97 Copied from MChip\Reader\FSK
; 0.02 27 Feb 98 Gap during first half of first bit
; 0.05 28 Apr 98 Change from PIC16C84 to PIC16F84
; 0.06 29 Apr 98 Count to 256 instead of to 512
; 0.07 30 Apr 98 Make PORTB.0 low output (previously demodulated data input)
; 0.07a 08 May 98 Make gaps 80us wide
; 0.08 13 Aug 98 TAKE OUT CODE INTENDED FOR LAB USE ONLY
;
; Tbit=50Tcy=400Ti
; Ttag=96Tbit
;
processor pic16f84
#include “p16f84.inc”
__config b’00000000000001’

#define _PAGE0 PCLATH,3

#define _SDA PORTA,4
BeepPort = PORTA
Beep0 = StartPORTA

#define _COIL_PWR PORTB,1
#define _RAW_DATA PORTB,4
#define _COLLISION PORTB,6 ; < Goes low when a collision occurs
#define _SCL PORTB,7
StartPORTB = b’10000010’ ; Coil_Off
StartOPTION = b’10001111’
; PORTB pullups disabled, TMR0 internal, prescaler off, WDT/256
BO3 = h’0C’ ; Could be doubled-up with DelayReg1

DelayReg1 = h’0D’ ; Could be doubled-up with BO3
BitCtr = h’0E’ ; Could be doubled-up with BeepCtrHi

TxByte = h’0F’ ; Could be doubled-up with BeepCtrLo
TagsDetected = h’10’
GapCountLo = h’11’
Counter1 = h’12’
Counter2 = h’13’
Flags = h’14’
#define _GotHeader Flags,0
#define _FirstTime Flags,1
Period = h’15’ ; Used to read FSK
GapCountHi = h’16’
Buffer01 = h’19’ ; |
Buffer02 = h’1A’ ; |
Buffer03 = h’1B’ ; |
Buffer04 = h’1C’ ; |
Buffer05 = h’1D’ ; |
Buffer06 = h’1E’ ; |
Buffer07 = h’1F’ ; |
Buffer08 = h’20’ ; |
Buffer09 = h’21’ ; |
Buffer0A = h’22’ ; |
Buffer0B = h’23’ ; |
Buffer0C = h’24’ ; |
Buffer0D = h’25’ ; |
Buffer0E = h’26’ ; |
Buffer0F = h’27’ ; |
Buffer10 = h’28’ ; |
Buffer11 = h’29’ ; |
Buffer12 = h’2A’ ; |
Buffer13 = h’2B’ ; |
Buffer14 = h’2C’ ; |
Buffer15 = h’2D’ ; |
Buffer16 = h’2E’ ; |
Buffer17 = h’2F’ ; |
BeepCtrHi = h’30’ ; Could be doubled-up with BitCtr

BeepCtrLo = h’31’ ; Could be doubled-up with TxByte
SKIP macro
BTFSC PCLATH,7
endm
Coil_On macro
BCF _COIL_PWR
endm
Coil_Off macro
BSF _COIL_PWR
endm

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A

CLRF PCLATH
CLRF INTCON
CLRF STATUS
GOTO RESET_A

GOTO Delay08 ; |
GOTO Delay06 ; |
NOP ; |
NOP ; |
RETLW 0 ; |
;%% CALL RS232CR takes 1052Ti

;%% CALL RS232TxDigit takes 1057Ti
;%% CALL RS232TxW takes 1049Ti
RS232CR: ;[1] Transmit CR on RS232
MOVLW d’13’ ; |
GOTO RS232TxW ; |
RS232TxDigit: ;[1] Transmit LSnybble of W on RS232
ANDLW h’0F’ ; |
MOVWF TxByte ; |
MOVLW h’A’ ; |
SUBWF TxByte,W ; |
MOVLW ‘0’ ; |
BTFSC _CARRY ; |
MOVLW ‘A’-h’A’ ; |
ADDWF TxByte,W ; |
RS232TxW: ;[1] Transmit W on RS232 at 9615 baud
RS232Tx: ;[1] Transmit TxByte - 104us = 9615.4 baud
MOVLW d’35’ ; | | Delay 106Ti
MOVWF DelayReg1 ; | | |
RS232TxD1: ; | | |
DECFSZ DelayReg1,f ; | | |
GOTO RS232TxD1 ; | | |
NOP ; | | Delay 98Ti
MOVLW d’32’ ; | | |
MOVWF DelayReg1 ; | | |
RS232TxD2: ; | | |
DECFSZ DelayReg1,f ; | | |
GOTO RS232TxD2 ; | | |
BSF BitCtr,3 ; | |
RS232TxL1: ; | {% -4Ti
NOP ; | |
RS232TxBit0: ; | |
BCF _RS232TX ; | |
BCF _CARRY ; | |
RS232TxBit1: ; | |
BSF _RS232TX ; | |
BSF _CARRY ; | |
RS232TxBitDone: ; | |
MOVLW d’30’ ; | Delay 93Ti
RS232TxD3: ; | |
CALL Delay04 ; | Delay 4Ti

RETLW 0 ; end
DelayTtag: ;[?] Delay Ttag-3Ti=38400-3Ti=38397Ti

BSF _PAGE0
GOTO P1DelayTtag
RESET_A:
CLRWDT
CLRF FSR ; | FSR=#0
MOVWF PORTA ; | |
MOVWF PORTB ; | |
BSF _RP0 ;^| |
MOVWF TRISA ;^| |
MOVWF TRISB ;^| |
BCF _RP0 ; | Initialise OPTION register
MOVLW StartOPTION ; | |
CLRF TMR0 ; | |
BSF _RP0 ;^| |
BCF _RP0 ; | |
BigLoop1:
CALL Delay08 ; LEDs “reading”
BSF _LED1 ; |
CALL Delay08 ; |
BCF _LED2 ; |
CALL Delay08 ; |
Coil_Off ; Turn coil off
BSF _PAGE0
GOTO ResetDelay
ResetDelayDone:
CLRF TagsDetected ; TagsDetected=#0

CLRF GapCountHi ; GapCount=#0
CLRF GapCountLo ; |
GapLoop: ; {
Coil_Off ; Turn coil off
CALL Delay08 ; LEDs “reading”
BSF _LED1 ; |
CALL Delay08 ; |
BCF _LED2 ; |
CALL Delay10 ; Wait 80us
CALL Delay10 ; |
CALL Delay10 ; |
CALL Delay10 ; |
CALL Delay10 ; |
CALL Delay10 ; |
NOP ; |
Coil_On ; Turn coil on
;% 0 Ti from 1st bit
;(Ttag=38400Ti)
; If it’s the first gap since reset, delay Ttag
BTFSC _FirstTime

CALL DelayTtag
BCF _FirstTime
CLRF DelayReg1 ; Delay 2047Ti

GapD1: ; |
CLRWDT ; |
GOTO GapD1 ; |
GapD2: ; |
CLRWDT ; |
GOTO GapD2 ; |
;% 2050Ti from 1st bit
MOVLW d’8’ ; DelayReg1=#8
MOVWF DelayReg1 ; |
;% 2052Ti from 1st bit
;% 2076-3*DelayReg1 from 1st bit
;% 5*400+76-3*DelayReg1 from 1st bit
;% 76-3*DelayReg1 Ti from 6th bit
; Read tag, with timeouts everywhere
MOVLW d’2’ ; | Counter2=#2
MOVWF Counter2 ; | |
ReadBit_L1: ; | {% 78-3*DelayReg1 Ti from bit
MOVLW d’96’ ; | BitCtr=#96
MOVWF BitCtr ; | |
ReadBit_L2: ; | {% 80-3*DelayReg1 Ti from bit
ReadBit_D1: ; | delay
GOTO ReadBit_D1 ; | |
; | % 79Ti from bit
CLRF Counter1 ; | Counter1=#0
; | % 80Ti=10Tcy from bit, time to start frequency sample
ReadBit_Hi0: ; | {% 80+(Counter1*8)Ti from bit
INCF Counter1,f ; | ++Counter1
; | % 73+(Counter1*8)Ti from bit
BTFSC Counter1,6 ; | if (timeout)
GOTO GapX ; | { goto GapX } // could be at 1st half of 1st bit!!!
NOP ; | |
BTFSC _RAW_DATA ; | } until (_RAW_DATA==#1)
BTFSS _RAW_DATA ; | |
GOTO ReadBit_Hi0 ; | |
NOP ; | |
ReadBit_Lo0: ; | {% 80+(Counter1*8)Ti from bit
NOP ; | |
BTFSS _RAW_DATA ; | } until (_RAW_DATA==#0)
BTFSC _RAW_DATA ; | |
GOTO ReadBit_Lo0 ; | |
NOP ; | |
MOVF Counter1,W ; | Period=Counter1
MOVWF Period ; | |
INCF Counter1,f ; | |
CALL Delay05 ; | |
INCF Counter1,f ; | ++Counter1;
NOP ; | |

NOP ; | |
NOP ; | |
NOP ; | |
NOP ; | |
NOP ; | |
NOP ; | |
NOP ; | |
MOVF Period,W ; | Period=Counter1-Period
SUBWF Counter1,W ; | |
MOVWF Period ; | |
COMF Counter1,W ; | W=32-Counter1
ADDLW d’1’ ; | |
ADDLW d’32’ ; | |
; | % 86+(32-W)*8Ti from bit
NOP ; | |
; | % 89+(32-W)*8Ti from bit
BTFSS _CARRY ; | if (W<0)
GOTO GapX ; | { goto GapX } // could occur in 1st half of 1st bit!!!
; | % 91+(32-W)*8Ti from bit
MOVWF Counter1 ; | Counter1=W
; | % 92+(32-Counter1)*8 Ti from bit
ReadBit_D2: ; | Delay 4+Counter1*8 Ti
MOVF Counter1,f ; | |
BTFSC _ZERO ; | |
GOTO ReadBit_D2_done ; | |
NOP ; | |
NOP ; | |
DECF Counter1,f ; | |
GOTO ReadBit_D2 ; | |
ReadBit_D2_done: ; | |
; | % 92+32*8-(oldCounter1)*8+4+(oldCounter1)*8 Ti from bit
; | % 352Ti from bit
BTFSS _COLLISION ; | if (collision occurred)
GOTO Gap1 ; | { goto Gap1 } // after 1st half of bit
MOVF Period,W ; | if (Period<#14)

ADDLW low(0-d’14’) ; | |
BTFSS _CARRY ; | |
ADDLW low(d’14’-d’18’); | if (Period<#18)
BTFSS _CARRY ; | |
GOTO ReadBit_Got0 ; | { goto ReadBit_Got0 }
ADDLW low(d’18’-d’22’); | if (Period>=#22)
BTFSC _CARRY ; | |
ReadBit_Got1: ; | % 364Ti from bit

BSF _CARRY ; | _CARRY=#1
GOTO ReadBit_GotBit ; | goto ReadBit_GotBit
ReadBit_Got0: ; | % 362Ti from bit

NOP ; | |
NOP ; | |
BCF _CARRY ; | |
GOTO ReadBit_GotBit ; | |
ReadBit_GotBit: ; | % 367Ti from bit

RLF Buffer00,f ; | roll in _CARRY
RLF Buffer01,f ; | |
RLF Buffer0A,f ; | |
RLF Buffer0B,f ; | |
RLF Buffer0C,f ; | |
RLF Buffer0D,f ; | |
RLF Buffer0E,f ; | |
RLF Buffer0F,f ; | |
; | % 391Ti from bit
; | % -9Ti from bit (Tbit=400Ti)
MOVLW d’28’ ; | DelayReg1=#28
; | % -7Ti from bit
; | % 77-3*DelayReg1 Ti from bit
GOTO ReadBit_L2 ; | } until (BitCtr==#0)
; | % -5Ti from bit
MOVLW d’26’ ; | DelayReg=#26
; | % -3Ti from bit
; | % 75-3*DelayReg1 Ti from bit
DECFSZ Counter2,f ; | DEC Counter2
GOTO ReadBit_L1 ; | } until (Counter2==#0)
; % -1Ti from first bit

BSF _PAGE0 ; Delay 1568Ti
GOTO BigDelay ; |
BigDelayDone: ; |% 1567Ti from first bit

CheckTtag: ; if (tag is not 96 bits long) { goto Gap2 }
MOVLW Buffer00 ; | FSR=#Buffer00
MOVWF FSR ; | |
MOVLW h’0C’ ; | Counter1=h’0C’
CheckTTagLoop: ; | {% 1571+(12-Counter1)*15Ti from first bit
GOTO Gap1 ; | { goto Gap1 } // never happens during first bit
MOVF INDF,W ; | Counter2=INDF
MOVLW h’0C’ ; | FSR=FSR+h’0C’
ADDWF FSR,f ; | |
MOVF INDF,W ; | if (Couter2!=INDF)
XORWF Counter2,W ; | |
BTFSS _ZERO ; | |
GOTO Gap2 ; | { goto Gap2 } // never happens during first bit
MOVLW low(0-h’0C’+1) ; | FSR=FSR-h’0C’+1
ADDWF FSR,f ; | |
DECFSZ Counter1,f ; | DEC Counter1
GOTO CheckTTagLoop ; | } until (Counter1==#0)
; % 1570+12*15Ti = 1752Ti from first bit
HeadSearch: ; if (no header in Buffer) { goto Gap2 }
MOVLW d’96’ ; | set BitCtr
MOVWF BitCtr ; | |
HeadSearchL1: ; | {% 1752+(96-BitCtr)*31 Ti from first bit
GOTO Gap1 ; | { goto Gap1 } // never happens during 1st bit
BSF _GotHeader ; | if (header found) { goto HeadFound }
MOVF Buffer0B,W ; | |
XORLW h’80’ ; | |
BTFSS _ZERO ; | |
BCF _GotHeader ; | |
MOVF Buffer0A,W ; | |
XORLW h’2A’ ; | |
BTFSS _ZERO ; | |
BCF _GotHeader ; | |
BTFSC _GotHeader ; | |
GOTO HeadFound ; | |
RLF Buffer00,f ; | ROL Buffer
RLF Buffer0A,f ; | |
RLF Buffer0B,f ; | |
BCF Buffer00,0 ; | |
BTFSC _CARRY ; | |
BSF Buffer00,0 ; | |
GOTO HeadSearchL1 ; | } until (BitCtr==#0)
; |% 1751+96*31 Ti = 4727Ti from first bit
GOTO Gap2 ; | goto Gap2 // never happens during first bit
HeadFound: ; % 1766+(96-BitCtr)*29 Ti from first bit
; Delay to fixed time
HeadDelay: ; | {% 1766+(96-BitCtr)*31 Ti from first bit
GOTO Gap1 ; | { goto Gap1 } // never happens during 1st bit
CALL Delay08 ; | Delay 26Ti
CALL Delay08 ; | |
CALL Delay06 ; | |
CALL Delay04 ; | |

GOTO HeadDelay ; | } until (BitCtr==#0)
; % 1765+96*31 = 4741Ti from first bit
BTFSS _COLLISION ; if (collision occurred)

GOTO Gap1 ; { goto Gap1 } // never happens during 1st bit
; % 4743Ti from first bit

CALL Delay08 ; |
BCF _LED1 ; |
; % 4753Ti from first bit
SWAPF Buffer0B,W ; Transmit tag ID

CALL RS232TxDigit ; |%% CALL RS232TxDigit takes 1057Ti
MOVF Buffer0B,W ; |
SWAPF Buffer0A,W ; |
MOVF Buffer0A,W ; |
SWAPF Buffer09,W ; |
MOVF Buffer09,W ; |
MOVF Buffer08,W ; |
MOVF Buffer07,W ; |
MOVF Buffer06,W ; |
MOVF Buffer05,W ; |
MOVF Buffer04,W ; |
MOVF Buffer03,W ; |
MOVF Buffer02,W ; |
MOVF Buffer01,W ; |
MOVF Buffer00,W ; |
;% 30145Ti from first bit
CALL RS232CR ;%% CALL RS232CR takes 1052Ti


MOVLW d’255’ ; Delay 7396Ti

MOVWF DelayReg1 ; |
WaitingL1: ; |
CLRWDT ; |
CALL Delay10 ; |
CALL Delay10 ; |
CALL Delay05 ; |
GOTO WaitingL1 ; |

;% 38400+193 = 193Ti from first bit, -7Ti from gap
INCFSZ GapCountLo,f ; INC GapCount
SKIP ; |
INCF GapCountHi,f ; |
BTFSC GapCountHi,0 ; } until (GapCount>#257)
BTFSS GapCountLo,1 ; |
GOTO GapLoop ; |
GOTO BigLoop1
Gap1: ; !!!!! goto here after collision
; % -4Ti from gap

CLRF GapCountHi
CLRF GapCountLo
GOTO GapLoop
GapX: ;% 76+(Counter1*8)Ti from bit

GapXDelay: ; Delay 3+(128-Counter1)*8Ti
BTFSC Counter1,7 ; |
GOTO GapXDelayDone ; |
INCF Counter1,f ; |
NOP ; |
GOTO GapXDelayJ1 ; |
GapXDelayJ1: ; |
GOTO GapXDelay ; |
GapXDelayDone: ; |
;% 76+(oldCounter1)*8+3+128*8-(oldCounter1)*8Ti from bit
;% 1103Ti from bit = (400*2)+303Ti from bit
;// Not in first half of bit
Gap0: ; !!!!! goto here for gap which does NOT occur in first half of first bit
; % -7Ti from gap
SKIP ; |

GOTO GapLoop ; |
GOTO BigLoop1
Gap2: ; !!!!! goto here for valid FSK but invalid code
SKIP ; |
GOTO GapLoop ; |
GOTO BigLoop1
org h’0200’
P1Delay20:
GOTO P1Delay18
P1Delay18:
NOP

P1Delay17:
NOP
P1Delay16:
GOTO P1Delay14
P1Delay14:
NOP
P1Delay13:
NOP
P1Delay12:
GOTO P1Delay10
P1Delay10:
GOTO P1Delay08
P1Delay08:
GOTO P1Delay06
P1Delay06:
GOTO P1Delay04
P1Delay04:
RETLW 0
BigDelay:
;!!!!! delay (1568-6)Ti = 1562Ti

MOVWF DelayReg1 ; |
BigDelayL1: ; |
CALL P1Delay20 ; |
CALL P1Delay20 ; |
CALL P1Delay20 ; |
CALL P1Delay20 ; |
CALL P1Delay17 ; |
GOTO BigDelayL1 ; |
CALL P1Delay20 ; Delay 61Ti
CALL P1Delay20 ; |
CALL P1Delay20 ; |
NOP ; |
BCF _PAGE0
GOTO BigDelayDone
P1DelayTtag: ; Delay 38393Ti

CLRF DelayReg1 ; | Delay 38144Ti
P1DelayTtagL1: ; | |
CALL P1Delay20 ; | |
GOTO P1DelayTtagL1 ; | |
MOVLW DelayReg1 ; | |
P1DelayTtagL2: ; | |
GOTO P1DelayTtagL2 ; | |
NOP ; | Delay 1Ti
BCF _PAGE0
RETLW 0
ResetDelay:
CALL RS232CR ; Transmit CR regularly

MOVWF BeepCtrHi ; |
MOVLW d’0’ ; |
MOVWF BeepCtrLo ; |% 27277Ti from first bit
BeepLoopJ1: ; |
GOTO BeepLoopJ2 ; |
BeepLoopJ2: ; |
MOVLW Beep1 ; |
MOVWF BeepPort ; |
BeepD1: ; | |
CLRWDT ; | |
GOTO BeepD1 ; | |
MOVLW Beep2 ; |
MOVWF BeepPort ; |
NOP ; | |
GOTO BeepD2 ; | |
BeepD2: ; | |
CLRWDT ; | |
GOTO BeepD2 ; | |
GOTO BeepLoopJ1 ; |
GOTO BeepLoopJ2 ; |
NOP ; |
MOVLW Beep0 ; |
MOVWF BeepPort ; |
MOVLW d’20’ ; Wait ~10ms (reset gap)

MOVWF Counter1 ; |
ResetGapL1: ; |
MOVLW d’124’ ; | Wait ~500us
ResetGapL2: ; | |
CLRWDT ; | |
GOTO ResetGapL2 ; | |
DECFSZ Counter1,f ; |
GOTO ResetGapL1 ; |
BSF _FirstTime
Coil_On ; Turn coil on

MOVLW d’6’ ; Wait ~6ms
MOVWF Counter1 ; |
ResetDelayL1: ; |
MOVLW d’250’ ; |
MOVWF DelayReg1 ; |
ResetDelayL2: ; |
CLRWDT ; |
GOTO ResetDelayL2 ; |
DECFSZ Counter1,f ; |
GOTO ResetDelayL1 ; |
BCF _PAGE0
GOTO ResetDelayDone
end

Using the microID™ Programmer
1.0 INTRODUCTION The device can be programmed with 16 bytes (128 bits)
or 12 bytes (96 bits) of data length. Once the
The following is a description of how to program MCRF2XX enters its programming mode, it sets a lock
Microchip’s MCRF2XX family of RFID products. A bit at the same time. If the programming is interrupted
contactless programmer (PG103001), user interface for any reason during the programming period, the pro-
software (RFLAB™), and a host computer are needed gramming will be stopped, and the device may be left
to program the MCRF2XX devices. The device can also partially programmed. The device will still be locked
be programmed in a standard terminal mode (i.e., even though it has not been programmed completely. In
c:\windows\terminal.exe) rather than the RFLAB. See this case, the programmer will return a fail code to the
Figure 5-1 for the programming sequence. host computer.
The microID programmer requires an external power Any device that has been programmed, either fully or
supply (+9 VDC, >750 mA). The RFLAB software runs partially, will remain in a locked status; therefore, it
under Microsoft® (MS) Windows® 95 environment only. cannot to be reprogrammed. If programming has been
The programmer communicates with a host computer successfully completed, the programmer will return a
via an RS-232 serial interface at 9600 baud, 8 data bits, verification code to the host computer.
1 stop bit, and no parity.
In order to program the MCRF2XX device, it is
Since the MCRF2XX is a One-Time-Programmable necessary to provide a proper programming signal
(OTP) device, only a blank (unlocked) device can be level to the device. The device requires specific peak-
programmed by the programmer. Therefore, the pro- to-peak voltages for programming. Since the voltage
grammer first checks the status of the memory in the induced in the tag coil varies depending on the coil
device before initiating programming. A blank device parameters, the output signal level of the programmer
contains an array of all ‘1’s. must be calibrated to provide a proper programming
signal level at the tag coil. A detailed calibration
procedure is described in Section 3.0.
FIGURE 1-1: RFLAB SOFTWARE RUNNING UNDER MS WINDOWS 95
RFLAB is a trademark of Microchip Technology Inc.

2.0 PROGRAMMING SIGNAL 2.1 Power-up, Gap, and Verification
WAVEFORM Signals
Figure 2-1 shows the waveform of the programming The programming signal starts with a power-up signal
signal. Once the programmer sends a power-up and for 80 ~ 180 µS, followed by a gap signal (0 volt) for
gap signal to the device, the device transmits back a 50 ~ 100 µS. The purpose of these signals is to check
verification bitstream in FSK. The verification signal whether the device is blank and establish a program-
represents the contents of the memory in the device. ming mode in the device. Once the device recognizes
The blank device has all ‘1’s in its memory. A bit ‘1’ in the power-up signal, it transmits back the contents of its
FSK is represented by a low signal level for five cycles memory. If the device transmits back with the blank
and a high signal level for an additional five cycles bitstream (FSK with all ‘1’s), it is ready to be pro-
(Figure 2-1). grammed. If the device is not blank, the programmer
The device will respond with a nonmodulated (no data) informs the host computer that it is nonprogrammable.
signal if the device has not recognized the power-up If the power-up signal level is out of the programming
signal. In this case, the power-up signal level should be voltage range, the device will transmit back a
calibrated to provide a proper signal level to the device. non-modulated signal (no data). The nonmodulated
The calibration procedure is explained in Section 3.0. signal has no variation in the amplitude (constant
After the device is verified as blank, the programmer voltage signal). A variable resistor, R5 in the microID
sends a programming signal to the device. The pro- programmer, should be adjusted to provide a proper
gramming data is represented by an amplitude modu- power-up signal level. A typical signal level is about
lation signal. Therefore, bit ‘1’ and ‘0’ are represented 22 ± 3 VPP across the tag coil. This calibration
by a low-power (level) signal and a high power (level) procedure is described in Section 3.0.
signal, respectively, as shown in Figure 2-1. Each data
2.2 Programming Sequence
bit is represented by 128 cycles of the carrier signal. An
MCRF200 configured for 128 bits uses all bits in the Once the device has been verified blank for program-
transfer; an MCRF200 configured for 96 bits ignores ming, the programmer sends a programming sequence
bits 33 through 64, although they are present in the pro- to the device. The programming data entered in the
gramming sequence. Therefore, for a 125 kHz carrier RFLAB software is sent to the device via the
signal, it takes 1.024 ms for one data bit (128 cycles x programmer. The programming signal waveforms are
8 µs/cycles) and 131.072 ms for 128 data bits shown in Figure 2-1. One bit of data is represented by
(128 cycles/bit x 8 µs/cycle x 128 bits). 128 cycles of the carrier signal. It takes 131.072 ms to
A guard-band of ∆t = 10 cycles (80 µs) should be kept complete one programming cycle for the total of 128
at each end of a high-power (0) bit as shown in data bits. An MCRF200 configured for 128 bits uses all
Figure 2-1. This is to prevent accidental programming bits in the transfer; an MCRF200 configured for 96 bits
or disturbing of adjacent bits in the array. ignores bits 33 through 64, although they are present in
the programming sequence. After the programming
The memory array is locked at the start of the program-
sequence, the device transmits back a verification
ming cycle. Therefore, when the device leaves the pro-
bitstream. The programmer reports to the host
gramming field, it locks the memory permanently,
computer the status of the programming.
regardless of the programming status. The device
should not be interrupted during the programming The data is programmed only if the programming signal
cycle. level is within the limit in the programming voltage
requirement of the device. It takes several
The device transmits the programmed (data contents)
programming/verify cycles to completely program each
circuits back to the programmer for verification. If the
bit of the MCRF200. The microID programmer uses ten
verification bitstream is correct, the programmer sends
(10) blind program/verify cycles before checking the
a verified signal (‘v’) to the host computer; otherwise, it
final verify sequence for correct programming. Faster
sends an error message (‘n’, see Figure 5-1).
programmers can be designed by checking each
The programming signal level must be within a limit of program/verify cycle; after approximately 3 ~ 5 cycles,
the programming voltage window for successful pro- the device will verify correctly. Once a correct verify
gramming. The calibration of the signal level is sequence is received, one additional program cycle
explained in Section 3.0. should be run to ensure proper programming margin.

FIGURE 2-1:
Contactless Programming Protocol
f = 125 kHz
t = 8 µs
CONTACTLESS PROGRAMMING WAVEFORM

POWER UP GAP VERIFY PROGRAM
FSK Signal

Bit 1 Bit 2 Bit 3…
Low High
Power Power
Not Modulating Signal Signal
80 - 180 µs ~ 50 - 100 µs
∆t ∆t
Modulating
22 ± 3 VPP 33 ± 1VPP
128 bits x 128 cycles/bit x 8 µs/cycle = 131.1 ms
22 ± 3 VPP (R5) (R7)
(R5) 0V 22 ± 3 VPP
128 bits
1 bit = 128 cycles x 8 µs/cycle = 1.024 ms

∆t = Guard Band
DS51139A-page 119
Default programming protocol = FSK, Fc/8/10, 128 bits

For 96-bit programming, bits 33 – 64 are ‘don’t care’, but all Note: Low-power signal leaves bit = 1
128-bit cycles must be in the sequence. High-power signal programs bit = 0
3.0 CALIBRATION OF Programming Signal Level:
PROGRAMMING VOLTAGE e) Click on the buttons in RFLAB for the
appropriate data type and protocol for your tag.
If you are using your own tag coil (with resonant
capacitor) with the MCRF200 or MCRF250, you may f) Enter the programming data in the text box.
need to calibrate the programmer for your circuit. g) Click the Program button. This will send the
Follow this procedure, if you are unable to program your programming data to the device. A typical signal
tag. level for programming is 33± 1 VPP at the tag
coil, but can vary outside of this range.
a) Open the programmer, and turn R5 and R6 full
counter-clockwise. Remove the four screws at h) After the device has been programmed, it
the back of the programmer. transmits back the programmed data for verifi-
cation.
b) Set up the programmer and calibration tag as
shown in Figure 3-1. i) If the data has been programmed correctly, a
green bar will appear for a few seconds with a
Set Up: message indicating Programming successful.
• Connect the +9 VDC power supply to the If the programming has been unsuccessful due to
programmer. insufficient programming signal levels, a message
• Connect the RS-232 cable from the external serial indicating Programming unsuccessful will appear
port in the programmer box to a COM port in the in the RFLAB. See Figure 1-1. In this case, R7
host. (“High Power”) must be adjusted to provide a
• Open up the RFLAB software on the host proper programming signal level to the tag coil.
computer. Turn R7 clockwise in 1/16-inch increments, repeat-
• Place the calibration tag in the center of the tag ing steps (f) through (h) until programming is suc-
area on the programmer. A calibration tag is any cessful. Then turn R7 clockwise one more
tag using MCRF200 or MCRF250 silicon and your increment.
own coil and capacitor. Note: The MCRF200 or MCRF250 lock may be
c) Run the programming software (RFLAB). locked even if the programming cycle was
Power-up Signal Level: unsuccessful; therefore, a new MCRF200
sample may be required for each pass
d) Click the Blank Check button in the RFLAB through steps (f) through (h).
software.
j) After programming is completed successfully,
If the device is blank, a green bar appears in the keep these R5 and R7 settings for future pro-
window with a message indicating that it is blank. gramming of your tags. Once this calibration has
If the device is not blank or the power-up signal is been done, remove the calibration tag from the
out of range, a red bar appears in the window with programmer and reinstall the four screws.
an error message indicating that it is not blank.
The variable resistor (R5) in the programmer
FIGURE 3-1: MCRF2XX microID
should be adjusted to provide a proper “low-power”
voltage level to the tag coil. A typical signal level is PROGRAMMER AND
about 22 ± 3 VPP at the tag coil, but it can vary out- CALIBRATION TAG COIL
side of this range. ARRANGEMENT FOR
PROGRAMMING SIGNAL
R5: Turn clockwise in 1/16-inch increments
LEVEL MEASUREMENT
Repeat step (d) while adjusting R5. Once the device
has been verified as a blank, turn it clockwise one more
increment. Then move to the next step.
Place your coil in

the center of the red
outlined area.

4.0 PROGRAMMING PROCEDURE 4.1 Error Conditions
a) Set up the programmer and open up the RFLAB If the host computer does not send programming data
software on the host computer. to the programmer for more than 3 seconds, the
Set Up: programmer will timeout and reset. If the programmer
• Connect the +9 VDC power supply to the does not respond to the host computer, there will be an
programmer. error message indicating Programmer time out. If
invalid programming data is sent to the programmer
• Connect from the external serial port in the
during the loading of the program buffer, the
programmer box to a COM port in the host com-
programmer will return a message indicating Invalid.
puter using the RS-232 cable.
b) Place the RFID device at the center of the
programmer.
c) Click Blank Check button if you want to check
whether the device is blank. This button can also
be used to verify that the device is assembled
properly.
Note: The device can’t be programmed unless it
is blank.
d) Enter the programming data in the RFLAB and
select appropriate data type.
e) If several devices are going to be programmed
sequentially by any number, click the Auto
Increment button and specify the increment
number.
f) Click the Program button. This will send the
data to the device.
g) If the data has been programmed correctly,
there will be a green bar with a message indicat-
ing Programming successful.
If the programming has been unsuccessful due to
out-of-range in the programming signal level, a
message and red bar will show up indicating
Programming unsuccessful. In this case, the
programming signal voltage may need to be
calibrated for your tag. See the calibration proce-
dure for the programming signal level in the previ-
ous section.
h) Repeat step (a) through (g) for other tags.

FIGURE 4-1: PROGRAMMING FLOWCHART USING RFLAB
Start
Check Cable Connection and COM Port
Place a blank tag on programmer

Click “Programmer” Menu Button in RFLAB.
Click “COM Port” Menu Button
Select a COM Port Number
Programmer
No Error Message:
power-up and
connection ok? “Programmer Time-out”
Yes
Adjust the Programming Power-up Adjust Programming Signal Level
Signal Level (R5) or try a new tag. (R5 and R7)
Click “Blank Check” Button in RFLAB
(Due to not blank

or incorrect
Error message with a power-up
Blank
“Device not Blank” signal level) No
and power-up
or signal level ok?
“Device not present”
Yes
Message with a Green Bar:

“Blank/Programmable”
Type in Programming
Data in RFLAB
Send Program Data:

Click “Program” Button
Prog No Error Message with a Red Bar:

Successful? “Programming Unsuccessful”
Yes
Message with a Green Bar:

“Programming Successful”
Stop

5.0 PROGRAMMING IN A 5.3 Program and Verify the Device
STANDARD TERMINAL MODE After 16 bytes of data have been received by the
In special cases, the device can also be programmed in programmer, it is ready to begin programming the data
a standard terminal mode by executing the buffer into the MCRF2XX. Sending an ASCII ‘V’ (56h)
terminal.exe program (c:\windows\terminal.exe) or will tell the programmer to program the 16 bytes it has
by any customer production software. The programmer received and verify that the device has programmed
setup, signal waveforms, and calibration procedure are properly. When the device programs properly, the pro-
the same as programming with the RFLAB. grammer replies with ASCII ‘y’ (79h). If the program-
ming was not successful, the programmer replies with
The following is a description of how to interface a host
ASCII ‘n’ (6Eh). A successful programming operation
computer to Microchip’s contactless programmer
should take about 3 to 4 seconds per device.
without the use of RFLAB software. The programmer
will check for a blank, unlocked MCRF2XX tag before 5.4 Error Conditions
initiating programming. Once programming has been
completed, the programmer will return a pass or fail If the PC does not send a byte to the programmer for
code. The programmer communicates at 9600 baud, 8 more than 3 seconds, the programmer will timeout and
data bits, 1 stop bit, and no parity. reset. The entire programming sequence will need to
Figure 5-1 shows the programming flow and be repeated, beginning with the programmer wake-up
communication handshakes between host and pro- byte ASCII ‘W’.
grammer. If invalid bytes are sent to the programmer during the
loading of the program buffer, the programmer will
5.1 Programmer Wake-up return an ASCII ‘I’ (49h). In this case, the entire
programming sequence must be repeated, beginning
Sending an ASCII ‘W’ (57h) to the programmer on the
with the programmer wake-up byte ASCII ‘W’.
RS-232 interface will tell the programmer to wake up
and be prepared to receive commands. The
programmer will reply with ASCII ‘R’ (52h) when it is
ready.
5.2 Blank Check

Sending an ASCII ‘T’ (54h) will signal the programmer
to read the part about being contactlessly programmed
and check to see if it is blank (all 1’s) and unlocked. If
the part is blank and unlocked, the programmer will
reply with an ASCII ‘Y’ (59h) to signify programming
should continue. If the part is not blank or not unlocked,
the programmer will reply with an ASCII ‘N’ (4Eh) to
indicate an error. It is always necessary to perform a
blank check before programming MCRF2XX devices.
5.2.1 SENDING DATA TO THE PROGRAMMER
If the programmer responds with an ASCII ‘Y’,

indicating that the part is blank, the PC can begin
passing the 16 bytes of required data to the
programmer data buffer. AnMCRF200 configured for
128 bits uses all 16 bytes of data in the transfer; when
programming a 96-bit device, however, bits 33 through
64 are ‘don’t care’ and are ignored by the MCRF200.
The data should be passed in ASCII equivalent hex
bytes and the programmer will acknowledge the receipt
of each byte by echoing back what it has received. For
example, to program 05 hex data into the first byte, the
PC would send ASCII ‘0’ (30h), the programmer would
echo ‘0’ back. Next, the programmer would send ASCII
‘5’ (35h), and the programmer will echo back ‘5’. All of
the data must be sent in UPPERCASE ASCII
equivalent only. See Figure 5-1 for a typical
programming sequence.

FIGURE 5-1: TYPICAL SEQUENCE
The following is the programming sequence necessary to

wake up the programmer, check if a MCRF2XX part is
blank, unlocked and ready to be programmed, send
F1E2D3C4B5A6978888796A5B4C3D2E1F ASCII data to
the programmer, and instruct the programmer to program
and verify the device.
STEP1 PC Send Programmer

WAKE UP ‘W’ to the replies with
programmer ‘R’ to the PC
STEP2 Programmer
VERIFY BLANK PC Send replies with ‘Y’
‘T’ to the if the device
programmer is OK and ‘N’ if
there is an error
STEP3
PASS 16 BYTES
OF DATA
PC Send Programmer replies
F ‘F’ to prog. with ‘F’
Byte 1
1 ‘1’ to prog. with ‘1’
E ‘E’ to prog. with ‘E’
Byte 2

Byte 15
E ‘E’ to prog. with ‘E’
Byte 16
F ‘F’ to prog. with ‘F’
STEP4
PROGRAM/VERIFY
Programmer
replies with ‘y’
PC Send ‘V’ to the
if the device
programmer to initiate
programs OK and
a program/verify sequence ‘n’ if there is an
(ID internal program/verify) error
Note: See the signal waveforms and calibration procedure in

Sections 2.0 and 3.0.

TABLE 5-1 ASCII CHARACTER SET
Most Significant Characters
Hex 0 1 2 3 4 5 6 7
0 NUL DLE Space 0 @ P ‘ p
1 SOH DC1 ! 1 A Q a q
2 STX DC2 " 2 B R b r
3 ETX DC3 # 3 C S c s
Least Significant Characters
4 EOT DC4 $ 4 D T d t
5 ENQ NAK % 5 E U e u
6 ACK SYN & 6 F V f v
7 Bell ETB ’ 7 G W g w
8 BS CAN ( 8 H X h x
9 HT EM ) 9 I Y i y
A LF SUB * : J Z j z
B VT ESC + ; K [ k {
C FF FS , < L \ l |
D CR GS - = M ] m }
E SO RS . > N ^ n ~
F SI US / ? O _ o DEL

6.0 microID™ PROGRAMMER SCHEMATIC

7.0 microID™ PROGRAMMER BILL OF MATERIALS
Reference
Designator
1 1 ICA-328-S-ST U4 SOCKET, 28 SAMTEC
PIN,.300,
MACHINED
COLLET
2 1 -SPARE- SP1, LED1, R1, -SPARE-
R2 LOCATION DO NOT
INSTALL
3 1 PCC220CNCT-ND C7 CAP SMT, 22 pF PANASONIC
NPO 0805
4 2 0805N471J101NT C8, C9 CAP SMT, 470 pF MALLORY
5% 100V 0805
5 1 CD15FC561JO3 C18 CAP, 560 pF, MICA, CORNELL MOUSER 5982-15-
DIPPED, 300V, DUBILIER 300V560
AX (0.234LS)
6 1 ECU-V1H102JCX C11 CAP SMT, 1000 pF PANASONIC
50V NPO CER,
0805
7 1 CD19FD472JO3 C2 CAP, 4700 pF, MICA, CORNELL MOUSER 5982-19-
DIPPED, 500V, AX DUBILIER 500V4700
(0.344LS)
8 9 250R18Z104MV4 C1, C3-C6, C12, CAP SMT, 0.1 µF JOHANSON NEWARK 50F3674
E-6 C15-C17 20% 50V 0805
9 1 ECS-H1ED106R C13 CAP SMT, 10 µF, PANASONIC DIGIKEY PCT5106CT-
TANT ELEC, 25V, ND
7343
10 1 ECE-V0JA101SP C14 CAP SMT, 100 µF, PANASONIC DIGIKEY PCE3058CT-
TANT ELEC, 6.3V, ND
(VS-D)
11 1 LL4148 D1 DIODE SMT, 5uA, DIODES INC DIGIKEY LL4148DITR-
100V, 500 mW, ND
FAST SWITCHING,
DL-35
12 1 DL4002 D2 DIODE SMT, DIODES INC. DIGIKEY DL4002DITR-
RECTIFIER, ND
1N4002, 1A, 100V,
DL-41
13 1 3345P-1-101 R7 RES, POT, 100 OHM BOURNS DIGIKEY 3345P-101-ND
1/2 RD WW ST SL
14 1 3345P-1-501 R5 RES, POT, 500 OHM BOURNS DIGIKEY 3345P-501-ND
1/2 RD WW ST SL
15 1 ERJ-6GEYJ100 R6 RES SMT, 10 OHM PANASONIC P10ACT-ND
1/10W
5% TYPE 0805
16 1 ERJ-6GEYJ470V R4 RES SMT, 47 OHM PANASONIC DIGIKEY P470ATR-ND
1/10W
5% TYPE 0805
17 1 ERJ-6GEYJ471V R3 RES SMT, 470 OHM PANASONIC P470ATR-ND
1/10W
5% TYPE 0805
18 1 ERJ-6GEYJ222V R13 RES SMT, 2.2K PANASONIC P2.2KATR-ND
OHM 1/10W 5%
TYPE 0805
19 1 ERJ-6GEYJ103V R8 RES SMT, 10K 1/8W PANASONIC DIGIKEY P10KATR-ND
5% TYPE 0805

Reference
Designator
20 1 ERJ-6GEYJ473V R11 RES SMT, 47K OHM PANASONIC DIGIKEY P473ATR-ND
1/10W
5% TYPE 0805
21 2 ERJ-6GEYJ104V R12, R14 RES SMT, 100K PANASONIC DIGIKEY P100KATR-ND
OHM 1/10W 5%
TYPE 0805
22 1 ERJ-6GEYJ154V R10 RES SMT, 150K PANASONIC DIGIKEY P150KATR-ND
OHM 1/8W 5% 0805
23 1 ERJ-6GEYJ474V R9 RES SMT, 470K PANASONIC DIGIKEY P470KATR-ND
OHM 1/8W 5% 0805
24 1 MM74HC00M U1 IC, SMT, 74HC00 FAIRCHILD DIGIKEY MM74HC00M-
QUAD 2 IN NAND SEMICONDUCTOR ND
(SO-14)
25 3 NDS9942 U2, U5, U6 IC, SMT, 9942 MOS- FAIRCHILD DIGIKEY NDS9942TR-
FET N-CH & P-CH SEMICONDUCTOR ND
20V (SO-8)
26 1 MM74HC86MX U3 IC, SMT, 74HC86, FAIRCHILD DIGIKEY
QUAD XOR GATE SEMICONDUCTOR
(SO-14)
27 1 PIC16C73A /P U4 IC, PIC16C73A /P, MICROCHIP
PLASTIC DIP, 28P,
0.300
28 1 MAX232ACSE U7 IC, MAX232ACSE MAXIM DIGIKEY MAX232ACSE-
DUAL RS-232 ND
TRANSMITTER/
RCVR, (SO-16)
29 1 MC34072D U8 IC, DUAL OP AMP, MOTOROLA
(SO-8)
30 1 L7805CV U9 IC, REG, +5V, 1.5A, SGS THOMSON MOUSER 511-L7805CV
10%,
TO-220
31 1 EFO-EC8004A4 Y1 OSC, 8.00 MHz CER PANASONIC DIGIKEY PX800-ND
RESONATOR W/
CAP 3 PIN
32 1 MCT0003-000 L1 INDUCTOR, 162 µH CORNEL DUBILIER
33 1 DE9S-FRS P2 CONN, D-SUB 9P SPC TECHNOL-
RECPT RT ANGLE OGY
34 1 DJ005B P1 JACK, POWER, LZR
2.5mm DC PC ELECTRONICS
MOUNT

8.0 PROGRAMMER SOURCE CODE FOR PIC16C73
; #=#=#=#=#=#=#=#=#=#=# PROJECT Microchip Programmer Reader #=#=#=#=#=#=#=#=#=#=#
; #=#=#=#=#=#=#=#=#=#=# 16C73A module #=#=#=#=#=#=#=#=#=#=#
; rfgopr5.asm
; PIC16C73A running at 8.5MHz, Ti = 0.47us
; Tcy = 16 Ti
; ///////////////////////////////////////////////////////////////////////////
; Revision history
; ///////////////////////////////////////////////////////////////////////////
;
; Ver Date Comment
;
; 1.00 10/24/97 Shannon/Hugh first pass
; 1.04 13 Feb 98 ADDED TIMEOUT TO TESTMOD
;
LISTP=PIC16C73A
INCLUDE “P16C73A.INC”
__config b’11111111110010’
; Code Protect off, Brown-out detect on, Power-up timer on, WDT off,
; HS oscillator
constant StartPORTA = b’000000’

constant StartTRISA = b’010111’

#define _BUZZ1 PORTB,6
constant StartPORTB = b’00010010’
constant StartTRISB = b’00000100’
constant StartOPTION = b’10001000’
; Pullups disabled, TMR0 internal, WDT*1
COUNT1EQU0x20 ; COUNT REGISTER

DATA0EQU0x21
DATA1EQU0x22
DATA2EQU0x23
DATA3EQU0x24
DATA4EQU0x25
DATA5EQU0x26
DATA6EQU0x27
DATA7EQU0x28
DATA8EQU0x29
DATA9EQU0x2A
DATAAEQU0x2B
DATABEQU0x2C
DATACEQU0x2D
DATADEQU0x2E
DATAEEQU0x2F
DATAFEQU0x30
BIT EQU 0x31
OVERPROEQU0x32
DELAY1EQU0x33
DELAY2EQU0x34
DelayReg?H = h’35’
DelayReg?L = h’36’
CycleCtr?H = h’37’
CycleCtr?L = h’38’
TimerHi = h’39’
TimerMid = h’3A’
TimerLo = h’3B’
BitCtr = h’3C’
BO3 = h’3D’
RxByte = h’3E’
TxByte = h’3F’
ByteCtr = h’40’

NoiseTimeout = h’41’
SampTimeout = h’42’
CycleCtr2?L = h’43’
CycleCtr2?H = h’44’
#define _RAW_DATA PORTA,4
#define _RS232OUT PORTC,6
#define _TMR2ON T2CON,2
#define _RS232IN PORTC,7
#define _COIL_PWR_0 PORTB,3 ; cycle at 30ms period (1=low power)
#define _COIL_EN PORTB,1
SKIP macro
BTFSC PORTA,7
endm
; ***** Reset Vector
org h’000’
CLRF STATUS
CLRF PCLATH
CLRF INTCON
GOTO RESET_A
; ***** Interrupt Vector - no interrupts yet
org h’004’
CLRF STATUS
CLRF PCLATH
GOTO RESET_A
RS232StopBit ;[0] Delay >=208 cycles with _RS232OUT high

BSF _RS232OUT ; |
MOVLW d’208’-d’12’+d’40’; |
DelayW12 ;[0] Delay 12+W cycles
MOVWF DelayReg?L ; |
Delay1 ;[0] Delay 11+Delay cycles
MOVLW d’4’ ; |
Delay1L ; |
SUBWF DelayReg?L,f ; |
BTFSC _CARRY ; |
GOTO Delay1L ; |
COMF DelayReg?L,W ; |
ADDWF PCL,f ; |
Delay07 ;[0] Delay 7 cycles
NOP ; |
NOP ; |
NOP ; |
RETLW h’00’ ; |
RESET_A
CLRWDT ; Initialise registers, clear watchdog timer
CLRF FSR ; | FSR=#0
MOVLW StartPORTA ; | Initialise PORT registers
MOVWF PORTA ; | |
MOVWF PORTB ; | |
CLRF INTCON ; | Interrupts off
MOVLW b’110001’ ; | TMR1 prescale *8, on
MOVWF T1CON ; | |
MOVLW b’0000000’ ; | TMR2 postscale *1, off, prescale *1

MOVWF T2CON ; | |
MOVLW d’8’ ; | Duty on period = 8 Ti @@@
MOVWF CCPR1L ; | |
MOVLW b’001100’ ; | CCP1 to PWM, 0,0 extra duty time @@@
MOVWF CCP1CON ; | |
MOVLW b’00000000’ ; | A/D convertor OFF
MOVWF ADCON0 ; | |
BSF STATUS,RP0 ;^| Initialise TRIS registers
MOVWF TRISA ;^| |
MOVWF TRISB ;^| |
MOVLW 0x82
MOVWF TRISC
MOVLW d’15’ ;^| PR2=7 (period of TMR2=16) @@@
MOVWF PR2 ;^| |
MOVLW h’03’ ;^| (It says so on page 2-584)
MOVWF PCON ;^| |
MOVLW b’110’ ;^| No analog inputs
MOVWF ADCON1 ;^| |
BCF STATUS,RP0 ; | |
; !!!!! set TRIS registers, and other hardware registers.

BCF T2CON,2; turn coil off
CLRF TMR2
BCF PORTB,3
CALL RS232On
BigLoop1
CALL RS232WaitForever
CheckRxByte
MOVF RxByte,W
XORLW ‘W’
BTFSC _ZERO
GOTO INTERRUPT
CALL RS232On
MOVLW ‘Q’
CALL RS232TxW
GOTO BigLoop1
INTERRUPT
CALL Delay07 ; LED1 on, LED2 on (orange/yellow)
BSF _LED1 ; |
CALL Delay07 ; |
BSF _LED2 ; |
CALL Delay07 ; |
INT_WAKEUP
MOVLW ‘R’
MOVWF RxByte
CALL RS232On ; delay
MOVF RxByte,W ; Transmit RxByte
CALL RS232TxW ; |
CALL RS232Rx ; Read byte from RS-232
BTFSC _CARRY ; | (if timeout, goto INT_END)
GOTO INT_END ; |
MOVF RxByte,W ; if (RxByte<>#’T’)
XORLW ‘T’ ; |
BTFSS _ZERO ; |
GOTO CheckRxByte ; { goto CheckRxByte }
MOVLW d’10’

MOVWF CycleCtr?H
CLRF CycleCtr?L
Top1 BCFPORTB,3; SET FOR LOW VOLTAGE

CALLDELAY ; CALL A SMALL DELAY
GAP1; THIS IS THE ROUTINE THAT SETS THE GAP
BCF PORTB,3
CALL DELAY
BSF T2CON,2 ; TURN ON THE COIL
MOVLW0x32 ; MOVE 32 HEX TO W, NUMBER CYCLES BEFORE A GAP

MOVWFCOUNT1 ; MOVW W INTO COUNT1
LOOP11DECFSZCOUNT1,1; DECREMENT COUNT 1 UNTIL IT IS ZERO
GOTOLOOP11
BCF T2CON,2 ; TURN OFF THE COIL
MOVLW0x40 ; MOVE 10 HEX TO W, DURATION OF GAP

GOTOLOOP21
BSF T2CON,2 ; TURN THE COIL BACK ON
CALL TWC ; CALL A DELAY FOR AMP TO SETTLE

CALL TWC
CALL TWC
CALL TWC
CALL TWC
WaitFall1 ; Wait for falling edge

WaitFall1A ; | Wait for high
MOVLW d’200’ ; | | Set timeout
MOVWF DelayReg?H ; | | |
CLRF DelayReg?L ; | | |
WaitFall1AL ; | | { {
DECFSZ DelayReg?L,f ; | | if (timeout)
SKIP ; | | |
DECFSZ DelayReg?H,f ; | | |
SKIP ; | | |
GOTO INT_ErrorN ; | | { goto INT_ErrorN }
BTFSS _RAW_DATA ; | | } until (_RAW_DATA==#1)
GOTO WaitFall1AL ; | | |
NOP ; | | |
SKIP ; | | |
SKIP ; | | |
GOTO WaitFall1AL ; | |
WaitFall1B ; | Wait for low
MOVLW d’200’ ; | | Set timeout
MOVWF DelayReg?H ; | | |
CLRF DelayReg?L ; | | |
WaitFall1BL ; | | { {
SKIP ; | | |
SKIP ; | | |
BTFSC _RAW_DATA ; | | } until (_RAW_DATA==#0)

GOTO WaitFall1BL ; | | |
NOP ; | | |
SKIP ; | | |
SKIP ; | | |
CLRF DelayReg?L ; Clear timer

WaitFall2 ; Time falling edge
WaitFall2A ; | Wait for high
WaitFall2AL ; | | { {
NOP ;
NOP ;
INCF DelayReg?L,f ; | | Increment timer
BTFSC DelayReg?L,7 ; | | if timeout,
GOTO WaitFall2AL ; | | |
NOP ; | | |
NOP ;
NOP ;
GOTO WaitFall2AL ; | |
NOP ;
WaitFall2B ; | Wait for low
WaitFall2BL ; | | { {
NOP ;
NOP ;
NOP ; | | |
NOP ;
NOP ;
; DelayReg?L*8Ti = period of signal
; period of _RAW_DATA on FSK = Tcy*10 = Ti*160
; DelayReg?L = 20 if FSK present
; if period does not match FSK, goto INT_ErrorN
MOVF DelayReg?L,W ; | if (DelayReg?L<14)
ADDLW low(0-d’14’) ; | |
BTFSS _CARRY ; | |
GOTO INT_ErrorN ; | { goto INT_ErrorN }
ADDLW low(d’14’-d’22’); | if (DelayReg?L>=22)
BTFSC _CARRY ; | |
GOTO INT_ErrorN ; | { goto INT_ErrorN }
MOVLW d’7’ ; CycleCtr > 13*128=1664

MOVWF CycleCtr?H ; |
MOVLW d’164’ ; |
MOVWF CycleCtr?L ; |
TestGotLo
DECFSZ CycleCtr?L,f
SKIP

DECFSZ CycleCtr?H,f
SKIP
GOTO INT_ErrorN
MOVLW 0x20
MOVWF COUNT1
BTFSS _RAW_DATA
GOTO TestGotHi
TestGotLoLoop
BTFSS _RAW_DATA
GOTO TestGotHi
DECFSZ COUNT1,1
GOTO TestGotLoLoop
GOTO MChip_Prog
TestGotHi
MOVLW 0x20
MOVWF COUNT1
BTFSC _RAW_DATA
GOTO TestGotLo
TestGotHiLoop
BTFSC _RAW_DATA
GOTO TestGotLo
DECFSZ COUNT1,1
GOTO TestGotHiLoop
;END TEST FOR NO MODULATION
MChip_Prog
BCF _TMR2ON
CALL TWC
CLRF DATA0
CLRF DATA1
CLRF DATA2
CLRF DATA3
CLRF DATA4
CLRF DATA5
CLRF DATA6
CLRF DATA7
CLRF DATA8
CLRF DATA9
CLRF DATAA
CLRF DATAB
CLRF DATAC
CLRF DATAD
CLRF DATAE
CLRF DATAF
MOVLW ‘Y’ ; RxByte=’Y’

MOVWF RxByte ; |
MOVLW DATAF ; FSR=#DATAF
MOVWF FSR ; |
MOVLW h’20’ ; ByteCtr=#h’20’
MOVWF ByteCtr ; |
RS_ByteLoop ; {
MOVF RxByte,W ; Transmit RxByte on RS-232
CALL RS232TxW ; |
CALL RS232Rx ; Read RS-232 byte into RxByte
BTFSC _CARRY ; |(if timeout, goto INT_END)
GOTO INT_END ; |
MOVF RxByte,W ; BO3=RxByte
MOVWF BO3 ; |
MOVLW h’30’ ; if (BO3<#h’30’)
SUBWF BO3,W ; |
BTFSS _CARRY ; |

MOVWF BO3 ; BO3=BO3-#h’30’
MOVLW h’3A’-h’30’ ; if (BO3>=#h’3A’-#h’30’)
SUBWF BO3,W ; |
BTFSS _CARRY ; |
GOTO RSDataJ1 ; {
MOVWF BO3 ; BO3=BO3-#h’3A’+#h’30’
MOVLW h’41’-h’3A’ ; if (BO3<#h’41’-#h’3A’)
SUBWF BO3,W ; |
BTFSS _CARRY ; |
MOVWF BO3 ; BO3=BO3-#h’41’+#h’3A’
MOVLW h’47’-h’41’ ; if (BO3>=#h’47’-#h’41’)
SUBWF BO3,W ; |
BTFSC _CARRY ; |
MOVLW h’0A’ ; BO3=BO3+#h’0A’
ADDWF BO3,f ; |
RSDataJ1 ; }
SWAPF BO3,W ; W = { BO3 swapped if ByteCtr,0==#0
BTFSC ByteCtr,0 ; | { BO3 if ByteCtr,0==#1
MOVF BO3,W ; |
IORWF INDF,f ; INDF=INDF OR W
BTFSC ByteCtr,0 ; if (ByteCtr,0==#1)
DECF FSR,f ; { FSR=FSR-#1 }
DECFSZ ByteCtr,f ; DEC ByteCtr
GOTO RS_ByteLoop ; } until (ByteCtr==#0)

MOVF RxByte,W ; Transmit RxByte on RS-232
CALL RS232TxW ; |
CALL RS232Rx ; Read RS-232 byte into RxByte
BTFSC _CARRY ; |( if timeout, goto INT_END)
GOTO INT_END ; |
MOVF RxByte,W ; if (RxByte!=#’V’)
XORLW ‘V’ ; |
BTFSS _ZERO ; |
; ********
Top BCF PORTB,3 ; SET FOR LOW VOLTAGE

CALLDELAY ; CALL A SMALL DELAY
GAP ; THIS IS THE ROUTINE THAT SETS THE GAP
BCF PORTB,3
CALL DELAY
BSF T2CON,2 ; TURN ON THE COIL
MOVLW0x32 ; MOVE 32 HEX TO W, NUMBER CYCLES BEFORE A GAP

GOTOLOOP1
BCF T2CON,2 ; TURN OFF THE COIL
MOVLW0x40 ; MOVE 10 HEX TO W, DURATION OF GAP

GOTOLOOP2
BSF T2CON,2 ; TURN THE COIL BACK ON

MOVLWd’8’; MOVE 5 INTO THE W REGISTER
MOVWFOVERPRO; THIS IS THE NUMBER OF OVERPROGRAMMING
CALL TWC ; CALL A DELAY FOR AMP TO SETTLE

CALL TWC
CALL TWC
CALL TWC
CALL TWC
MODING CALL TESTMOD

CALL PROGRAM
MOVLW 0x60
MOVWF COUNT1
BIGDLY CALL TWC ; CALL A DELAY TO ALLOW THE AMP TO SETTLE
DECFSZ COUNT1,f
GOTO BIGDLY
DECFSZ OVERPRO,1 ; DECREMENT THE OVERPROGRAMMING NUMBER

GOTOMODING ; GOTO LOOK FOR THE MODULATION TO STOP
GOTOVERIFY
;***************************************
VERIFY
CALL TESTMOD ; Wait for modulation to stop
;% 167Ti of constant _RAW_DATA
StartWatch ; Wait >~Ttag (for mod to start again)
MOVLW h’00’ ; Delay >~262144Ti

MOVWF DelayReg?H ; |
VerifyD1a ; |
MOVLW h’FF’ ; | delay 1021Ti
MOVWF DelayReg?L ; | |
VerifyD1b ; | |
CLRWDT ; | |
DECFSZ DelayReg?L,f ; | |
GOTO VerifyD1b ; | |
DECFSZ DelayReg?H,f ; |
GOTO VerifyD1a ; |
StopWatch ; |
CLRF BitCtr ; BitCtr=#128

BSF BitCtr,7 ; |
VerifyL1 ; {
;% reftime-1345
CLRF CycleCtr?L
;% reftime-1344
;% reftime-3-10*6-183*7
MOVLW d’10’ ; set NoiseTimeout
MOVWF NoiseTimeout ; |
;% reftime-1-10*6-183*7
;% reftime-1-NTO*6-183*7
MOVLW d’183’ ; set SampTimeout to 80Tcy
MOVWF SampTimeout ; |
;% reftime+1-NTO*6-183*7
;% reftime+1-NTO*6-STO*7
BTFSC _RAW_DATA
GOTO VerS1
NOP
VerS0

DECFSZ NoiseTimeout,f
SKIP
GOTO VerFail
BTFSC _RAW_DATA
GOTO VerS1
VerGot0
VerGot0a
CLRWDT
DECFSZ SampTimeout,f
SKIP
GOTO SampleDone
BTFSS _RAW_DATA
GOTO VerGot0
NOP
VerGot0b
CLRWDT
SKIP
GOTO SampleDone
BTFSS _RAW_DATA
GOTO VerGot0
NOP
VerGotRise
CLRWDT
SKIP
GOTO SampleDone
INCF CycleCtr?L,f
GOTO VerGot1
VerS1
SKIP
GOTO VerFail
BTFSS _RAW_DATA
GOTO VerS0
VerGot1
VerGot1a
CLRWDT
SKIP
GOTO SampleDone
BTFSC _RAW_DATA
GOTO VerGot1
NOP
VerGot1b
CLRWDT
SKIP
GOTO SampleDone
BTFSC _RAW_DATA
GOTO VerGot1
NOP
VerGotFall
CLRWDT
SKIP

GOTO SampleDone
INCF CycleCtr?L,f
GOTO VerGot0
SampleDone
;& STO=0
;% reftime+1-NTO*6
NoiseMargin
;% reftime+1-NTO*6
NOP
NOP
NOP
GOTO NoiseMargin
;% reftime+0-NTO*6
;% NTO=0
;% reftime+0
BTFSC DATAF,7
GOTO Verify1
NOP
Verify0
;% 3 from ref time
; if ‘0’ bit, _DATA_IN cycles 10 times in 80 Tcy
; CycleCtr?L should be 20
MOVF CycleCtr?L,W
ADDLW low(0-d’18’)
BTFSS _CARRY
GOTO INT_Failure
ADDLW low(d’18’-d’22’)
BTFSS _CARRY
GOTO Bit_Verified
GOTO INT_Failure
Verify1
;% 3 from ref time
; if ‘1’ bit, _DATA_IN cycles 8 times in 80Tcy
; CycleCtr?L should be 16
MOVF CycleCtr?L,W
ADDLW low(0-d’14’)
BTFSS _CARRY
GOTO INT_Failure
ADDLW low(d’14’-d’18’)
BTFSS _CARRY
GOTO Bit_Verified
GOTO INT_Failure
Bit_Verified
;% 11 from ref time
BCF _CARRY
BTFSC DATAF,7
BSF _CARRY
RLF DATA0,f
RLF DATA1,f
RLF DATA2,f
RLF DATA3,f
RLF DATA4,f
RLF DATA5,f
RLF DATA6,f
RLF DATA7,f
RLF DATA8,f
RLF DATA9,f
RLF DATAA,f
RLF DATAB,f

RLF DATAC,f
RLF DATAD,f
RLF DATAE,f
RLF DATAF,f
;% 30 from ref time

MOVWF DelayReg?L ; |
NOP ; |
VerDelay ; |
CLRWDT ; |
DECFSZ DelayReg?L,f ; |
GOTO VerDelay ; |
;% 700 from ref time

;% (ref times 128*16Ti apart = 2048Ti apart)
;% -1348 from ref time
GOTO VerifyL1 ; } until (BitCtr==#0)
;***************************************
INT_Success
CALL RS232On
MOVLW ‘y’
CALL RS232TxW
GOTO BigLoop1
VerFail
INT_Failure
CALL RS232On
MOVLW ‘n’
CALL RS232TxW
GOTO BigLoop1
INT_END ; RS-232 TIMEOUT

NOP
GOTO BigLoop1
INT_ErrorN
CALL RS232On
MOVLW ‘N’
CALL RS232TxW
GOTO BigLoop1
DELAYMOVLW0x05
MOVWFDELAY1
HOLD4DECFSZDELAY1,1
GOTOHOLD4
RETLW0
; TWC lasts
TWC MOVLW0xB0 ; WRITE CYCLE TIMER SUBROUTINE
MOVWFDELAY1
HOLD1MOVLW0x02
MOVWFDELAY2
HOLD2DECFSZDELAY2,1
GOTOHOLD2
DECFSZDELAY1,1
GOTOHOLD1
RETLW0
BUFFERMOVLW0x58
MOVWFDELAY1

HOLD3DECFSZDELAY1,1
GOTOHOLD3
NOP
NOP
RETLW0
TESTMOD; THIS ROUTINE TESTS THE RAW DATA LINE TO SEE IF THE
; PART IS MODULATING OR NOT
; This routine returns when _RAW_DATA stays constant for some time
; some time = 7Ti+32*5Ti = 167Ti = 10.4375Tcy
MOVLW d’7’ ; CycleCtr2 > 13*128=1664

MOVWF CycleCtr2?H ; |
MOVLW d’164’ ; |
MOVWF CycleCtr2?L ; |
TestModLo
DECFSZ CycleCtr2?L,f
SKIP
DECFSZ CycleCtr2?H,f
SKIP
GOTO INT_Failure
MOVLW 0x20
MOVWF COUNT1
BTFSS _RAW_DATA
GOTO TestModHi
TestModLoLoop
BTFSS _RAW_DATA
GOTO TestModHi
DECFSZ COUNT1,1
GOTO TestModLoLoop
RETLW 0
TestModHi
MOVLW 0x20
MOVWF COUNT1
BTFSC _RAW_DATA
GOTO TestModLo
TestModHiLoop
BTFSC _RAW_DATA
GOTO TestModLo
DECFSZ COUNT1,1
GOTO TestModHiLoop
;END TEST FOR NO MODULATION
RETLW 0
PROGRAM BCFPORTB,3; CLEAR THE HIGH VOLTAGE
MOVLW0x07; MOVW 7 HEX INTO W

MOVWFBIT ; MOVE THIS INTO THE BIT COUNTER
WRITEFBTFSSDATAF,7 ; TEST MOST BYTE
BSF PORTB,3 ; SET THE HIGH VOLTAGE
CALLTWC ; CALL THE WRITE CYCLE TIMER
BCF STATUS,C ; CLEAR THE CARRY BIT
BTFSC DATAF,7 ; TEST THE MSB
BSF STATUS,C ; SET THE CARRY BIT
RLF DATAF,1 ; ROTATE DATAF
BCFPORTB,3; CLEAR THE HIGH VOLTAGE
CALL BUFFER; CALL THE BUFFER TIMER
DECF BIT,1; DECREMENT BIT, SKIP IF ZERO
BTFSS BIT,7 ; SKIP IF SET
GOTOWRITEF; GOTO WRITEF IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP

NOP
NOP
NOP

WRITEEBTFSSDATAE,7 ; TEST MOST BYTE
BTFSC DATAE,7 ; TEST THE MSB
RLF DATAE,1 ; ROTATE DATAF
GOTOWRITEE; GOTO WRITEE IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP
NOP
NOP
NOP
MOVLW0x07 ; MOVW 7 HEX INTO W

WRITEDBTFSSDATAD,7 ; TEST MOST BYTE
BTFSC DATAD,7 ; TEST THE MSB
RLF DATAD,1 ; ROTATE DATAF
GOTOWRITED; GOTO WRITEF IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP
NOP
NOP
NOP

WRITECBTFSSDATAC,7 ; TEST MOST BYTE
BTFSC DATAC,7 ; TEST THE MSB
RLF DATAC,1 ; ROTATE DATAF
GOTOWRITEC; GOTO WRITEC IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP

NOP
NOP
NOP

WRITEBBTFSSDATAB,7 ; TEST MOST BYTE
BTFSC DATAB,7 ; TEST THE MSB
RLF DATAB,1 ; ROTATE DATAF
GOTOWRITEB; GOTO WRITEB IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP
NOP
NOP
NOP

WRITEABTFSSDATAA,7 ; TEST MOST BYTE
BTFSC DATAA,7 ; TEST THE MSB
RLF DATAA,1 ; ROTATE DATAF
GOTOWRITEA; GOTO WRITEA IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP
NOP
NOP
NOP

WRITE9BTFSSDATA9,7 ; TEST MOST BYTE
BTFSC DATA9,7 ; TEST THE MSB
RLF DATA9,1 ; ROTATE DATAF
GOTOWRITE9; GOTO WRITE9 IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP

NOP
NOP
NOP

NOP
NOP
NOP
NOP
NOP
NOP
NOP

NOP
NOP
NOP
NOP
NOP
NOP
NOP

NOP
NOP
NOP
NOP

NOP
NOP
NOP

NOP
NOP
NOP
NOP
NOP
NOP
NOP

NOP
NOP
NOP
NOP
NOP
NOP
NOP

NOP
NOP
NOP
NOP

NOP
NOP
NOP

NOP
NOP
NOP
NOP
NOP
NOP
NOP

GOTOWRITE1; GOTO WRITEF IF BIT IS NOT EQUAL TO ZERO
NOP
NOP
NOP
NOP
NOP
NOP
NOP

RETLW 0
Delay12
NOP

Delay11
GOTO Delay09
Delay09
GOTO Delay07
RS232On ;[1] Initialise RS-232

BCF _TMR2ON ; | Turn coil off
CALL RS232StopBit ; | Transmit stop bits
CALL RS232StopBit ; | |
RETLW h’00’ ; | return
RS232WaitForever ;[1] ~9600 baud

BigWaitL1 ; | {
CLRWDT ;!|
BTFSS _RS232IN ; | if (_RS232IN==#0)
GOTO RS232RxL1Done ; | { goto RS232RxL1Done }
NOP ;!|
GOTO BigWaitL1 ; | } until (0)
RS232Rx ;[1] ~9600 baud

MOVLW d’16’ ; | Set timeout of ~2.9s
MOVWF TimerHi ; | |
CLRF TimerMid ; | |
CLRF TimerLo ; | |
RS232RxL1 ; | {
CLRWDT ;!|
BTFSS _RS232IN ; | if (_RS232IN==#0)
GOTO RS232RxL1Done ; | { goto RS232RxL1Done }
DECFSZ TimerLo,f ; | }
GOTO RS232RxL1 ; | |
DECFSZ TimerMid,f ; | |
DECFSZ TimerHi,f ; | |
BSF _CARRY ; | return with error
RETLW h’00’ ; | |
; |
RS232RxL1Done ; |% 3 to (+6, +8, +10) - say 10us
; |% 10-104=-94
MOVLW d’90’ ;!|
CALL DelayW12 ;!|% 9
BSF BitCtr,3 ; | |
RS232RxLoop ; | {% 11
MOVLW d’181’ ;!|
CALL DelayW12 ;!| % 205
CLRF BO3 ; | BO3,1=_RS232IN
BTFSC _RS232IN ; | |
INCF BO3,f ; | |% 208
BTFSC _RS232IN ; | |% 1
INCF BO3,f ; | |
BTFSC _RS232IN ; | |
INCF BO3,f ; | |% 4
RRF RxByte,f ; | RR RxByte
BCF RxByte,7 ; | RxByte,7=BO3,1
BTFSC BO3,1 ; | |
BSF RxByte,7 ; | |% 8

GOTO RS232RxLoop ; | } until (BitCtr==#0)
BCF _CARRY ; | return with no error
RETLW h’00’ ; | |
RS232TxW ;[1] Transmit W on RS232 at ~9600 baud

CALL RS232StopBit ; | stop bit
BSF BitCtr,3 ; | |
BCF _RS232OUT ; | Start bit
MOVLW d’191’ ; | |
CALL DelayW12 ; | |
RS232TxLoop ; | {% 205
BTFSS TxByte,0 ; | _RS232OUT=TxByte,0
BCF _RS232OUT ; | |% 207
BTFSC TxByte,0 ; | |% 208
BSF _RS232OUT ; | |% 1
RRF TxByte,f ; | RR TxByte
MOVLW d’187’ ;!|
CALL DelayW12 ;!| % 202
GOTO RS232TxLoop ; | } until (BitCtr==#0)
GOTO RS232TxJ1 ; |
RS232TxJ1 ; |
NOP ; |% 207
BSF _RS232OUT ; | Stop bit
RETLW h’00’ ; | return
end

NOTES:

NOTES:

NOTES:

NOTES:

Note the following details of the code protection feature on PICmicro® MCUs.
• The PICmicro family meets the specifications contained in the Microchip Data Sheet.
• Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today,
when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowl-
edge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet.
The person doing so may be engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable”.
• Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of
our product.
If you have any further questions about this matter, please contact the local sales office nearest to you.
Information contained in this publication regarding device Trademarks

applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to The Microchip name and logo, the Microchip logo, FilterLab,
ensure that your application meets with your specifications. KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
No representation or warranty is given and no liability is PICSTART, PRO MATE, SEEVAL and The Embedded Control
assumed by Microchip Technology Incorporated with respect Solutions Company are registered trademarks of Microchip Tech-
to the accuracy or use of such information, or infringement of nology Incorporated in the U.S.A. and other countries.
patents or other intellectual property rights arising from such
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
use or otherwise. Use of Microchip’s products as critical com-
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
ponents in life support systems is not authorized except with
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
express written approval by Microchip. No licenses are con-
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
veyed, implicitly or otherwise, under any intellectual property
and Total Endurance are trademarks of Microchip Technology
rights.
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark

of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their

respective companies.
© 2002, Microchip Technology Incorporated, Printed in the

U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system

certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
 2002 Microchip Technology Inc.

M
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Tel: 248-538-2250 Fax: 248-538-2260 Co., Ltd. Ballerup DK-2750 Denmark
Kokomo Room 701, Bldg. B Tel: 45 4420 9895 Fax: 45 4420 9910
2767 S. Albright Road Far East International Plaza France
Kokomo, Indiana 46902 No. 317 Xian Xia Road Microchip Technology SARL
Tel: 765-864-8360 Fax: 765-864-8387 Shanghai, 200051 Parc d’Activite du Moulin de Massy
Los Angeles Tel: 86-21-6275-5700 Fax: 86-21-6275-5060 43 Rue du Saule Trapu
18201 Von Karman, Suite 1090 China - Shenzhen Batiment A - ler Etage
Irvine, CA 92612 91300 Massy, France
Tel: 949-263-1888 Fax: 949-263-1338 Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Co., Ltd., Shenzhen Liaison Office
New York Rm. 1315, 13/F, Shenzhen Kerry Centre, Germany
150 Motor Parkway, Suite 202 Renminnan Lu Microchip Technology GmbH
Hauppauge, NY 11788 Shenzhen 518001, China Gustav-Heinemann Ring 125
Tel: 631-273-5305 Fax: 631-273-5335 Tel: 86-755-2350361 Fax: 86-755-2366086 D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
San Jose Hong Kong
Microchip Technology Inc. Microchip Technology Hongkong Ltd. Italy
2107 North First Street, Suite 590 Unit 901-6, Tower 2, Metroplaza Microchip Technology SRL
San Jose, CA 95131 223 Hing Fong Road Centro Direzionale Colleoni
Tel: 408-436-7950 Fax: 408-436-7955 Kwai Fong, N.T., Hong Kong Palazzo Taurus 1 V. Le Colleoni 1
Tel: 852-2401-1200 Fax: 852-2401-3431 20041 Agrate Brianza
Toronto
Milan, Italy
6285 Northam Drive, Suite 108 India Tel: 39-039-65791-1 Fax: 39-039-6899883
Mississauga, Ontario L4V 1X5, Canada Microchip Technology Inc.
Tel: 905-673-0699 Fax: 905-673-6509 India Liaison Office United Kingdom
Divyasree Chambers Arizona Microchip Technology Ltd.
1 Floor, Wing A (A3/A4) 505 Eskdale Road
No. 11, O’Shaugnessey Road Winnersh Triangle
Bangalore, 560 025, India Wokingham
Tel: 91-80-2290061 Fax: 91-80-2290062 Berkshire, England RG41 5TU
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microID™ 125 kHz RFID

 1998 Microchip Technology Inc. December 1998 /DS51115E

December 1998 /DS51115E  1998 Microchip Technology Inc.

“All rights reserved. Copyright © 1998, Microchip Technology Trademarks

 1998 Microchip Technology Inc. December 1998 /DS51115E

December 1998 /DS51115E  1998 Microchip Technology Inc.

MCRF200 DATA SHEET

 1998 Microchip Technology Inc. DS51115E-page v

TB023 CONTACT PROGRAMMING SUPPORT

DS51115E-page vi  1998 Microchip Technology Inc.

FSK READER REFERENCE DESIGN

PSK READER REFERENCE DESIGN

 1998 Microchip Technology Inc. DS51115E-page vii

FSK ANTICOLLISION READER REFERENCE DESIGN

USING THE microID™ PROGRAMMER

WORLDWIDE SALES AND SERVICE

DS51115E-page viii  1998 Microchip Technology Inc.

Author: Pete Sorrells

 1998 Microchip Technology Inc. DS00680A-page 1

DS00680A-page 2  1998 Microchip Technology Inc.

FIGURE 2: VARIOUS DATA CODING WAVEFORMS

Data Digital Data

Bit Rate Clock Signal

Non-Return to Zero - Level

Biphase - Level (Split Phase)

Differential Differential Biphase - Space

 1998 Microchip Technology Inc. DS00680A-page 3

FIGURE 3: FSK MODULATED SIGNAL, FC/8 = 0, FC/10 = 1

8 cycles = 0 8 cycles = 0 10 cycles = 1 10 cycles = 1 8 cycles = 0

FIGURE 4: PSK MODULATED SIGNAL

Phase Phase Phase Phase

DS00680A-page 4  1998 Microchip Technology Inc.

 1998 Microchip Technology Inc. DS00680A-page 5

DS00680A-page 6  1998 Microchip Technology Inc.

 1998 Microchip Technology Inc. DS21219D-page 7

Storage temperature ....................................- 65°C to +150°C NC No connection, test pad

TABLE 1-2: AC AND DC CHARACTERISTICS

Parameter Symbol Min. Typ. Max. Units Conditions

Clock frequency FCLK 100 — 150 kHz

Contactless programming time TWC — 2 — s 128-bit array

Data retention 200 — — Years 25°C

Coil current (Dynamic) ICD — 50 µA

Operating current IDD — 5 µA VCC = 2V

Turn-on-voltage (Dynamic) for VAVB 10 — — VPP

Input Capacitance CIN — 2 — pF Between VA and VB

FIGURE 1-1: DIE PLOT TABLE 1-3 RFID PAD COORDINATES

Pad Pad Pad Pad Pad

VB 90.0 90.0 -408.60 -734.17

Note 1: All coordinates are referenced from the

DS21219D-page 8  1998 Microchip Technology Inc.

 1998 Microchip Technology Inc. DS21219D-page 9

DS21219D-page 10  1998 Microchip Technology Inc.

 1998 Microchip Technology Inc. DS21219D-page 11

4.1 Native Mode

4.2 Read Mode

FIGURE 4-1: TYPICAL APPLICATION CIRCUIT

IAC 740 µH 390 pF Input capacitance: 2 pF

DS21219D-page 12  1998 Microchip Technology Inc.