Combinational Logic Circuit Assignment
Combinational Logic Circuit Assignment
Combinational Logic Circuit Assignment
Digital
Electronics
Assignment
Session- 2009-10
Combinational Logic circuit
The term ”combinational” comes to us from mathematics. In
mathematics a combination is an
Most games work this way, if your olleddice one at a time and get a
2 followed by a 3 it is the same as if you had rolled a 3 followed by
a 2. With combinational logic, the circuit produces the same output
regardless of the order the inputs are changed.
There are circuits which depend on the when the inputs change,
these circuits are called sequential logic.
So NAND gates do not care about the order of the inputs , and we
will find the same true of fall the other gates covered up to this
point (AND,XOR,OR,NOR,XNOR,andNOT).
Adder or Summer
Inputs Outputs
A B C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
1 1 0 1
The half adder is an example of a simple, functional digital circuit built from
two lClearly a half adder is the first step, the right most and first
addition, in the long addition. The truth table for the addition show
Half Adder
A B X
0 0 0
0 1 1
1 0 1
1 1 0
Table 1: The truth table of a Half adder.
In ladder logic:
Full Adder
A full adder is a logical circuit that performs an addition operation on
three one-bit binary numbers often written as A, B, and Cin. The full
adder produces a two-bit output sum typically represented with the
signals Cout and S where . The full adder's truth
table is:
Inputs Outputs
A B Ci Co S
0 0 0 0 0
1 0 0 0 1
0 1 0 0 1
1 1 0 1 0
0 0 1 0 1
1 0 1 1 0
0 1 1 1 0
1 1 1 1 1
In ladder logic:
Example full adder circuit diagram
Inputs: {A, B, Cin} → Outputs: {S, Cout}
Example full adder circuit diagram using only NAND and XOR gates
Inputs: {A, B, Cin} → Outputs: {S, Cout}
In this implementation, the final OR gate before the carry-out output
may be replaced by an XOR gate without altering the resulting logic.
Using only two types of gates is convenient if the circuit is being
implemented using simple IC chips which contain only one gate type
per chip.
A Full Adder is a three way addition, i.e it is the addition of the carry
to the other two digits. But a carry result is also required. So firstly for
the carry the truth table is shown in Table 2.
Carry
A B D Carry
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
Table 2: The truth table of the carry operation.
Or
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Table 3: The truth of the Addition operation.
Or
Subtractor
In electronics, a subtractor can be designed using the same approach
as that of an adder. The binary subtraction process is summarized
below. As with an adder, in the general case of calculations on multi-
bit numbers, three bits are involved in performing the subtraction for
each bit of the difference: the minuend (Xi), subtrahend (Yi), and a
borrow in from the previous (less significant) bit order position (Bi).
The outputs are the difference bit (Di) and borrow bit Bi + 1.
K-map Bi(1,2,3,7)
Truth table
XYDB
000 0
011 1
101 0
110 0
From the above table one can draw the Karnaugh map for
"difference" and "borrow".
Truth table
XYZDB
0000 0
0011 1
0101 1
0110 1
1001 0
1010 0
1100 0
1111 1