ARM Based Development Syllabus
ARM Based Development Syllabus
ARM Based Development Syllabus
Title
NPTEL
http://nptel.ac.in
Electronics &
Communication
Engineering
Coordinators:
S.Chandramouleeswaran
Department of Electronics and
communication
EngineeringIndependent
Embedded SW Trainer
No
Protection
Memory Technologies, Need for memory
Hierarchy, Hierarchical Memory Organization,
Virtual Memory. Cache Memory, Mapping
Functions. Cache Design, Unified or split cache,
multiple level of caches, ARM cache features,
coprocessor 15 for system control. Processes,
Memory Map, Protected Systems, ARM systems
with MPU, memory Protection Unit (MPU). Physical
Vs Virtual Memory, Paging, Segmentation. MMU
Advantage, virtual memory translation, Multitasking
with MMU, MMU organization, Tightly coupled
Memory (TCM).
References:
1. Instructor reference material
2. ARM System Developers Guide, Designing and
Optimizing System Software, by Andrew N. SLOSS,
Dominic SYMES and Chris WRIGHT, ELSEVIER, 3004
3. ARM System-on-Chip Architecture, Second Edition, by
Steve Furber, PEARSON, 2013
4. Operating Systems, 5th Edition, By William Stallings
5. Manuals and Technical Documents from the ARM Inc,
web site.
A joint venture by IISc and IITs, funded by MHRD, Govt of India
http://nptel.ac.in