INSTITUTE OF AERONAUTICAL ENGINEERING

Dundigal, Hyderabad - 500 043

ELECTRONICS AND COMMUNICATION ENGINEERING

QUESTION BANK
Course Name

: IC Applications

Course Code

: A50425

Class

: III - B. Tech

Branch

: ECE & EEE

Year

: 2014 2015

Course Coordinator

: Naresh.B

Course Faculty

: Naresh B & Ajitha

OBJECTIVES
To meet the challenge of ensuring excellence in engineering education, the issue of quality needs to be addressed,
debated and taken forward in a systematic manner. Accreditation is the principal means of quality assurance in
higher education. The major emphasis of accreditation process is to measure the outcomes of the program that is
being accredited.
In line with this, Faculty of Institute of Aeronautical Engineering, Hyderabad has taken a lead in incorporating
philosophy of outcome based education in the process of problem solving and career development. So, all
students of the institute should understand the depth and approach of course to be taught through this question
bank, which will enhance learners learning process.
1. Group - A (Short Answer Questions)
S. No

Blooms Taxonomy Course

Level
Outcome

QUESTION
UNIT-I

OPERATIONAL AMPLIFIER
1
2
3
4
5
6
7
8

Mention the advantages of integrated circuits.

write down the various processes used to fabricate ICs using silicon planar
technology.
What is the purpose of oxidation?
Why aluminum is preferred for metallization?
Define an operational amplifier.
Mention the characteristics of an ideal op-amp.
Define input offset voltage
What are the applications of current sources?

1|Page

Remember

1,2

Understand

1,2

Understand

Remember

1,2

Analyze

1,2

Remember

1,2

Analyze

Remember

S. No
9
10
11
12
13
14
15
16
17
18

QUESTION
Define sensitivity. Mention the advantages of Wilson current source
What is a current mirror? Explain the working of a wilder current source
What is slew rate? Discuss the methods of improving slew rate.
What is an Active load? Explain the CE amplifier with active load
Explain pole zero compensation and frequency compensation in op-amp.
Define band gap reference? Explain in detail about the reference circuit
Briefly explain the method of using constant current bias for increasing CMRR
in differential?
Explain the operation of a Schmitt trigger circuit
Explain the working of full precision rectifier?
Define ripple rejection with respect to voltage regulators

Blooms Taxonomy Course

Level
Outcome
1,2
Understand
Remember
Remember
Remember

1
1
1

Analyze

1,2

Understand

1,2

Understand

1,2

Analyze

1,2

Analyze

Analyze

UNIT-II

OP-AMP, IC -555 & IC 565 APPLICATIONS

1

Why active filters are preferred?

Remember

What is meant by cut off frequency of a high pass filter and how it is found
out in a first order high pass filter

Understand

Remember

Remember

Remember

Remember

3
4
5
6
7
8
9
10
11

List the applications of 555 timer in monostable mode of operation

Define 555 IC?
List the basic blocks of IC 555 timer?
Define VCO.
What does u mean by PLL?

Understand

List the applications of 565 PLL

Define lock range.
Define capture range
Define pull-in time
UNIT-III
DATA CONVERTERS

2|Page

Apply

Understand

Apply

Understand

S. No
1.
2.
3.
4.
5.
6.
7.
8
9.
10.

Blooms Taxonomy Course

Level
Outcome
Remember
3

QUESTION
List the broad classification of ADCs
List out the direct type ADCs

Understand

List out some integrating type converters

Remember

What is integrating type converter

Understand

Explain in brief the principle of operation of successive Approximation ADC

Analyze

What are the main advantages of integrating type ADCs

Understand

What is the main drawback of a dual-slop ADC?

Remember

Define conversion time.

Remember

Define accuracy of converter

Remember

Explain in brief stability of a converter

Remember

UNIT-IV

DIGITAL INTERAGETED CIRCUITS

1.

Explain how PROM, EPROM and EEPROM technologies differ from each
other.

Remember

2.

Design CMOS transistor circuit for 2-input AND gate.

Understand

3.

Explain sourcing current of TTL output?

Remember

4.

Which of the parameters decide the fan-out and how?

Understand

5.

Explain sinking current of TTL output?

Understand

6.

Explain the term Voltage levels for logic 1 & logic 0

with reference to TTL gate?

Understand

7.

Explain the DC Noise margin with reference to TTL gate?

Understand

8.

Explain Low-state unit load with reference to TTL gate?

Remember

9.

Explain High-state fan-out with reference to TTL gate?

Remember

10.

Explain the use of Package?

Remember

Understand
Understand
Understand

5
5
5

UNIT-V

SEQUNTIAL LOGIC ICS AND MEMORIES

1.
2.
3.

Define static RAM

Define dynamic RAM
Classify types of ROMs

3|Page

S. No
4.
5.
6.
7.
8.
9.
10.

QUESTION
Applications of ROMS
What is the difference between latch& Flip-Flop, Explain with logic diagram.
Explain any one application of SR latch.
What is race around condition? how it is avoided?
How synchronous counters differ from asynchronous counters?
List counter applications.
State various applications of counters.

Blooms Taxonomy
Level
Remember
Remember
Understand
Remember
Understand
Understand
Remember

Course
Outcome
5
5
5
5
5
5
5

2. Group - II (Long Answer Questions)

Progra
m
Taxonomy Outcom
Level
e
Blooms

S.
No

Question
UNIT-I

OPERATIONAL AMPLIFIER
1.

With circuit diagram discuss the following applications of op-amp(Dec-03)

Evaluate

1,2

(i) Voltage to current converter

(ii)Precision rectifier
2.

Explain the operation of a Schmitt trigger circuit

Evaluate

1,2

3.

Explain the working of full precision rectifier

Evaluate

1,2

4.

Explain the internal structure of voltage regulator IC 723. Also draw a low voltage

Analyze

1,2

Evaluate

1,2

Regulator circuit using IC 723andexplain its operation.

5.

Explain the following terms in an OP-AMP. Bias current

(1) Thermal drift
(2) Input offset voltage and current
(3) Thermal drift

6.

Explain the frequency compensation techniques of OP-AMP

Evaluate

1,2

7.

Draw the circuit of a symmetrical emitter coupled differential amplifier and derive for
CMRR.
Write a technical note on frequency response characteristics of differential amplifier.
State the importance of frequency compensation

Evaluate

1,2

Analyze

1,2

9.

What is t instrumentation amplifier? What are the required parameters of an

instrumentation amplifier? Explain the working of instrumentation amplifier with neat
circuit diagram

Understa
nd

1,2

Explain various DC and AC characteristics of an op.amp. Distinguish between ideal and

Rememb

1,2

8.

4|Page

Progra
m
Taxonomy Outcom
Level
e
er
Blooms

S.
No

Question
practical characteristics

11
.

With circuit and waveforms explain the application of OPAMP as

Evaluate

1,2

(1) Integrator
(2) Voltage series Feedback Compensation
UNIT-II

OP-AMP, IC -555 & IC 565 APPLICATIONS

1.

Design a second order low pass filter

Evaluate

2.

Draw the circuit of a 1st order Butterworth low pass filter and derive
its transfer function.

Analyze

3.

Explain the functional block diagram of 555timer

Evaluate

4.

Explain working of PLL using suppropriate block diagram and explain

any one application of the same

Evaluate

5.

Draw the block diagram of an Astable multivibrator using 555timer

and derive an expression for its frequency of oscillation

Evaluate

4,5

6.

Draw the block diagram of monostable multivibrator using 555timer

and derive an expression for its frequency of oscillation

Evaluate

4,5

7.

write short notes on i) capture range ii) Lock in range iii) Pull in time

Analyze

4,5

8.

Explain about power amplifier and video amplifier

Analyze

4,5

9.

Draw the circuit of a 1st order Butterworth high pass filter and derive
its transfer function
Explain Band pass ,band reject and all pass filters

Analyze

4,5

Analyze

4,5

10.

UNIT-III
DATA CONVERTERS
1.

Explain the working of a Weighted resistor D/A converter

Evaluate

2.

Explain successive approximation A/D converter

3.

Explain the working of a dual slope A/D converter

4.

Explain the working of a Voltage to Time converter

5.

Explain the working of a counter type A/D converter and state

Understa
nd
Rememb
er
Understa
nd
Understa
nd

5|Page

8
8
8

S.
No

Progra
m
Taxonomy Outcom
Level
e
Blooms

Question
its important feature

Understa
nd
Analyze

With neat diagram, explain the working principle of R-2R

ladder type DAC

Analyze

7,8

Explain the following application of operational amplifier.

Understa
nd

7,8

Understa
nd

7,8

Apply

10

6.

Explain the working of a Voltage to Frequency converter

7.

Explain the working of a Voltage to Frequency converter

8.

9.

(1) peak detector

7,8

(2) Functions of flash type A/D converter.

10.

With neat diagram,explain the workingprinciple of Weighted

resistor DAC
UNIT-IV

1.

DIGITAL INTERAGETED CIRCUITS

(a) Explain the following terms with reference to CMOS
logic.
i. Logic Levels
ii. Noise margin
iii. Power supply rails
iv. Propagation delay
(b) What is the difference between transmission time and
propagation delay? Explain these two parameters with reference to CMOS logic.

2.

(a) Draw the circuit diagram of two-input 10K ECL OR gate and
explain its
operation.
(b) List out different categories of characteristics in a TTL data
sheet. Discuss
electrical and switching characteristics of 74LS00.

Analyze

10

3.

(a) Discuss the steps in VHDL design flow.

(b) Explain the difference in program structure of VHDL and any
other procedural
language. Give an example

Understa
nd

10

4.

(a) Design CMOS transistor circuit for 2-input AND gate. Explain
the circuit
with the help of function table?
(b) Draw the resistive model of a CMOS inverter circuit and
explain its behavior

Rememb
er

10

6|Page

Progra
m
Taxonomy Outcom
Level
e
Blooms

S.
No

Question
for LOW and HIGH outputs.

5.

(a) Design a three input NAND gate using diode logic and a
transistor inverter?
Analyze the circuit with the help of transfer characteristics.
(b) Explain sinking current and sourcing current of TTL output?
Which of the
parameters decide the fan-out and how?

Evaluate

10

6.

(a) Realize the logic function performed by 74381 with ROM.

(b) How many ROM bits are required to build a 16-bit
adder/subtractor with
mode control, carry input, carry output and twos complement
overflow output. Show the block schematic with all inputs and outputs.

Evaluate

10

7.

Explain how to estimate sinking current for low output and

sourcing current
for high output of CMOS gate.

Apply

10

8.

Explain the necessity of two-dimensional decoding mechanism in

memories.

Apply

10

9.

With the help of timing waveforms, explain read and write

operations of
SRAM.

Rememb
er

10

10.

Draw MOS transistor memory cell in ROM and explain the

operation.

Apply

10

How many ROM bits are required to build a 16-bit adder/subtractor with
mode control, carry input, carry output and twos complement overflow out-put. Show
the block schematic with all inputs and outputs.
Draw the basic cell structure of Dynamic RAM. What is the necessity of refresh cycle?
Explain the timing requirements of refresh operation.

Understa
nd

Analyze

3.

Discuss in detail ROM access mechanism with the help of timing waveforms.

Analyze

4.

Draw the logic diagram of 74163 binary counter and explain its operation.

10

5.

Design a modulo-100 counter using two 74163 binary counters?

Understa
nd
Apply

UNIT-V

SEQUNTIAL LOGIC ICS AND MEMORIES

1.

2.

7|Page

10

6.

Progra
m
Taxonomy Outcom
Level
e
Apply
10
Blooms

S.
No

Question

Design a Modulo-12 ripple counter using 7474?

7.
8.

Discuss how PROM,EPROM, EEPROM technologies differ from each other?

Dierentiate between ripple counter and synchronous counter? Design a 4-bit counter
in both modes and estimate the propagation delay.

Analyze
Rememb
er

9.

Design a modulo-88 counter using 74X163 Ics.

Understa
nd

10
10

3. Group - III (Analytical Questions)

S.No

Blooms Taxonomy Program

Level
Outcome

QUESTIONS
UNIT-I

1.

Evaluate

1,2

analyze

1,2

Design a differentiator to differentiate an input signal that varies in frequency

from 10 Hz to
about 1 KHz. If a sine wave of 1V peak at 1000 Hz is applied to this differentiator
draw the output waveforms
Determine the output voltage of the differential amplifier having input voltages
V1=1mV and V2=2 mV. The amplifier has a differential gain of 5000 and CMRR
1000

Remember

1,2

Remember

1,2

5.

Draw the output waveform for a sine wave of1vpeak at 100Hzapplied to the
differentiator.

Remember

1,2

6.

Design an op-amp differentiator that will differentiate an Input signal with fmax
= 100Hz

explain

1,2

7.

Determine the input impedance of 741 operational amplifier employed as

voltage follower having Av=50,000 and Ri= 0.3MEGA OHM

Remember

1,2

Evaluate

3,4

2.
3.

4.

An op-amp with a slew rate = 0.5V/S is used as an inverting amplifier to obtain

a gain of 100. The voltage gain Vs frequency characteristic of the amplifier is flat
up to 10 KHz.
Determine
i. The maximum peak-to-peak input signal that can be applied without any
distortion to the output
ii. The maximum frequency of the input signal to obtain a sine wave output of
2V peak.
Design a Schmitt trigger for UTP =0.5v and LTP=-0.5V

UNIT-II
1.

Design an Astable Multivibrator using 555 Timer to produce 1Khz square wave
form for duty cycle=0.50

8|Page

S.No
2.

Blooms Taxonomy Program

Level
Outcome
Design and draw the wave forms of 1KHZ square waveform generator using555 Evaluate
3,4
Timer for duty cycle i)D=25% ii) D=50%
QUESTIONS

3.

Design a 555 based square wave generator to produce an asymmetrical

square wave of 2 KHz. If Vcc=12V, draw the voltage curve across the
timing capacitor and output waveform.

Analyze

3,4

4.

Draw the schematic diagram of an all pass filter and determine the phase shift
between the input and output at f = 2kHz

Analyze

3,4

Apply

7,8

Find the voltage at all nodes 0,1,2,. And at the output of a 5-bit R-2R
ladder DAC. The least Significant bit is 1 and all other bits are equal to 0. Assume
VR = -10V and R=10KO.
A dual slope ADC uses an 18 bit counter with a 5MHz clock. The maximum
integrator input voltage in +12V and maximum integrator output voltage at 2n
count is -10V. If R=100KO, find the size of the capacitor to be used for
integrator
Calculate basic step of 9 bit DAC is 10.3 mV. If 000000000 represents 0V, what
output produced if the input is 101101111
Calculate the values of the LSB,MSB and full scale output for an 8 bit DAC for the
0 to 10V range
An ADC converter has a binary input of 0010 and an analog output of 20mv.
What is the resolution

Remember

7,8

Understand

7,8

Apply

7,8

Apply

7,8

Apply

7,8

How many levels are possible in a two bit DAC what is its resolution if the
output range is 0 to 3V
Find V(1)=5V what is the maximum output voltage

Apply

Remember

Calculate what is the conversion time of a 10 bit successive approximation A/D

converter if its 6.85V
A dual slope uses a 16 bit counter and a 4 MHz clock rate. The maximum input
voltage is +10V. The maximum integrator output voltage should be -8V when
the counter has cycled through 2n counts. The capacitor used in the integrator
is 0.1f. Find the value of the resistor R of the integrator

Apply

Apply

Analyze

7,8

Remember

7,8

1.

2.

3.

4.
5.
6.
7.
8.
9.
10

1.

2.

UNIT III
DATA CONVERTERS
A dual slope ADC uses a16-bitcounteranda 4MHzclock rate. The maximum input
voltage is+10v. The maximum integrator output voltage should be-8v when the
counter has cycled through 2n counts. The capacitor used in the integrator is 0.1
F Find the value of the resistor R of the integrator.

UNIT-IV
DIGITAL INTERAGETED CIRCUITS
Analyze the fall time of CMOS inverter output with RL = 100, VL = 2.5V and
CL=10PF. Assume VL as stable state voltage.
Design the logic circuit and write a data-flow style VHDL program for the
following function .F (R) = A,B,C,D (1, 4, 5, 7, 9, 13, 15)

9|Page

Blooms Taxonomy Program

Level
Outcome
Analyze
7,8

S.No

QUESTIONS

3.

A simple floating-point encoder converts 16-bit fixed-point data using four high
order bits beginning with MSB. Design the logic circuit and write VHDL data-flow
program.

4.

Design a 4-bit binary synchronous counter using 7474. Write VHDL program for
this logic. Using data flow style

Understand

7,8

5.

Draw the logic diagram of 74163 binary counter and explain its operation.

Remember

7,8

6.

Design a modulo-100 counter using two 74163 binary counters?

Understand

7,8

7.

Analyze

7,8

Apply

9,10

2.

A single pull-up resistor to +5V is used to provide a constant-1 logic source

to 15 different 74LS00 inputs. What is the maximum value of this resistor?
How much high state DC noise margin can be provided in this case?
UNIT-V
SEQUNTIAL LOGIC ICS AND MEMORIES
Determine the ROM size needed to realize the logic function performed by
74153 and 74139.
Realize the logic function performed by 74381 with ROM.

Evaluate

3.

Explain the internal structure of 64K1 DRAM with the help of timing diagrams.

Apply

4.

Explain the necessity of two-dimensional decoding mechanism in memories.

Draw MOS transistor memory cell in ROM and explain the operation.

Apply

1.

Prepared By: B.Naresh

10 | P a g e