Network Design Consideration For Distributed Control Systems
Network Design Consideration For Distributed Control Systems
Network Design Consideration For Distributed Control Systems
2, MARCH 2002
297
AbstractThis paper discusses the impact of network architecture on control performance in a class of distributed control systems called networked control systems (NCSs) and provides design
considerations related to control quality of performance as well as
network quality of service. The integrated network-control system
changes the characteristics of time delays between application devices. This study first identifies several key components of the time
delay through an analysis of network protocols and control dynamics. The analysis of network and control parameters is used to
determine an acceptable working range of sampling periods in an
NCS. A network-control simulator and an experimental networked
machine tool have been developed to help validate and demonstrate
the performance analysis results and identify the special performance characteristics in an NCS. These performance characteristics are useful guidelines for choosing the network and control
parameters when designing an NCS.
Index TermsDistributed control systems, networked control
systems (NCSs), network transmission delay, processing time
delay, sampling time selection.
Fig. 1. Performance comparison of continuous control, digital control, and
networked control cases.
I. INTRODUCTION
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Fig. 2. A timing diagram showing time spent sending a message from a source node to a destination node.
1 is sending a message, the other eight devices must wait until the
network medium is free. In a CAN3 -based DeviceNet4 network,
it can be expected that Slave 9 will encounter the most waiting
time because it has a lower priority on this priority based network.
However, in any network, there will be a nontrivial waiting time
after a strobe, depending on the number of devices that will respond to the strobe.
Fig. 4 shows experimental data of the waiting time of nine
identical devices on a DeviceNet network. These devices have
a very low variance of processing time. We collected 200 pairs
of messages (request and response). Each symbol denotes the
mean and the distance between the upper and lower bars equals
3CAN stands for controller area network which is a bit-synchronized control
network that utilizes a nondestructive collision resolution scheme through message priority specified in the message arbitration field.
4DeviceNet implements the physical layer and data link layer of a standard
CAN protocol and defines its own node and message priority. Specifically,
DeviceNet further utilizes the message arbitration field to define different
classes of message and node priorities. The waiting time in a DeviceNet network
is a function of the message or node number, i.e., priority.
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two standard deviations. If these bars are over the limit (maximum or minimum), then the value of limit is used instead. It
can be seen in Fig. 4 that the average waiting time is proportional to the node number (i.e., priority). Also, the first few devices have a larger variance than the others, because the variance
of processing time occasionally allows a lower-priority device
to access the idle network before a higher-priority one.
C. Transmission Time on Network Channel
The transmission time is the most deterministic parameter
in a network system because it only depends on the data rate,
the message size, and the distance between two nodes. The formula for transmission time can be described as follows:
, where is the message size in terms of bits,
is the bit time and
is the propagation time between
any two devices. Since the typical transmission speed in a communication medium is 2 10 m/s, the propagation time
is negligible in a small scale (100 m or shorter) control network.
D. Postprocessing Time at Destination Nodes
The postprocessing time at the destination node is the time
taken to decode the network data into the physical data format
and output to the external environment. Some experimental
analysis of postprocessing time along with preprocessing times
will be discussed in the following section.
E. Experimental Investigation of Timing Components
In practical applications, it is very difficult to identify each
individual timing component discussed above. Instead, by mon-
itoring the time-stamped traffic of the request-response messaging on a DeviceNet network, we will show the characteristics
of processing times, i.e., the sum of preprocessing and postprocessing times of one device.
In the experimental setup, there is only one master and one
slave connected to the network and the master continuously
polls this slave. Refer to Fig. 2 and let Node A be the master
and Node B be the slave. Here, there is no other network traffic
other than the request-response messages between the master
and the request-response frequency
and slave, i.e.,
is set low enough such that no messages are queued up at the
sender buffer. By monitoring the message traffic on the network medium and time-stamping each message, we can further calculate the processing time of each request-response, i.e.,
, after subtracting the transmission time.
Fig. 5 shows the histogram of 400 samples of six typical
DeviceNet device processing times. The (right) solid and (left)
dashed lines are the maximum and minimum values of processing times, respectively. The histogram plots indicate the
nondeterministic processing times of different network devices
and their variance. Devices 1 and 5 have similar functionality of
discrete inputs/outputs, but different numbers of inputoutput
modules. Device 5 provides several augmentable modules and
hence has more processing units and computation load. Device
1, on the other hand, has only one unit. Devices 2, 3, and 4 have
fairly consistent processing times, i.e., low variance. Note that
the smallest time that can be recorded is 1 s. The uniform distribution of processing time at Device 6 is due to the fact that
it has an internal sampling time which is mismatched with the
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(a)
(b)
(c)
or
IAE
and
Prob
(2)
or
ITAE
and
are the initial and final times of the
where
evaluation period in continuous (discrete) time and is the error
between the actual and reference trajectories. ITAE weights
later errors heavier and discounts the transient response,
whereas IAE weights all errors equally.
When sensors, actuators and controllers are interconnected by
one common-bus network, all devices need to share the transmission medium. In addition, application signals are discretized.
Hence, it is natural to analyze these types of systems using a
digital control approach. In order to guarantee system stability
and control performance, two control measures can be used to
determine the best sampling period: phase margin and control
system bandwidth.
The phase margin is the amount by which the phase of an
open-loop system exceeds 180 when the magnitude equals
one. The primary effect of the sampling time delay is additional
and time
phase lag. The phase lags due to discretization,
, are summarized as follows [19], [20]:
delay,
and
Prob
(3)
(4)
(5)
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same sampling period. In addition, the case with uniformly distributed time delays shows a further degradation of system performance because the time-delay variation causes uncertainty at
actuators actions.
Fig. 7 demonstrates how point in Fig. 1 can be determined
using (5)(6). If the statistics of the additional time delay are
can be determined as follows. Using (5), the
known, point
total phase lags due to digital control without time delay,
and digital control with time delay
can be further expressed
as follows:
and
(8)
Fig. 7.
Suppose both digital control and digital control with delay have
. Hence, we have
same phase lags, i.e.,
or
. Furthermore, (6) can be used
in terms of control system bandwidth, i.e.,
to estimate
. So, the sampling period of point can be described as
follows:
(9)
Therefore, using (9) and assuming a 2ms delay,
for the system discussed is estimated as follows:
ms.
B. Network Bandwidth Versus Control Performance
In order to visualize the impact of sampling and time delays on control QoP, a second-order system is considered. Its
open-loop transfer function is
(7)
rad/s (asThe phase margin of this system is 40 at
suming unity feedback). Hence, the maximum sampling period,
ms. If considering an additional time
based on (5), is
delay of 2 ms, the phase lag due to time delay is
using (5). This additional time delay will further reduce the maximum sampling period.
Fig. 7 shows the simulation study of the impact of sampling
effect and time delay on control QoP. A closed-loop system with
control system bandwidth of 2.5 Hz is studied and the results are
shown in Fig. 7. The horizontal axis is sampling period and the
vertical axis is ITAE. The (red) solid lines with are the result of only considering the sampling effect. The (blue) dashed
lines with are the result of considering the sampling effect
and a constant time delay of 2 ms. The (green) dashdot lines
with are the result of the sampling effect and a uniformly
distributed time delay between 0 and 4 ms. These delays are
experienced at both the sensing and actuation nodes. The result of random delay case is the average value of three identical
simulation runs. Based on the sampling rule of thumb in (6),
the suggested maximum sampling period is 20 ms. For the case
without any additional time delay, i.e., only the sampling effect,
the control performance gets worse when the sampling periods
are larger than the maximum values. When additional time delays are also considered, the point of degradation moves to the
right. That is, the control performance becomes worse with the
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Fig. 8.
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B. Simulation Model
A network-control simulation model has been implemented
in Matlab/Simulink as shown in Fig. 8. The simulation model
has two parts: a network simulator and a control simulator.
By specifying the MAC mechanism of different protocols and
network parameters such as node numbers, data rates, data
sizes and message periods, the network simulator produces
the network induced delays between different nodes with
experimentally determined device performance profiles and
provides statistics of these time delays and related network QoS
evaluation of the network configuration. Three types of network
protocols, Ethernet, ControlNet (token-passing) and DeviceNet
(CAN-based) are implemented in the network simulator.5 The
time delay data can be fed into the control simulator to simulate
the dynamic response of the closed-loop system with network
induced delays. A PID controller is used on each axis of the
machine tool; gains are calculated based on a discrete-time
model of the system and a set of desired closed-loop poles.
The control simulator also provides the control QoP in terms
of ITAE and IAE. The detailed description of this simulation
software package can be found in [24].
C. Simulation Study With Network Delay
In this section, we consider the cases with network-induced
delays only. Device processing time delay will be discussed in
the next section. In this study we consider two fundamental message connections: strobe and poll. In a strobe connection, all
sensors are asked for new information at the same time and the
response messages are received by the controller one at a time
based on the different network protocols. The controller then
calculates the actuation command based on the control law and
sends the command to the actuators through the network. For
the case of a poll connection, sensors respond with new information after they have received poll requests. Because sensing
messages arrive at the controller at different time instants, it is
possible for the controller to update the actuation command immediately to obtain better control performance. However, this
5The detailed description and comparison of Ethernet, ControlNet, and
DeviceNet can be found in [6]
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(a)
(b)
(c)
Fig. 9. Control performance (ITAE) versus message period of three control
networks and two messaging connections. (a) Ethernet. (b) ControlNet.
(c) DeviceNet.
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Fig. 10.
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Simulation and experimental results of control QoP: centralized and networked cases. Top row: (a), (b), (c). Bottom row: (d), (e), (f).
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the network traffic load gets heavy, only the messages associated
with the -axis can get through. However, all three axes have
ms in
the same upper limit of sampling period, i.e.,
the example, since they have similar closed-loop dynamic characteristics. The feasible range of sampling periods for the ,
and axes are (7, 23), (13, 23), and (13, 23) ms, respectively.
The results are similar to the simulation results shown in the top
row of Fig. 10, although the performance is worse in the cases
of longer sampling periods.
VI. CONCLUSION
This paper addressed the design issues of network architecture in a type of distributed control system where sensors,
actuators, and controllers are interconnected by a common-bus
network. Design considerations include network parameters,
control parameters and networked control system performance
as the design guideline. Along with the theoretical analysis, a
numerical computer network-and-control simulation tool was
developed to assist in NCS design. The design procedures
are summarized as follows. At the first stage of a design
process (assuming actual network and control systems are not
available), an NCS designer can utilize the network and control
performance analysis in Section IV to investigate the feasibility
of this set of system parameters. Also incorporating the processing time model and other timing parameters described in
Section III, an integrated computer network-and-control simulator can be used to help understand the network availability
and control performance. Similar comparative analysis can be
applied to different network protocols and system dynamics.
Hence, the analysis result can be a guideline for choosing the
most suitable network system.
If a practical network is available at the next design stage, actual device processing times and network traffic can be collected
and used to simulate the control system model. At this stage,
different combinations of network parameters can be studied to
optimize the control performance. In order to guarantee the best
control performance, different controller designs can be tested
to verify their stability and performance.
During the design procedure, an NCS performance design
chart as shown in Fig. 1 can be derived. This paper investigated
the existence and location of the performance degradation points
with the aid of simulation and experimental results. The performance degradation point in digital control can be estimated
by using the relationship between control system bandwidth and
sampling rate. For the networked control case, point can be
determined by further investigating the characteristics and statistics of network-induced delays along with other processing
time delays. Messages with smaller sampling periods also generate high network traffic load. The high network traffic load
could increase the possibility of data loss or the waiting time
for message contention and induce longer time delays. Therefore, network saturation results in the existence of point in
networked control.
The improvement of NCS performance can be divided into
two areas. One is the minimization of device processing time
and the improvement of network protocols to further guarantee
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