Synopsys Hash
Synopsys Hash
Synopsys Hash
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HAPS - Hardware
User Design
HW
Transactor
UMRBus
Adapter
Trans
actor
Core
CAPIM
AMBA
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UMR PCIe
Synopsys supplied hardware, object code,
encrypted or tool inserted IP
SystemC
TLM 2.0
S
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C
A
P
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C++API
Synopsys 2012 51
Validating IP (like H.264 decoder) in
real world environment
RTL or IP block with AMBA interface
C++ program to generate test data
Requirements
DUT
(e.g. H.264 decoder)
FPGA-Based Hardware
AXI/AHB
Transactor
SDRAM
Controller
SDRAM
Utilize UMRBus & AMBA based
transactor to stream data to FPGA-
based prototyping hardware
Solution
Data stream
Host
Example Data Streaming
LCD
Ctrl
LCD
UMRBus
AXI/AHB
Transactor
C++ program
Host
Synopsys 2012 52
Validating IP (like USB controller) in
real world environment
RTL or IP block with AMBA interface
Embedded Linux OS program to
generate test data
Requirements
DUT
(e.g. USB 3.0 device controller)
FPGA-Based Hardware
AXI/AHB
Transactor
USB 3.0
PHY
Laptop
Utilize UMRBus & AMBA based
transactor to connect virtual CPU
subsystem to FPGA-based
prototyping hardware
Solution
Host
Example In-Context Validation
UMRBus
AXI/AHB
Transactor
Linux OS
ARM Cortex
VDK
USB Device
Driver
Synopsys 2012 53
Checklist: Prototype Connectivity
Synopsys 2012 54
Synopsys Software Synopsys Hardware
SystemC/FPGA hybrid prototyping
Multi-FPGA implementation for HAPS
SystemC/C++software libraries and IP for FPGA
Co-simulation or transaction based verification VCS
Host Workstation
HAPS-60 Series
HAPS-60
Co-Sim & TBV Suite
Certify
HAPS UMRBus
Interface Kit
Virtualizer
UMRBus Interface Pod
HAPS-64 System
UMRBus
Products Presented
Synopsys 2012 55
Predictable Success