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    CpE311 Syllabus F13

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    Naveen Raj Kurapati
    This document provides information about the CpE311 - Introduction to VLSI Design course for the Fall 2013 semester. It outlines the instructor and TAs contact information, required textbook, tentative topics to be covered, project and exam dates, grading breakdown, policies on assignments, attendance, and cheating. Key topics include digital integrated circuits, MOS transistors, CMOS logic, sequential logic, VLSI implementation approaches, memory, timing analysis, and design verification.

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    CpE311 Syllabus F13

    Uploaded by

    Naveen Raj Kurapati
    76 views3 pages
    This document provides information about the CpE311 - Introduction to VLSI Design course for the Fall 2013 semester. It outlines the instructor and TAs contact information, required textbook, tentative topics to be covered, project and exam dates, grading breakdown, policies on assignments, attendance, and cheating. Key topics include digital integrated circuits, MOS transistors, CMOS logic, sequential logic, VLSI implementation approaches, memory, timing analysis, and design verification.

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    it is a vlsi course

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    CpE311 syllabus F13

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    This document provides information about the CpE311 - Introduction to VLSI Design course for the Fall 2013 semester. It outlines the instructor and TAs contact information, required textbook, tentative topics to be covered, project and exam dates, grading breakdown, policies on assignments, attendance, and cheating. Key topics include digital integrated circuits, MOS transistors, CMOS logic, sequential logic, VLSI implementation approaches, memory, timing analysis, and design verification.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    76 views3 pages

    CpE311 Syllabus F13

    Uploaded by

    Naveen Raj Kurapati
    This document provides information about the CpE311 - Introduction to VLSI Design course for the Fall 2013 semester. It outlines the instructor and TAs contact information, required textbook, tentative topics to be covered, project and exam dates, grading breakdown, policies on assignments, attendance, and cheating. Key topics include digital integrated circuits, MOS transistors, CMOS logic, sequential logic, VLSI implementation approaches, memory, timing analysis, and design verification.

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    Attribution Non-Commercial (BY-NC)
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    CpE311 Introduction to VLSI Design

    Fall Semester, 2013 Instructor: Dr. Yiyu Shi Email: [email protected] (best way to reach me) Office: 129 EECH Office hours: M/W. 2:00-3:00 pm, though Im often available at other times Cadence TA: Hui Geng, [email protected] Jianming Liu, [email protected] Prerequisites: CpE213. CpE214 and CpE318 can also be helpful but are not required Textbook: Digital Integrated Circuits, J. Rabaey, A. Chandrakasan, B. Nikolic, Prentice Hall, second edition, 2003. Material Covered (tentative): Ch. 1 Introduction to VLSI Circuits and Systems Ch. 3 The MOS transistor and its various models Ch. 4 The wire and its various models Ch. 5 Detailed analysis of a CMOS circuit, the inverter Ch. 6 Static and dynamic CMOS logic Ch. 7 Sequential Logic Circuits Ch. 8 Implementation approach: standard cells, FPGA, gate arrays Ch. 12 Memory App. G Design verification App. B Circuit simulation Ch. 10 Static timing analysis Ch. 9 Signal and power integrity Ch. 2 Manufacturing and packaging Ch 3.4 Process, Voltage and Temperature (PVT) variation App. H Testing Other topics as schedule permits Grading: 15% Test I 15% Test II 15% Labs 20% project 20% final exam

    10% homework 5% in-class quiz (randomly distributed) 5% homework, exam and project bonus 2% performance bonus Project: To be announced Quizzes and Final Exam: There will be quizzes in class, without prior announcement. The quizzes will contain simple problems from recent lectures, homework, and labs. Final exam is mainly based on the problems that have appeared in quizzes, homework and tests. Test dates: Test I: In class, Oct. 1, 2013 Test II: In class, Nov. 5, 2013 Final: 4:00-6:00 pm, Tuesday, Dec. 10, 2013 Course Policies: Lecture notes will be posted on Blackboard prior to the class. Homework problems will be assigned in class and posted on Blackboard after class. There will also be reading assignment after some lectures, which is used to help you better understand the material covered in class. Unless otherwise specified, assignments are due at the beginning of class. I understand that sometimes unexpected situation may happen. Accordingly, you are allowed to turn in your homework ONE day late TWICE in the semester. However, you must have a reasonable excuse, and must obtain my permission before the deadline. You will receive no credit for late submission otherwise. No late submission for the labs. No makeup exams. While you are expected to complete all assigned problems, the grader may randomly pick only certain problems to grade. It is common in larger classes to compute your grade based on the accuracy of 1 or 2 problems and an evaluation of how hard you tried on the rest. Extra credit may occasionally be offered in the homework, tests and final exam. You will not be penalized for not completing the extra credit, but if you have cause to be concerned about your grade I strongly recommend you take advantage of it when available. You are encouraged to discuss with others for homework and projects. However, you must do the write-up independently and make sure you understand the solution. If you cannot adequately explain the basis for your solution at a later date, no credit will be given even if your solution is correct. Simply copying someone elses homework will be considered cheating and will not be accepted under any circumstances.

    Partial Credit: Problems are rarely graded as all-or-none. Emphasis is placed first on proper understanding of the concepts, then on proper application of those concepts, and lastly on the right answer. You will not be severely penalized for minor, nonconceptual errors. On the other hand, a simple answer with no work or explanation may not be given full credit. If you feel you deserve more credit on a problem than was given, you may submit a written request for additional credit, clearly stating why you deserve additional credit. Such requests may not be made until 24 hours after the exam was handed back and should be in the form of a memo like you would use when communicating between professionals on the job. No requests will be accepted after 30 days. Attendance: You are not required to attend the class. However, you will be responsible for procuring any material, information, handouts, or announcements that you missed. In addition, you will NOT get a second chance if you miss any tests or the final exam. Cheating: Dont do it! Department policy is to fail you in the course for the first offense and to expel you from the school of engineering for the second.

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