74LS573
74LS573
74LS573
March 1998
Features
n Inputs and outputs on opposite sides of package allowing easy interface with microprocessors n Useful as input or output port for microprocessors n Functionally identical to LS373 n Input clamp diodes limit high speed termination effects n Fully TTL and CMOS compatible
Connection Diagram
Dual-In-Line Package
Logic Symbol
DS009814-1
DS009814-2
Description Latch Enable Input (Active HIGH) 3-STATE Output Enable Input (Active LOW) 3-STATE Latch Outputs
Function Table
OUTPUT Enable L L L H Latch Enable H H L X H L X X D Output O H L QO Z
L = Low State, H = High State, X = Dont Care Z = High Impedance State QO = Previous Condition of O
DS009814
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Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics table are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation.
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage II IIH IIL IOS ICC IOZH IOZL Input Current @ Max Input Voltage High Level Input Current Low Level Input Current Short Circuit Output Current Supply Current 3-STATE Output off Current High 3-STATE Output off Current Low
Note 2: All typicals are at VCC = 5V, TA = 25C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Conditions VCC = Min, II = 18 mA VCC = Min, IOH = Max, VIL = Max VCC = Min, IOL = Max, VIH = Min IOL = 4 mA, VCC = Min VCC = Max, VI = 7V VCC = Max, VI = 2.7V VCC = Max, VI = 0.4V VCC = Max (Note 3) VCC = Max VCC = VCCH VOZH = 2.7V VCC = VCCH VOZL = 0.4V
Min
Typ (Note 2)
Max 1.5
Units V V
2.7
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Switching Characteristics
at VCC = 5V and TA = 25C (see Section 1 for Test Waveforms and output loading) Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ ts(H) ts(L) th(H) th(L) tw(H) Parameter Min Propagation Delay Data to Q Propagation Delay LE to Q 3-STATE Enable Time OE to Q 3-STATE Enable Time OE to Q Setup Time (High/Low) Data to LE Hold Time (High/Low) Data to LE Pulse Width (High) Data to LE 3 7 10 10 15 ns ns RL = 2 k, CL = 50 pF Max 27 18 36 25 20 25 20 25 ns ns ns ns ns Units
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Physical Dimensions
20-Lead Wide Small Outline Molded Package (M) Order Number DM74LS573WM Package Number M20B
20-Lead Molded Dual-In-Line Package (N) Order Number DM74LS573N Package Number N20A
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.