ICX618ALA: Diagonal 4.5mm (Type 1/4) Progressive Scan CCD Image Sensor With Square Pixel For B/W Cameras

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Diagonal 4.

5mm (Type 1/4) Progressive Scan CCD Image Sensor with Square Pixel for B/W Cameras

ICX618ALA
Description
The ICX618ALA is a diagonal 4.5mm (Type 1/4) interline CCD solid-state image sensor with a square pixel array which supports VGA format. Progressive scan enables all pixel signals to be output separately within approximately 1/60 second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still images without a mechanical shutter.The sensitivity and near infrared sensitivity are improved drastically through the adoption of advanced EXview HAD CCD technology. This chip is suitable for applications such as security cameras and network cameras.

Features
High sensitivity (+3.5dB compared with the ICX614ALA) High saturation signal (+2.0dB compared with the ICX614ALA) Low smear (8.0dB compared with the ICX614ALA) Progressive scan enables individual readout of the image signals from all pixels. Square pixel Supports VGA format Horizontal drive frequency: Supports 24.54MHz No voltage adjustments (Reset gate and substrate bias need no adjustment.) High resolution, high sensitivity, low dark current Continuous variable-speed shutter Excellent anti-blooming characteristics Horizontal register: 3.3V drive 14-pin high accuracy plastic package (dual-surface reference available)

* EXview HAD CCD is a trademark of Sony Corporation. The EXview HAD CCD is a CCD that drastically improves light efficiency by including near infrared light region as a basic structure of HAD (Hole-Accumulation Diode) sensor. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

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E06243B76

ICX618ALA

Element Structure
Interline CCD image sensor Image size

Diagonal 4.5mm (Type 1/4)


Number of effective pixels

659 (H) 494 (V) approx. 330K pixels Total number of pixels 692 (H) 504 (V) approx. 350K pixels Chip size 4.46mm (H) 3.80mm (V) Unit cell size 5.6m (H) 5.6m (V) Optical black Horizontal (H) direction: Front 2 pixels, rear 31 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels Number of dummy bits Horizontal: 16 Vertical: 4 Substrate material Silicon

Optical Black Position


(Top View)
Pin 1 2

8 2 Pin 8 H 31

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ICX618ALA

USE RESTRICTION NOTICE


This USE RESTRICTION NOTICE (Notice) is for customers who are considering or currently using the CCD image sensor products (Products) set forth in this specifications book. Sony Corporation (Sony) may, at any time, modify this Notice which will be available to you in the latest specifications book for the Products. You should abide by the latest version of this Notice. If a Sony subsidiary or distributor has its own use restriction notice on the Products, such a use restriction notice will additionally apply between you and the subsidiary or distributor. You should consult a sales representative of the subsidiary or distributor of Sony on such a use restriction notice when you consider using the Products.

Use Restrictions
The Products are intended for incorporation into such general electronic equipment as office products,

communication products, measurement products, and home electronics products in accordance with the terms and conditions set forth in this specifications book and otherwise notified by Sony from time to time. You should not use the Products for critical applications which may pose a life- or injury- threatening risk or are highly likely to cause significant property damage in the event of failure of the Products. You should consult your Sony sales representative beforehand when you consider using the Products for such critical applications. In addition, you should not use the Products in weapon or military equipment. Sony disclaims and does not assume any liability and damages arising out of misuse, improper use, modification, use of the Products for the above-mentioned critical applications, weapon and military equipment, or any deviation from the requirements set forth in this specifications book.

Design for Safety


Sony is making continuous efforts to further improve the quality and reliability of the Products; however,

failure of a certain percentage of the Products is inevitable. Therefore, you should take sufficient care to ensure the safe design of your products such as component redundancy, anti-conflagration features, and features to prevent mis-operation in order to avoid accidents resulting in injury or death, fire or other social damage as a result of such failure.

Export Control
If the Products are controlled items under the export control laws or regulations of various countries,

approval may be required for the export of the Products under the said laws or regulations. You should be responsible for compliance with the said laws or regulations.

No License Implied
The technical information shown in this specifications book is for your reference purposes only. The

availability of this specifications book shall not be construed as giving any indication that Sony and its licensors will license any intellectual property rights in such information by any implication or otherwise. Sony will not assume responsibility for any problems in connection with your use of such information or for any infringement of third-party rights due to the same. It is therefore your sole legal and financial responsibility to resolve any such problems and infringement.

Governing Law
This Notice shall be governed by and construed in accordance with the laws of Japan, without reference to

principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating to this Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the court of first instance.

Other Applicable Terms and Conditions


The terms and conditions in the Sony additional specifications, which will be made available to you when

you order the Products, shall also be applicable to your use of the Products as well as to this specifications book. You should review those terms and conditions when you consider purchasing and/or using the Products.

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ICX618ALA

Block Diagram and Pin Configuration


(Top View)
V3B V3A V2A V2B
1 Note) Horizontal Register Note) 8 9 10 11 12 13 14 : Photo sensor

V 4

V 1
5

VL

Vertical Register

SUB

VOUT

GND

RG

VDD

H1

Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol V2B V2A V3A V3B V 1 V 4 VL VOUT VDD GND SUB RG H1 H2 Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Protective transistor bias Signal output Supply voltage GND Substrate clock Reset gate clock Horizontal register transfer clock Horizontal register transfer clock

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H2

ICX618ALA

Absolute Maximum Ratings


Item VDD, VOUT, RG SUB Against SUB V2A, V2B, V3A, V3B SUB V1, V4 SUB H1, H2, GND SUB VDD, VOUT, RG GND Against GND V1, V2A, V2B, V3A, V3B, V4 GND H1, H2 GND Against VL V2A, V2B, V3A, V3B VL V1, V4, H1, H2 VL Potential difference between vertical clock input pins Between input clock pins H1 H2 H1, H2 V3 Ratings 40 to +13 50 to +15 50 to +0.3 40 to +0.3 0.3 to +18 10 to +18 10 to +5 0.3 to +28 0.3 to +15 to +15 5 to +5 13 to +13 30 to +80 10 to +60 Unit V V V V V V V V V V V V
C C *1

Remarks

Storage temperature Operating temperature


*1

+24V (Max.) is guaranteed when clock width < 10s, clock duty factor < 0.1%.

Bias Conditions
Item Supply voltage Protective transistor bias Substrate clock Reset gate clock
*1

Symbol VDD VL SUB RG

Min. 14.55

Typ. 15.0
*1 *2 *2

Max. 15.45

Unit V

Remarks

*2

VL setting is the VVL voltage of the vertical clock waveform, or the same voltage as the V L power supply for the V driver should be used. Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated internally.

DC Characteristics
Item Supply current Symbol IDD Min. Typ. 6.0 Max. Unit mA Remarks

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ICX618ALA

Clock Voltage Conditions


Waveform diagram 1 2 2 VVH = VVH02A

Item Readout clock voltage

Symbol VVT VVH02A VVH1, VVH2 (A, B), VVH3 (A, B), VVH4 VVL1, VVL2 (A, B), VVL3 (A, B), VVL4 V1, V2 (A, B), V3 (A, B), V4 | VVL3 (A, B), VVL4 VVL | VVHH VVHL VVLH VVLL

Min. 14.55 0.05 0.2

Typ. 15.0 0 0

Max. 15.45 0.05 0.05

Unit V V V

Remarks

5.8

5.5

5.2

VVL = (VVL1 + VVL3 (A, B))/2

Vertical transfer clock voltage

5.0

5.5

5.85 0.1 0.3 1.0 0.5 0.5

V V V V V V V V V V V V

2 2 2 2 2 2 3 3 4 4 4 5 Low-level coupling Low-level coupling High-level coupling High-level coupling Low-level coupling Low-level coupling

Horizontal transfer clock voltage Reset gate clock voltage Substrate clock voltage

VH VHL VRG VRGLH VRGLL VRGL VRGLm VSUB

3.0 0.05 3.0

3.3 0 3.3

5.25 0.05 5.5 0.4 0.5

19.75

20.5

21.25

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ICX618ALA

Clock Equivalent Circuit Constants


Item Symbol CV1 Capacitance between vertical transfer clock and GND CV2A, CV2B CV3A, CV3B CV4 CV12A, CV12B CV13A, CV13B CV14 Capacitance between vertical transfer clocks CV2A3A, CV2B3B CV2A4, CV2B4 CV3A4, CV3B4 Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND CH1 CH2 CHH CRG CSUB R1 Vertical transfer clock series resistor R2A, R2B R3A, R3B R4 Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor
V2A R2A CV2A V2B R2B CV2B CV13A CV2A3A CV3A CV3A4 CV2B3B CV12B CV2A4 CV12A CV1 V1 R1 CV13B CV2B4 CV14 CV4 H1 CH1 RH CHH RH H2 CH2

Min.

Typ. 1000 820 390 1500 56 2 180 220 270 180 15 15 47 5 270 47 91 68 24 47 15 56

Max.

Unit pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF

Remarks

RGND RH1, RH2 RRG

Horizontal transfer clock equivalent circuit

V3A

R3A

CV3B4 RGND R3B V3B

R4 V4 RG

RRG

CV3B

CRG

Vertical transfer clock equivalent circuit

Reset gate clock equivalent circuit

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ICX618ALA

Drive Clock Waveform Conditions


1. Readout clock waveform
100% 90%

M VVT 10% 0% tr twh tf M 2 0V

2. Vertical transfer clock waveform


V1
VVH1 VVHH VVH VVHL VVHL VVHH VVHL VVH3 (A, B)

V3A, V3B
VVHH VVHL VVHH VVH

VVL1

VVLH

VVL3 (A, B)

VVLH VVLL VVL

VVLL VVL

V2A, V2B
VVHH VVHH

V4
VVH VVHH VVHH

VVH VVHL

VVH2 (A, B)

VVHL

VVHL VVH4

VVHL

VVLH VVL2 (A, B) VVLL VVL VVL4 VVLL

VVLH

VVL

VVH = (VVH1 + VVH2 (A, B))/2 VVL = (VVL3 (A, B) + VVL4)/2 VV = VVHn VVLn (n = 1 to 4)

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ICX618ALA

3. Horizontal transfer clock waveform


tr H2 90% VCR VH VH 2 VHL two twl twh tf

10% H1

Cross-point voltage for the H1 rising side of the horizontal transfer clocks H1 and H2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two.

4. Reset gate clock waveform


tr twh tf

RG waveform

VRGH

twl VRG Point A VRGLH VRGLL VRGLm VRGL

VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: VRG = VRGH VRGL Negative overshoot level during the falling edge of RG is VRGLm.

5. Substrate clock waveform


100% 90%

M VSUB 10% VSUB 0% (A bias generated internally) M 2 tf

tr

twh

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ICX618ALA

Clock Switching Characteristics


twh twl tr tf

Item Readout clock

Symbol VT V1, V2 (A, B), V3 (A, B), V4 H1 H2 H1 H2 RG SUB

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 1.8 2.0 0.5 0.5

Unit Remarks s During readout


*1

Vertical transfer clock

15 10.5 14.6 10.5 14.6 10.5 14.6 10.5 14.6 6.4 10.5 6.4 10.5 0.001 0.001 6 8 25.8 4 0.5 3

250 ns 6.4 10.5 6.4 10.5

Horizontal transfer clock

During imaging During parallelserial conversion

ns

*2

s ns 0.5 s When draining charge

Reset gate clock Substrate clock


*1 *2

0.63 0.73

When vertical transfer clock driver CXD1267AN is used. tf tr 2ns, and the cross-point voltage (VCR) for the H1 rising side of the H1 and H2 waveforms must be at least VH/2 [V]. two Min. Typ. Max.

Item Horizontal transfer clock

Symbol

Unit ns

Remarks

H1, H2 10.5 14.6

Spectral Sensitivity Characteristics


(excludes lens characteristics and light source characteristics)
1.0 0.9 0.8 0.7
Relative Response

0.6 0.5 0.4 0.3 0.2 0.1 0.0 400 500 600 700 Wavelength [nm] 800 900 1000

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ICX618ALA

Image Sensor Characteristics


(Ta = 25C) Item Sensitivity 1 Sensitivity 2 Saturation signal Smear Video signal shading Dark signal Dark signal shading Lag Symbol S1 S2 Vsat Sm SH Vdt Vdt Lag 800 100 110 20 25 4 1 0.5 Min. 960 Typ. 1200 5500 Max. Unit mV mV mV dB % % mV mV % Measurement method 1 2 3 4 5 5 6 7 8 Zone 0 and I Zone 0 to II Ta = 60C, 1/30s accumulation Ta = 60C, 1/30s accumulation Remarks 1/30s accumulation 1/30s accumulation Ta = 60C

Zone Definition of Video Signal Shading


659 (H) 12 12 12 H 8 V 10 H 8

494 (V)

Zone 0, I Zone II, II' V 10

10

Ignored region Effective pixel region

Measurement System
CCD signal output [A]

CCD

C.D.S

AMP

S/H

Test point [B]

Note) Adjust the amplifier gain so that the gain between [*A] and [*B] equals 1.

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ICX618ALA

Image Sensor Characteristics Measurement Method


Measurement conditions
1. In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions. 2. In the following measurements, spot pixels are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value measured at point [*B] of the measurement system.

Definition of standard imaging conditions


Standard imaging condition I:

Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F8. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity.
Standard imaging condition II:

This indicates the standard imaging condition I with the IR cut filter removed.
Standard imaging condition III:

Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. Sensitivity 1 Set to the standard imaging condition I. After setting the electronic shutter mode with a shutter speed of 1/100s, measure the signal output (VS) at the center of the screen and substitute the value into the following formula. S = VS (100/30) [mV] 2. Sensitivity 2 Set to the standard imaging condition II. After setting the electronic shutter mode with a shutter speed of 1/1000s, measure the signal output (VS2) at the center of the screen and substitute the value into the following formula. S2 = VS2 (1000/30) [mV] 3. Saturation signal Set to the standard imaging condition III. After adjusting the luminous intensity to 10 times the intensity with the average value of the signal output, 150mV, measure the minimum value of the signal output. 4. Smear Set to the standard imaging condition III. With the lens diaphragm at F5.6 to F8, first adjust the average value of the signal output to 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (Vsm [mV]) of the signal output, and substitute the value into the following formula. Sm = 20 log {(Vsm/150) (1/500) (1/10)} [dB] (1/10V method conversion value)

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ICX618ALA

5. Video signal shading Set to the standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjusting the luminous intensity so that the average value of the signal output is 150mV. Then measure the maximum value (Vmax [mV]) and minimum value (Vmin [mV]) of the signal and substitute the values into the following formula. SH = (Vmax Vmin)/150 100 [%] 6. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature of 60 C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 7. Dark signal shading After the measurement item 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax Vdmin [mV] 8. Lag Adjust the signal output value generated by strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/150) 100 [%]

VD

V2A

Light Strobe light timing

Signal output 150mV Output

Vlag (lag)

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Drive Circuit

15V 20 19 18 1/35V 5.5V 3.3/16V 22/16V 100 17 16 15 14 13 12 11 1 2 3 4 5 6 7 2SC4250 CCD OUT

XSUB

XV1

XV2

CXD1267AN

XSG1

XV3

XSG2

XV4

10

- 14 V1 V4 V2B V2A
ICX618 (BOTTOM VIEW)

22/20V

VL

V3A GND RG

V3B

2.2k

VOUT VDD

14 13 12 11 10

SUB

H2

H1

100k 0.1

3.3/20V

0.01

H2 2200p 0.1 1M

H1

ICX618ALA

RG

Drive Timing Chart

Readout Portion

#1

#3

2.04s (50 bits) #4

H1 44 44 1 780 116 1 780 116

44 40.7ns (1 bit) 521 80

1 780

116

V1

- 15 520 570 71 98 89 530 580 62 107

V2A/V2B

44

V3A/V3B

V4

ICX618ALA

ICX618ALA

Drive Timing Chart


Vertical Sync

10 9 8 7 6 5 4 3 2 1 525

520

510

2 1 494 493

500

10 9 8 7 6 5 4 3 2 1 525

10 9 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1

V2A/V2B

V3A/V3B

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CCD OUT

VD

HD

V1

V4

Drive Timing Chart

HD 1 78 31 16 6 140 2 9 9 9 9 9 9 9 9 13 780 (0)

Horizontal Sync

BLK

CLK

H1

H2

- 17 53 80 71 98 44 89 62 107 89 107

V1

V2A/V2B

V3A/V3B

V4

SUB

ICX618ALA

ICX618ALA

Notes On Handling
1. Static charge prevention Image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. (1) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. (2) Use a wrist strap when handling directly. (3) Install grounded conductive mats on the floor and working table to prevent the generation of static electricity. (4) Ionized air is recommended for discharge when handling image sensors. (5) For the shipment of mounted boards, use boxes treated for the prevention of static charges. 2. Soldering (1) Make sure the temperature of the upper surface of the seal glass resin adhesive portion of the package does not exceed 80C. (2) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron with a ground wire and solder each pin in 2 seconds or less. For repairs and remount, cool sufficiently. (3) To dismount an image sensor, do not use solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero-cross On/Off type and connect it to ground. 3. Protection from dust and dirt Image sensors are packed and delivered with care taken to protect the element glass surfaces from harmful dust and dirt. Clean glass surfaces with the following operations as required before use. (1) Perform all lens assembly and other work in a clean room (class 1000 or less). (2) Do not touch the glass surface with hand and make any object contact with it. If dust or other is stuck to a glass surface, blow it off with an air blower. (For dust stuck through static electricity, ionized air is recommended.) (3) Clean with a cotton bud and ethyl alcohol if grease stained. Be careful not to scratch the glass. (4) Keep in a dedicated case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. (5) When a protective tape is applied before shipping, remove the tape applied for electrostatic protection just before use. Do not reuse the tape. 4. Installing (attaching) (1) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.)
Cover glass

50N Plastic package Compressive strength

50N

1.2Nm Torsional strength

(2)

(3)

If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution.

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ICX618ALA

(4) (5) (6)

The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. If the lead bend repeatedly and the metal, etc., clash or rub against the package, dust may be generated by the fragments of resin. Acrylate anaerobic adhesives are generally used to attach image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives to hold the image sensor in place until the adhesive completely hardens. (reference)

5. Others (1) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high luminance objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloration of the color filters may be accelerated. In such a case, arrangements such as using an automatic iris with the imaging lens or automatically closing the shutter during power-off are advisable. For continuous use under harsh conditions exceeding the normal conditions of use, consult your Sony representative. (2) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or use in such conditions. (3) Brown stains may be seen on the bottom or side of the package. But this does not affect the characteristics. (4) This package has 2 kinds of internal structure. However, their package outline, optical size, and strength are the same. (5) This image sensor has sensitivity in the near infrared area. Its focus may not match in the same condition under visible light/near infrared light because of aberration. Incident light component of long wavelength which transmits the silicon substrate may have bad influence upon image.
Structure A Package Chip Lead frame Structure B

Cross section of lead frame

The cross section of lead frame can be seen on the side of the package for structure A.

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Package Outline

(Unit: mm)

14 pin DIP (400mil)


A 0 to 9 8 D C 8 14

5.0

14

10.16

7.0

2.5

5.0

V H 7 7 1

0.5

B' 1. A is the center of the effective image area.

1.0

3.35 0.15

2.6

1.27 3.5 0.3

- 20 7.0 2.5

2. The two points B of the package are the horizontal reference. The point B' of the package is the vertical reference. 3. The bottom C of the package, and the top of the cover glass D are the height reference. 4. The center of the effective image area relative to B and B' is (H, V) = (5.0, 5.0) 0.15mm. 5. The rotation angle of the effective image area relative to H and V is 1.

1.27
M

0.3 0.46

6. The height from the bottom C to the effective image area is 1.41 0.10mm. The height from the top of the cover glass D to the effective image area is 1.94 0.15mm. 7. The tilt of the effective image area relative to the bottom C is less than 25m. The tilt of the effective image area relative to the top D of the cover glass is less than 25m. 8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5. 9. The notch of the package is used only for directional index, that must not be used for reference of fixing.

0.3

PACKAGE STRUCTURE

PACKAGE MATERIAL

Plastic

LEAD TREATMENT

GOLD PLATING

LEAD MATERIAL

42 ALLOY

PACKAGE MASS

0.60g

ICX618ALA

Sony Corporation

DRAWING NUMBER

AS-D3-02(E)

10. Cover glass defect Edge part Length : no matter, Width : less than 0.5mm, Depth : less than the thickness of the glass. Corner part Length : less than 1.5mm, Depth : less than the thickness of the glass.

0.25

1.0 8.9 10.0 0.1

8.9 10.0 0.1

1.7

B 1.7

2.5

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