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    CS F342-11 PDF

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    This document contains a presentation on computer architecture from BITS Pilani, Hyderabad Campus. It discusses computer arithmetic including division of unsigned and signed binary integers. It describes the algorithm for unsigned binary division and provides examples. For signed division, it explains how the remainder is calculated and presents the division algorithm. It also covers floating point representation using mantissa and exponent, normalized floating point numbers, and the IEEE-754 standard for single and double precision floating point formats.

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    CS F342-11 PDF

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    This document contains a presentation on computer architecture from BITS Pilani, Hyderabad Campus. It discusses computer arithmetic including division of unsigned and signed binary integers. It describes the algorithm for unsigned binary division and provides examples. For signed division, it explains how the remainder is calculated and presents the division algorithm. It also covers floating point representation using mantissa and exponent, normalized floating point numbers, and the IEEE-754 standard for single and double precision floating point formats.

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    This document contains a presentation on computer architecture from BITS Pilani, Hyderabad Campus. It discusses computer arithmetic including division of unsigned and signed binary integers. It describes the algorithm for unsigned binary division and provides examples. For signed division, it explains how the remainder is calculated and presents the division algorithm. It also covers floating point representation using mantissa and exponent, normalized floating point numbers, and the IEEE-754 standard for single and double precision floating point formats.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    126 views24 pages

    CS F342-11 PDF

    Uploaded by

    sky_davis
    This document contains a presentation on computer architecture from BITS Pilani, Hyderabad Campus. It discusses computer arithmetic including division of unsigned and signed binary integers. It describes the algorithm for unsigned binary division and provides examples. For signed division, it explains how the remainder is calculated and presents the division algorithm. It also covers floating point representation using mantissa and exponent, normalized floating point numbers, and the IEEE-754 standard for single and double precision floating point formats.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 24

    BITS Pilani presentation

    BITS Pilani
    Hyderabad Campus

    D. Powar Lecturer, BITS-Pilani, Hyderabad Campus

    BITS Pilani
    Hyderabad Campus

    CS F342
    Computer Architecture Lecture -11

    Last lecture review Computer Arithmetic

    9/19/2013

    3
    BITS Pilani, Hyderabad Campus

    Division Unsigned division Signed division

    BITS Pilani, Hyderabad Campus

    Division of Unsigned Binary Integers

    BITS Pilani, Hyderabad Campus

    Flowchart for Unsigned Binary Division

    BITS Pilani, Hyderabad Campus

    Algorithm:
    Bits of dividend are examined from L to R until the set of bits examined represents a number greater than or equal to the divisor
    Until this event occurs, 0s are placed in the quotient When the event occurs, a 1 is placed in the quotient and the divisor is subtracted from the partial dividend This continues in cyclic pattern The process stops when all the bits of dividend are exhausted
    More complex than multiplication

    BITS Pilani, Hyderabad Campus

    Examples:
    Needs operations like Shift, subtract, restore Positive numbers: Q = 0111 (Dividend) M = 0011 (Divisor)

    BITS Pilani, Hyderabad Campus

    Example: Restoring Twos Complement Division (7/3)

    BITS Pilani, Hyderabad Campus

    Signed division

    BITS Pilani, Hyderabad Campus

    How signed division is Different??


    When performing (7)(-3), remainder is 0001, But, when performing (-7)(3) and (-7)(-3) , remainder is 1111. In general

    The remainder is defined by D=Q*V+R, i.e., R = D - Q*V

    Where D = dividend Q = quotient V = divisor R = remainder


    BITS Pilani, Hyderabad Campus

    Division Algorithm for Signed Integers


    1. 2. 3. 4. Convert the operands into unsigned values Compute unsigned division Check the signs of reminder and quotient If negative (reminder or quotient), take 2s compliment of the same

    BITS Pilani, Hyderabad Campus

    Example : (7/-3)

    BITS Pilani, Hyderabad Campus

    MIPS Division
    Use HI/LO registers for result
    HI: 32-bit remainder LO: 32-bit quotient

    Instructions
    div rs, rt / divu rs, rt Ex: div $s0,$t0 No overflow or divide-by-0 checking
    Software must perform checks if required

    Use mfhi, mflo to access result Ex: mfhi $t0 #$t0 <- reminder

    14

    BITS Pilani, Hyderabad Campus

    Floating points arithmetic

    BITS Pilani, Hyderabad Campus

    Floating points representation


    Numbers with fractions Could be done in pure binary 1001.1010 = 24 + 20 + 2-3 +2-1 =9.625 We need a way to represent Numbers with fractions, e.g., 3.1416 Very small numbers,
    Mass of electron: 9.1 X 10-28 gm

    Very large numbers,


    Distance (pluto sun) : 5.9 X 1012 m

    BITS Pilani, Hyderabad Campus

    Floating Point
    m x re
    m : mantissa r : radix [ can be 2,8,16,10] e : exponent

    The number 537.25 is represented in a register with m = 53725 and e = 3 Interpreted as .53725x103 Point is actually fixed between sign bit and body of mantissa Exponent indicates place value (point position)
    BITS Pilani, Hyderabad Campus

    Exponent representation: Exponent can be represented in Signed magnitude, Signed 2s complement, Signed 1s complement or biased form. Biased representation:
    In this representation the sign bit is removed from being a separate entity. Bias is a +ve number that is added to each exponent as the floating point number is formed, so that internally all exponent are +ve.

    Biased representation is used in many computers.


    BITS Pilani, Hyderabad Campus

    Consider an exponent that ranges from -50 to 49. Internally, it is represented by two digits (without sign) by adding to it a bias of 50. The exponent register contains the no. e+50, where e is the actual exponent.

    BITS Pilani, Hyderabad Campus

    Normalization
    To simplify operations on floating-point numbers, it is typically required that they have to be normalized. A normalized number is one in which the most significant digit of the significand is nonzero Floating Point numbers are usually normalized i.e. exponent is adjusted so that leading bit (MSB) of mantissa is non zero. Ex: .0001580x102 (Normalized number is : 0.1580x10-1) Ex: 0.000123 (Normalized number is : 0.123x10-3), here ".123" is called a normalized mantissa, "-3" is called the exponent.

    BITS Pilani, Hyderabad Campus

    Normalization
    For binary numbers, a normalized number is therefore one in which the most significant bit of the significand is one. The typical convention is that there is one bit to the left of the radix point. Thus, a normalized nonzero number is one in the form: Because the most significant bit is always one, it is unnecessary to store this bit; rather, it is implicit Zero cannot be normalized
    BITS Pilani, Hyderabad Campus

    IEEE-754 Floating Point Numbers

    The leftmost bit stores the sign of the number (1:negative, 0:positive)

    BITS Pilani, Hyderabad Campus

    Single precision
    Bias equals, where k: no: of bits in exponent The range of true exponent values are: -126 to 127 The final portion is significand /mantissa

    BITS Pilani, Hyderabad Campus

    Examples: 32 bit (SP)

    BITS Pilani, Hyderabad Campus

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