XMP1 System Description R5.5 PDF
XMP1 System Description R5.5 PDF
XMP1 System Description R5.5 PDF
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FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Frame Structure and Synchronization
Page 2-4 Proprietary Information Aastra
2.2 Frame Structure and Synchronization
2.2.1 Frame structure
In the time-division multiplex procedure, the analog signals to be
transmitted are first sampled, quantized and encoded. These analog
signals are telephone signals (limited from 300 Hz to 3400 Hz) which are
sampled at a rate of f
A
=8000 Hz, i.e. the amplitude of the analog signal is
sampled once every 125 s.
The sampling results are quantized and encoded to form 8-bit words. This
pulse code modulation (PCM) has a bit rate of 64 kbit/s. Since the
bandwidth of the transmission paths is considerably wider than that required
for this bit rate, several PCM signals can be combined to a PCM multiplex
signal of a higher bit rate. The encoded sampling values of the different
input signals are thus transmitted one after the other.
The XMP1 system is appropriate for handling signals of both KZU and DSK
modules.
It combines 30 x 64 kbit/s digital signals (channels) +2 kbit/s or
31 x 64 kbit/s digital signals to one PCM 2.048 Mbit/s multiplex signal on the
ports.
Each 125 s frame transmits 32 channels, 8 bits being allocated to each of
them.
30 (31) of these 32 channels available are used for transmitting traffic
information. Two channels are required for transmitting the frame alignment
signal or service digits and signalling information.
The first time slot (time slot 0) of the frame includes the frame alignment
signal and service digits by turns. The frame alignment signal is required for
synchronizing the transmit and receive sections of the PCM transmission
system. The service digits include information on fault conditions and bit
error ratios.
The signalling information is transmitted in time slot 16 of each pulse frame.
It includes the signalling pulses for two voice channels. Thus, 15 frames are
required for transmitting the signalling information of all voice channels. A
total of 16 frames are combined to one multiframe, the additional frame
available being required for transmitting the multiframe alignment signal
and service digits.
The multiframe has a duration of 16 x 125 s =2 ms.
The pulse frame is in compliance with ITU-T Rec. G.704.
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Frame structure
Aastra Proprietary Information Page 2-5
Frame
Frame alignment signal
The frame alignment signal required for synchronization is transmitted in
time slot 0 of every other frame.
Bit X in position 1 is used for transmitting the CRC4 bits.
If the CRC4 procedure is not applied, bit X is set to logic 1.
The bits in positions 2 to 8 define the binary values of the synchronization
pattern.
Table 2.A: Frame alignment signal
Bit position 1 2 3 4 5 6 7 8
Binary value X 0 0 1 1 0 1 1
Channel no.
Time slot
Signalling information Frame alignment signal
8 bit / 3.9s
30 31 0 1
29 30 1
15 16 17 18
Pulse frame
Multiframe structure
256 bit / 125s
Channel information
256 bit / 125s
Service digits
x 1 N Y Y Y D i i i i i i i i
16 Time slot 16
Frame 14 Frame 15 Frame 1 Frame 3 Frame 2 Frame 0
2 ms
125s
a b c d a b c d
0 0 0 0 1 0 1 1 a b c d a b c d
29 30 1 2 3 4
30 31 0 1 2 3 4
X 0 0 0 1 1 1 1 a b c d a b c d
15 1617
1516 1718
2930
30 31 0 1 2
Signalling
15 311617 1 2
Figure 2.2: Frame structure
Frame alignm. signal for
Voice channel 15 Voice channel 30
Frame alignm. signal for
Voice channel 1 Voice channel 16
Multiframe
service
digits
Multiframe
alignment
signal
16 16
16
16
information
Y
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Frame structure
Page 2-6 Proprietary Information Aastra
Service digits
The service digits are transmitted in the frames which do not include the
frame alignment signal.
Bit X in position 1 is used for transmitting the CRC4 multiframe alignment
signal. If the CRC4 procedure is not applied, bit X is set to logic 1.
The bit in position 2 is set to logic 1 in order to avoid that the service digits
can pretend to include a frame alignment signal.
Bit D in position 3 is required for signalling an urgent alarm (alarm =1).
Bit N in position 4 is used to signal a non-urgent alarm (alarm status =1).
The Y-bits (Sa bit) in positions 5 to 8 are used as system channel and control
channel for network configuration and network surveillance.
The Y- bit (Sa bit) in position 5 is required to control the clock priorities in an
XMP1 network.
The Y-bits (Sa bit) in positions 7 and 8 are used to transmit the system
channel.
XMP1 permits the Y-bits (positions 5 to 8) to be re-routed via traffic channel
29. In this case, they can be used to transmit the system channel of
third-party units.
Multiframe
Signalling transmission
The signalling information for the 30 channels available on each port is
digitized on the channel modules and transmitted in time slot 16.
The multiframe includes sixteen 8-bit signals which are transmitted in time
slots 16 of the multiframe. The duration of the multiframe is 2 ms, i.e. it is 16
times longer than a single multiplex frame. The 16 frames included in a
multiframe are numbered from 0 to 15.
Frame 0
In frame 0 of the multiframe, the multiframe alignment signal (4 bits) is
transmitted in bit positions 1 to 4, whereas the multiframe service digits (4
bits) are transmitted in positions 5 to 8.
Table 2.B: Service digits
Bit position 1 2 3 4 5 6 7 8
Binary value X 1 D N Y Y Y Y
Table 2.C: Frame 0
Bit position 1 2 3 4 5 6 7 8
Binary value 0 0 0 0 Y Dk Y Y
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Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Frame structure
Aastra Proprietary Information Page 2-7
Frames 1 to 15
Frames 1 to 15 transmit the signalling information of the 30 individual
channels
(4 bits per channel). In these frames, the frame alignment signals for traffic
channels 1 to 15 are transmitted in positions 1 to 4, those for traffic channels
16 to 30 in positions 5 to 8.
The following table shows the allocation of the individual frames to traffic
channel signalling.
Table 2.D: Frames 1 to 15
Position 1 2 3 4 5 6 7 8
Bit designation a b c d a b c d
Signalling for traffic channel n n+15
Table 2.E: Allocation of the individual frames to traffic channel signalling
Frame Signalling for traffic channel
1 1 and 16
2 2 and 17
3 3 and 18
4 4 and 19
5 5 and 20
6 6 and 21
7 7 and 22
8 8 and 23
9 9 and 24
10 10 and 25
11 11 and 26
12 12 and 27
13 13 and 28
14 14 and 29
15 15 and 30
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
CRC4 procedure
Page 2-8 Proprietary Information Aastra
2.2.2 CRC4 procedure
The CRC4 procedure (CRC=cyclic redundancy check) is used
to avoid malsynchronization due to pretended synchronization
patterns (pretended frame alignment signals)
and to detect even low bit error ratios (BER =10
-6
).
The so-called CRC4 signature consists of four bits referred to as C1, C2, C3
and C4. These four bits are determined using the CRC4 algorithm.
CRC4 algorithm
The four bits C1, C2, C3 and C4 of the CRC4 signature are calculated over
a data block of 8 frame lengths (2048 bits) using the CRC4 algorithm and
are transmitted in the next multiframe.
In this calculation, the data block is considered as polynomial in x, the
coefficients of which can assume the values 0 or 1.
The first data bit corresponds to the coefficient of the highest power in x. The
data block is first multiplied by x4 and then divided by the polynomial x4 +x
+1 (exclusively modulo 2 operations). The remaining value forms the C1,
C2, C3 and C4 signature, C1 being the most significant bit.
Figure 3-3 shows the circuit required for this operation.
Figure 2.3: Circuit for implementing the CRC4 algorithm
All 2048 bits of the multiframe are involved in this operation. Each step
produces a bit combination (C1 to C4). However, the correct CRC4
signature is available at outputs C1 to C4 only after all 2048 bits have been
passed through the circuit.
E E
x
3
C
1
x
2
C
2
x
1
C
3
x
0
C
4
The circuits referred to as x0 to x3 are 1-bit shift registers.
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XMP1 Release 5.5 System Description
CRC4 procedure
Aastra Proprietary Information Page 2-9
CRC4 frame structure
The multiframe for the cyclic redundancy check (CRC) is composed of
16 frames. This multiframe is divided into section I and section II, each
being composed of 8 frames. Thus, one multiframe section includes 2048
bits. It forms one block for the redundancy check.
Figure 3-4 below gives a detailed overview of the CRC4 multiframe.
Bit X in position 1 of the frame alignment signal is used to transmit the CRC4
signature (C1, C2, C3 and C4). The four CRC bits are transmitted serially in
this position. Thus, four (4) frame alignment signals are required for
transmitting one CRC4 signature.
Bit X in position 1 of the service digits is used to transmit a CRC4 multiframe
alignment signal.
SiI , Si I I : Signalling bits for multiframe sections I and I I .
D: Service digit, urgent alarm
N: Service digit, non urgent alarm
Y: Control and signalling bit
C1, C2, C3 and C4: 4 CRC-bits (Cyclic Redundancy Check)
RKW: Frame alignment signal
MW: Service digits
Figure 2.4: CRC4 frame structure
Table 2.F: CRC4 frame structure
Multiframe Frame
Bits 1 to 8 of time slot 0 of a frame
1 2 3 4 5 6 7 8
C
R
C
4
m
u
l
t
i
f
r
a
m
e
I
0 C1 0 0 1 1 0 1 1 RKW
1 0 1 D N Y5 Y6 Y7 Y8 MW
2 C2 0 0 1 1 0 1 1 RKW
3 0 1 D N Y5 Y6 Y7 Y8 MW
4 C3 0 0 1 1 0 1 1 RKW
5 1 1 D N Y5 Y6 Y7 Y8 MW
6 C4 0 0 1 1 0 1 1 RKW
7 0 1 D N Y5 Y6 Y7 Y8 MW
II
8 C1 0 0 1 1 0 1 1 RKW
9 1 1 D N Y5 Y6 Y7 Y8 MW
10 C2 0 0 1 1 0 1 1 RKW
11 1 1 D N Y5 Y6 Y7 Y8 MW
12 C3 0 0 1 1 0 1 1 RKW
13 SiI 1 D N Y5 Y6 Y7 Y8 MW
14 C4 0 0 1 1 0 1 1 RKW
15 SiII 1 D N Y5 Y6 Y7 Y8 MW
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Synchronization
Page 2-10 Proprietary Information Aastra
Transmission and evaluation of the CRC4 signature
The calculated CRC4 signature is stored before it is sent to the receive side
via the next multiframe section. The CRC4 signature bits C1 to C4 are
transmitted in bit positions 1 of the frame alignment signals of the frames 0,
2, 4, 6 and 8, 10, 12, 14 respectively.
On the receive side, the CRC4 signature is calculated from the received bit
stream and compared with the CRC4 signature received in the next
multiframe. If these signatures are not identical, at least one bit error has
occurred in the multiframe section concerned.
All CRC4 signature errors detected are permanently counted and added up.
If more than 914 such errors occur in one second, the frame must be
resynchronized.
This signature comparison is no longer performed on loss of sync of the
frame or CRC4 multiframe.
2.2.3 Synchronization
Frame alignment
Frame alignment is performed using the synchronization pattern (bits 2 to 8
of the frame alignment signal, bit 2 of the service digits) or optionally using
the multiframe and/or CRC4 procedure.
The synchronization process starts with the search for the frame alignment
signal (bits 2 to bit 8) in the receive frame. As soon as the frame alignment
signal has been found, it is checked whether bit 2 of the service digits
contained in the next frame is logic 1. If this is the case and if the frame
alignment signal is identified again in the following frame, the frame
synchronization process is terminated.
Synchronization to the multiframe is terminated as soon as the multiframe
alignment signal has been correctly received in frame 0 and no other
multiframe alignment signal is detected in the following 15 frames (1 to 15).
In order to avoid that the absence of the frame alignment signal (continuous
0) pretends a "multiframe in sync" status, one or several frames (1 to 15)
are additionally monitored for the presence of bits with the binary value 1. If
no such bits can be found, the multiframe is out of sync.
Persistence check
In order to avoid bit errors on the transmission link, a persistence check is
performed, i.e. the information of the individual signalling bits (continuous
"0") transmitted in the signalling channel of two consecutive multiframes is
compared. A change of the information value is accepted and passed on to
the signal processing circuit only when both values are identical.
As soon as the signalling converter receives a wrong multiframe alignment
signal, changes of the information status of the individual signalling bits are
not evaluated until the multiframe alignment signal has been received again
correctly, i.e. the multiframe is again in sync.
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Synchronization
Aastra Proprietary Information Page 2-11
Loss of sync
When the frame alignment signal has been received incorrectly three times
in a row, the frame alignment process is reinitiated. The evaluation can also
involve bit 2 of the service digits, i.e. if this bit has been received as logic "0"
three consecutive times, the frame is considered to be out of sync.
Frame realignment
If the frame alignment signal has been identified for the first time and bit 2
of the following frame 0, i.e. one frame duration later, is logic 1, and the
frame alignment signal is found again in the next frame, the synchronization
process is terminated successfully.
If during the synchronization process
- the frame alignment signal has been identified for the first time and one
frame length later,
- if binary value 0 has been identified in time slot 0 of bit position 2, or
- if the frame alignment signal has been identified for the first time and
cannot be found again two frame lengths later, a new synchronization
process will be initiated two frame lengths after having identified the frame
alignment signal for the first time.
Frame alignment using the CRC4 procedure
When using the CRC4 procedure, frame alignment is performed as follows:
Synchronization to the frame alignment signal of the frame
Synchronization to the frame alignment signal of the CRC4 multiframe.
While the system is in sync, the frame alignment is permanently monitored
and faults detected during the CRC4 signature comparison are counted.
If frame alignment gets lost or if more than 914 CRC4 errors are counted
within one second, a new synchronization process is initiated.
This latter is started by searching for the frame alignment signal.
As soon as it has been found, it is checked whether bit 2 of the service digits
occurring in the next frame is logic "1".
In this case and if the frame alignment signal is identified again one frame
length later, the frame alignment process is terminated successfully.
Now the system searches for the CRC4 multiframe alignment signal.
Sixteen frames (2 ms) are required for transmitting the latter. It is checked
within an interval of 8 ms, whether at least two CRC4 multiframe alignment
signals can be identified in the 2 ms pattern. If not, the synchronization
process will be restarted. This procedure prevents the system from being
synchronized to incorrectly pretended frame alignment signals or service
digits.
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Synchronization
Page 2-12 Proprietary Information Aastra
2 Mbit/s signal at F1out
Figure 2.5: Synchronization procedure
CRC4 procedure
Code conversion
binary/HDB3
Tx multiframe
phase
adaptation
Multiframe
alignment
CRC4 multiframe
alignment
Frame alignment
Phase adaptation
to the Tx frame
Code conversion
HDB3/binary
Bit
synchronization
Bus line
Tx frame
2 Mbit/s signal at F1in
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Clock Supply
Aastra Proprietary Information Page 2-13
2.3 Clock Supply
The PCM network represents a synchronous network. In such a network, a
network node can supply the network clock. If this network clock source
fails, another network node must take over network synchronization.
However, it is also possible that individual or all network nodes recover their
clock from T3in or use an Rx clock.
In the standard procedure of the XMP1 system, a network node provides
the clock for all other network nodes (see Section 2.3.3, Clock priority
control ).
To increase clock supply flexibility in the network, the XMP1 system offers
further clock control options:
Separation of clock ranges at different connections
Clock supply regionalization (using debugging functions)
Manual entry of clock trees
Preferred or fixed connection of individual nodes to specified clock
sources
The clock sources available for network synchronization are recorded and
administered by the Network Management software. The Network
Management software also informs the network node on its clock sources
and numbers of its clock priorities.
2.3.1 Clock sources
The following clock sources can be used:
internal clock TINT
external T3in clock
receive clocks of port modules
receive clock of ISDN interfaces
SDH clock
Clock generator 2.048 MHz
A clock generator with a frequency of 2.048 MHz is used as internal source
for system clock supply.
Clock interface T3in
Clock interface T3in can be used to supply the XMP1 Flexible Multiplexer
with the 2048 kHz reference frequency required for synchronous operation.
The input impedance of the T3in interface is >1.6 KOhms s 16 pF. In order
to avoid reflections on the clock line, the input can be terminated with
120 Ohms.
The clock interface T3out (output) is used to connect a reference frequency
distributor.
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Assignment of clock priorities
Page 2-14 Proprietary Information Aastra
The ports of clock interfaces T3in and T3out (T4) are implemented on a
9-pin D-Sub connector (male) of the Central Unit or - with the SDH
expansion - on the the SCU module.
Receive clocks at ports
The 2 Mbit/s signals available at F1 inputs of the ports are used to recover
the receive clock. For this purpose, the ports transmit their F1in sum signal
via the TE clock line to the Central Unit. In doing so, they are controlled by
the clock priority. In the Central Unit, the clock is recovered from this sum
signal and used as system clock.
ISDN clock
In this case, clock recovery takes place using the receive clock of the ISDN
interface (S0 or Uko).
SDH clock T0
For synchronization purposes, the SDH clock made available by the SDH
expansion can also be used. See Section 3.6, Clock Supply .
2.3.2 Assignment of clock priorities
During configuration, each clock source available in an XMP1 network can
be assigned a clock priority. This clock priority assignment takes place using
the clock priority list. A node can have many clock sources which can be
assigned a clock priority.
These clock sources can be the following:
internal clock,
external T3in clock,
recovered receive clocks of the ports (maximally 16)
and ISDN clock.
SDH clock
If the operator does not assign a priority to all internal clock sources, these
will be assigned a clock priority by the system. These priorities will be
counted down from 65534.
All other clock sources without any priority will be automatically assigned
priority 65535 by the system.
Up to 65534 clock priorities can be allocated in a PCM network.
FCD 901 48
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XMP1 Release 5.5 System Description
Clock priority control
Aastra Proprietary Information Page 2-15
2.3.3 Clock priority control
To control clock priorities, the number of the highest clock priority of the
PCM network is sent out.
The clock priority is transmitted in bit Y5 of the service digits.
Each network node continuously polls the Y5 bits of the frame alignment
signal of its ports and verifies as to whether it receives at one of its ports a
clock priority higher than its own highest clock priority.
In this case, it sends out the clock priority received at all ports in the
downward direction.
If the node has a higher priority than the one received, it sends out its own
highest priority at all ports and assumes thus clock control of the PCM
network. The clock priority thus accompanies the clock all the way through
the network.
In case of an interruption of individual connections, the clock source with the
highest priority will be used in the entire network still addressable. If - due
to an interruption - the network is split up into individual isolated
sub-networks, the clock source with the highest priority will be used within
the latter.
The prerequisite for this clock control via the clock priority is that the
connection between two network nodes is clock-transparent. If clock
transparency is not ensured for this connection or for only one direction,
clock priority evaluation must be suppressed at both or at one of the ports.
The clock priority at an XMP1 port must thus be suppressed whenever a
port receives a clock different from that injected into the far-end XMP1 port.
This evaluation of the clock priority at F1in of a port can be suppressed. This
is possible via info no. 10 of the decentral card slot data of the port modules.
If this info is set to "1", the Y5 bit available at this port is no longer evaluated
as described above. Also see Section 2.3.6.8, Suppressing the clock
priority (at F1in) .
Figure 2.6: Clock distribution
FCD 901 48
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XMP1 Release 5.5 System Description
Clock priority control
Page 2-16 Proprietary Information Aastra
Port 1
Port 2
Port 16
T3in
2048 kHz
T
INT
2048 kHz
PLL
Central Unit
T3out
System clock
Rx
clock 1
Rx
clock 2
Rx
clock 16
F1in
F1in
F1in
T3in
ISDN
UK0Q
TE
Tin
T3in
S0
SDH clock T0
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XMP1 Release 5.5 System Description
Clock switchover
Aastra Proprietary Information Page 2-17
2.3.4 Clock switchover
The internal clock of a node run at a reference clock such as the T3in clock
or the Rx clock of a port is digitally detuned to the frequency of this reference
clock. In doing this, a resolution of 1/8 Hz is achieved.
If the reference clock fails, the node switches over to the detuned internal
node clock.
After switchover, the detuning of the internal clock is eliminated in individual
steps until it runs again using its own frequency and precision.
FCD 901 48
Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Clock control for co-channel radio operation
Page 2-18 Proprietary Information Aastra
2.3.5 Clock control for co-channel radio operation
For transmitting co-channel radio signals or ripple control signals, a
constant delay time is required for the corresponding channels.
For this purpose, the delays in the elastic memories of the ports must be
kept constant. This is achieved by linking the transmit frame of the network
node phase-rigidly to the receive frame of the ports to be used for
transmitting co-channel radio signals.
In a network node, not only the frequency but also the phase position of the
transmit frame to the port providing the clock is controlled in such a way that
even after signal interruptions or voltage failures, the initial phase relation is
restored. Thus, the required constant delay time is achieved due to the
constant phase relation.
With a stable network status, the phase positions of all ports concerned are
measured in relation to the transmit frame and stored in the node. If in case
of later network failures, the clock is recovered from another port, the initial
phase relation can nevertheless be restored.
Note:
In the initial version (prior to 1995), only one clock tree to be permanently
configured by the user was possible in phase rigid operation (clock priority
0).
Figure 2.7: Clock control in co-channel radio transmission
SYN
SYN
GWF
port
Node 1 Node 2
SYN
Node 3
Co-channel radio
transmission (GWF)
Co-channel
radio transm.
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XMP1 Release 5.5 System Description
Clock configuration in the XMP1 network
Aastra Proprietary Information Page 2-19
2.3.6 Clock configuration in the XMP1 network
Settings regarding the configuration of clock control in the XMP1 network
are performed via the clock priority list and central or decentral card slot
data of the modules.
Clock control settings via the central or decentral card slot data are
executed for the Central Units and port modules.
2.3.6.1 Central Units
Central card slot data
The following table gives an overview of the info nos. of the central card slot
data that can be used for clock control.
2.3.6.2 Port modules
Decentral card slot data
With port modules, the settings for clock control are performed using the
info nos. of the decentral card slot data.
These info nos. are listed in the following table.
2.3.6.3 Preferring local clock sources
A network node can have clock sources distinguishing themselves by their
high precision and reliability. However, it is possible that these clock sources
are nevertheless not used for clock recovery in the network, because they
have been assigned such a low priority that they are never used for clock
recovery.
Tab. 2.G: Central card slot information - Central units
Info no. Description Default value
2 Prefer local clock sources yes =1 0
3 Reserve priority 2 for preferred clock treeyes =1 0
4 Node phase-rigid w/o co-ch. radio port yes =1 0
5 Switch off T3out when port is faulty yes =1 0
6 Recover T3out from Rx clock yes =1 0
9 Operation with preferred clock priorities yes =1 0
10 Wander filter yes =1 0
Tab. 2.H: Decentral card slot data - Port modules
Info no. Description Default value
10 Suppress clock priority (F1in) yes =1 0
12 Preferred port for priority 1 yes =1 0
14 Short delay time in linear networks yes =1 0
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Wander filter
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In order to use such clock sources for clock recovery in the local node, the
latter can be configured via the central card slot data (info no. 2) in such a
way that the local clock sources (T3in or ports with configured clock priority)
of this node are preferred.
With this configuration, the node then uses the configured local clocks
according to their clock priority. The clock priority received at the ports in bit
Y5 is not evaluated.
Only if these local clock sources have failed, clock priorities possibly
received at other ports in the service digits are used for clock control.
For this purpose, info no. 2 must be set to "1" in the central card slot data of
the Central Unit.
2.3.6.4 Wander filter
If several HDSL links are switched in series, the low-frequency jitter
(wander)) caused by the HDSL units can be reduced by setting info no. 10
to "1". The wander reduction, however, leads to an increased phase noise,
i.e. high-frequency jitter, which is filtered out again in the next node.
2.3.6.5 Using T3out
For the clock supply of external units, the Central Unit provides a clock
interface T3out. This T3out clock is distributed via the X6 connector of the
Central Unit. With the default setting, the system clock of the node is
provided under all operating conditions.
In case of failures, e.g. BER 10-3, loss of sync etc. at the port from which
the receive clock is recovered, the T3out clock can be switched off.
For this purpose, the following settings are possible in the Central Unit
(central card slot data) of the node:
Info no. 6:
Recover T3out from receive clock.
Info no. 5:
Switch off T3out in case of a port failure.
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Delay time reduction in linear networks
Aastra Proprietary Information Page 2-21
2.3.6.6 Delay time reduction in linear networks
In linear networks, the delay time of the port can be reduced by about 60 s
compared with the statistical average value.
This setting is made in the decentral card slot data of the ports using info
no. 14 "Short delay time in a linear network".
However, this function is also possible on line sections in meshed networks
or star networks. With short delay times adjusted, line breaks or clock
source switchovers will first lead to an increased number of frame slips
before the most favorable phase position for short delay times is achieved.
For this reason, this delay time reduction option should be enabled only if
required.
In nodes where lines from at least three directions are received and meshes
are therefore formed, this function is not recommended. In this case, the
network becomes relatively sensitive to jitter and clock switchovers and an
increased number of frame slips have to be expected.
This function should be activated only in conjunction with the following
Central Units.
The Central Units offer a hardware considerably improved for this function.
On all other Central Units, processes are much more complex so that the
use of the described function is not recommended.
Tab. 2.I: Central Units for delay time reduction
Central Unit CC/QD2 62.7040.310.00-A001 AN00102460
Central Unit CC 62.7040.320.00-A001 AN00102461
Central Unit GN 62.7040.330.00-A001 AN00102462
Central Unit GN/QD2 62.7040.355.00-A001 AN00239607
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Configuring a clock tree with preferred priority
Page 2-22 Proprietary Information Aastra
2.3.6.7 Configuring a clock tree with preferred priority
Preferred port for priority 1
To switch off the automatic clock tree assignment function, it is possible to
define a preferred port in XMP1 nodes.
In order to ensure that a fixed path is observed for setting up the clock tree
in a fully operational network, any port can be selected and configured as
preferred port for priority 1.
In this case, only Y5-bit evaluation at the preferred port is used in this node
for clock control. The Y5-bits of all other ports in the node are no longer
taken into consideration.
In the root node of the clock tree, clock priority 1 is therefore selected from
the clock priority list to achieve a secure clock such as the T3in clock.
In all other nodes of the clock tree, the ports used as preferred ports for
clock priority 1 are configured via info no. 12 of the decentral card slot data.
Simultaneously, clock priority 2 must be reserved. When making the
configuration using SOX, clock priority 2 is simply not assigned in the entire
network. See Fig. 2.8.
In the example shown below, node 1 is the clock master with priority 1 for
T3in. The Tint clock in node 3 is assigned clock priority 2.
Figure 2.8: Clock transmission with preferred clock priority 1: normal oper-
ation
Loss of signal at a preferred port
If the 2 Mbit/s signal fails at the preferred port 1 of node 2, the Y5-bit
available at port P3 will be evaluated in node 3. Since clock priority 1 is also
being received at this port, clock priority 1 is still valid for node 3. Since,
however, clock priority 1 is now evaluated at a port not defined as preferred
port, not clock priority 1 is passed on, but the reserved clock priority 2 is
injected. This indicates that the clock is currently not spreaded in the
defined preferred clock tree. See Fig. 2.9.
Node
T3in=Priority 1
VP
P3
P2
P1
P2 P2
P1 P1 P3
Tint=Prio.2
TP1 TP1
TP1 TP1
"1"
"1"
VP
Node 2:
Port: dec. info no. 12 =yes
Node 3:
Port: dec. info no. =yes
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Note: If clock priority 1 was still passed on by node 3, it could
arrive at port P1 in node 3 via node 2. This would lead to a clock
loop and clock recovery in node 3 would continuously switch over
between port P1 and P3.
However, node 2 now receives clock priority 2 at ports P2 and P3. Since this
clock priority is higher than a clock priority possibly adjusted in node 2 (clock
priority 2 has been reserved), the clock is recovered from one of the ports
P2 or P3.
Node 2 now also sends out clock priority 2 in the downstream direction. In
node 3, clock priority 2 is now being received at preferred port P1.
However, since node 3 receives clock priority 1 at port P3, the clock is
continued to be recovered from port P3. The formation of a clock loop is
thus prevented.
Figure 2.9: Clock transmission with preferred clock priority 1: Signal loss at
port 1 in node 2
Priority 1 clock failure
If the priority 1 clock fails in node 1, clock control in the network is performed
with the clock priority > 3 assigned in the clock priority list, since clock
priority 2 has been reserved.
Node 1 Node 2 Node 3
T3in=Priority 1
VP "1"
VP VP
P3
P2
P1
P2 P2
P1 P1
P3
TP1
TP2
TP2
TP2
Clock priority 2 reserved. No clock loop.
"1" "1"
Tint=Prio.2
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Suppressing the clock priority (at F1in)
Page 2-24 Proprietary Information Aastra
2.3.6.8 Suppressing the clock priority (at F1in)
Using info no. 10 it is possible to suppress the evaluation of the clock priority
at F1in of the port interface.
Info no. 10 = 0:
The clock priority is evaluated at F1in of the port interface (default setting).
Info no. 10 = 1:
The clock priority is not evaluated at F1in of the port interface.
Example 1
The following example shows an application with the clock priority being
suppressed at F1in.
In this example, transmission between the two XMP1 nodes takes place via
a third-party unit (e.g. PCM FXE). The system channel is re-routed via
channel 29.
Thus, the clock priority is also transmitted in channel 29.
Thus, for passing the third-party unit, info no. 10 must be set to "1" for the
port from which the third-party unit recovers the clock.
In case of a drop including a PCM30 FXE unit, this is normally port 1.
Figure 2.10: Suppressing the clock priority (at F1in)
T3in =Priority 1
XMP1 node 1 Third-party node 2 XMP1 node 3
P1
FXE
XMP1 node 1:
System channel re-routed via
Clock priority suppressed at F1in.
Third-party node 2:
Fixed clock recovery at port 1
FXE
P1
P1
P3 P1 P3
channel 29
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Example 2:
In the following example, transmission between XMP1 nodes 1 and 2 takes
place via two SDH multiplexers. In these multiplexers, a retiming process is
performed for the 2 Mbit/s signal. Thus, XMP1 node 2 receives a clock
different from the one supplied by XMP1 node 1. This also applies to XMP1
node 1. For this reason, the clock priority at F1in must be suppressed at the
port of XMP1 node 1 and 2 using info no. 10.
XMP1 node 1
XMP1 node 2
SDH multiplexer 1
SDH multiplexer 2
P
o
r
t
P
o
r
t
Port
P
o
r
t
Retiming
Info no. 10: "1"
2 Mbit/s
2 Mbit/s
STM-1
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Regionalization of clock synchronization
Page 2-26 Proprietary Information Aastra
2.3.6.9 Regionalization of clock synchronization
In order to enable a preferred clock connection of nodes to nearby clock
sources, a list of clock priority nos. can be defined for each node. In this
case, the node uses the clock priorities contained in the list for clock control,
irrespective of the highest clock priority identified by the node.
Central card slot info no. 9 of the Central Unit in the corresponding node
must be set to "Operation with preferred clock priorities".
In order to ensure a high flexibility, up to three stages can be configured.
These stages are defined in lists (list 1, 2 and 3), list 1 having the highest
priority.
By entering a list in a node, all lower-priority lists existing in this node will be
deleted. On entry of a "pseudo-list 0", all lists available in the node will be
deleted.
Example:
On entry of a list 1 in the node, all lists 2 and 3 already existing in the
corresponding node will be deleted. These lists must then be re-entered, if
required.
The nodes first use the clock priorities configured by means of list 1.
Only if a clock priority is not found in list 1, the clock priorities contained in
list 2 are taken into consideration.
If in the list configured last, a clock priority is not found, the normal clock
priority control function of the XMP1 network is used.
The clock priority list is entered via "Online Functions ->Debugging using
Debugging commands and sent out to the node.
Debugging commands can also be used to request these lists.
To change any settings in the node, the write function must be enabled
using the debugging command "#>enable <password><timet>".
Fig. 2.11 shows a network with regional clock priorities and two stages (list
1 and list 2) configured.
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List 1 specifies that clock priorities 10 and 5 are to be preferred as local
clock priorities by nodes 1 to 10 (sub-network 1).
Figure 2.11: Example
List 1 containing the clock priorities 10 and 5 is sent to nodes 1 to 10 by
means of the debugging command (set_vz_tp 1, 10, 5).
For nodes 1 to 10, the central card slot information no. 9 of the Central Units
must be additionally set to "Operation with preferred clock priorities".
These settings ensure that nodes 1 to 10 use the local clock priorities
defined in list 1 for clock control.
In this way, the entire network is divided up into sub-networks by defining
stage-1 lists (list 1) regarding clock priority control.
The 2nd stage (list 2) for nodes 1 to 10 includes the clock priorities (4, 12,
11 and 8) of list 1 of the neighbouring sub-networks 2 and 4.
This list 2 is also sent to nodes 1 to 10 by means of debugging command
(set_vz_tp 2, 4, 12, 11, 8).
For sub-networks 2 to 6, the lists are defined accordingly and sent to the
nodes.
Prio 10
T3in
Prio 5
T3in
Node 1
Node 5
List 2, 4, 12, 11, 8
List 1, 10, 5
Node 2
Node 3
Node.4
Node 6
Node 7
Node 8
Node 9
Node.10
" Sub-network 1"
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Figure 2.12: Regional clock priorities
Prio 10
T3in
Prio 5
T3in
Node 1
Node.5
Prio 4
T3in
Node 11
Node.15
Prio 12
T3in
Node 20
Prio 3
T3in
Node 25
Prio 9
T3in
Node 30
Prio 11
T3in
Node31
Prio. 8
T3in
Node 41
Prio 6
T3in
Node 40
Prio. 1
T3in
Node 50
Prio. 7
T3in
Node 51
Prio. 2
T3in
List 1, 4, 12 List 1, 3, 9
List 1, 2, 7 List 1, 1, 6 List 1, 11, 8
List 2, 4, 12, 11, 8
List 1, 10, 5
List 2, 10, 5, 3, 9, 1, 6 List 2, 4, 12, 2, 7
List 2, 11, 8, 2, 7, 4, 12 List 2, 1, 6, 3, 9
List 2, 1, 6, 5, 10, 4, 12
Node .2
Node 3
Node 4
Node 6
Node 7
Node 8
Node. 9
Node.10
" Sub-network 1" " Sub-network 2" " Sub-network 3"
" Sub-network 4" " Sub-network 5" " Sub-network 6"
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2 Mbit/s Connections
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2.4 2 Mbit/s Connections
The structure of a PCM network is defined by the nodes and the 2 Mbit/s
connections between the individual nodes. Each node available in the
network is assigned a hardware number. This hardware number permits the
node to be addressed within the network. The 2 Mbit/s connections are
switched between two ports.
Figure 2.13: Node links
2.4.1 Setting options for the 2 Mbit/s connection
Signalling channel in time slot 16
If a 2 Mbit/s connection is used to transmit voice signals, time slot 16 of the
pulse frame must be defined as signalling channel.
If only data are transmitted, time slot 16 can be used as additional data
channel 31.
CRC4 procedure
In addition to the frame synchronization process, the CRC4 procedure can
be applied to ensure frame synchronization. Also see Section 2.2.2, CRC4
procedure .
Processing service digits
The system channel is composed of the signal used to control clock priority
and the signal used for communication between the nodes and network
management system, i.e. the ECC8. In normal cases of application, the
system channel is transmitted in the Sa bits carried in time slot TS0 of the
PCM30 frame.
The signal used to control the clock priority in the XMP1 network is
transmitted in the Sa5 bit of the system channel.
Node 1 Node 2
PO4 PO4
1
2
3
4
1
2
3
4
Card slot 15 Card slot 5
1st port 2nd port
2 Mbit/s link
Node no.: 1
Card slot: 15
Port no.: 3
Node no.: 2
Card slot: 5
Port no.: 4
2 Mbit/s link
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The ECC8 is transmitted in the Sa7 and Sa8 bits of the system
channel.
The utilization of the ECC8 channel and signal for controlling the clock
priority can be set independently of each other.
System channel transmission can be re-routed from time slot TS0 to time
slot TS30.
Basically, the user can define as to whether the system channel shall be
used or not.
If the system channel is not transmitted in time slot TS0 or if it is not used at
all, traffic data can be transmitted in bits Sa5 to Sa8 carried in time slot TS0.
The following diagram shows the structure of TS0 in the PCM30 frame.
Rerouting the system channel (Bit Sa5 ...Sa8)
The system channel transmitted in time slot 0 can be rerouted via time slot
30 (channel 29). Thus, the Sa bits in TS0 can be made available for
transmitting a third-party system channel.
If the system channel shall be routed via a third-party node, it must also be
rerouted via time slot 30 (channel 29). In the third-party node, you must
ensure that time slot 30 (channel 29) is through-connected for system
channel transmission.
No system channel transmission
The transmission of the system channel in time slot 0 can be switched off.
This is required - for example - for ports to a third-party system if there is no
further downstream XMP1 node.
In this case, bits Sa5. . . Sa8 of time slot 0 can be used to transmit traffic
data. This option is used - for example - for a nx64k connection with the Port
nx64 module. With n=31, the signalling information must be transmitted in
bits Sa5. .Sa8 of TS0.
The designations previously used for signalling information are no longer
used in the SOX software.
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The following table shows the assignment of service digits to functions:
Protection switching configurations
The configuration of node links also includes protection switching options.
The following protection switching processes can be defined:
Line protection switching (port protection switching)
Card protection switching
See also Section 2.7, Protection Switching Configurations .
Tab. 2.J: Service digits
SERVICE
DIGITS
SYSTEM
CHANNEL
IS USED
SIGNAL FOR
CONTROLLING
CLOCK
PRIORITY IS
TRANSMITTED
ECC8 IS
TRANSMITTED
IN SYSTEM
CHANNEL
PAYLOAD IS
TRANSMITTED IN
BITS SA5...SA8 OF
THE OUTGOING
SERVICE DIGITS
NOTE
M_0 yes yes yes no
M_1 yes yes yes yes *
M_2 yes no yes no
3.85 and
higher
M_3 yes yes no no
3.85 and
higher
M_4 no no no no
M_5 no no no yes
M_6 yes no yes yes *
3.85 and
higher
M_7 yes yes no yes *
3.85 and
higher
* System channel transmitted in TS30.
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Circuit Connections
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2.5 Circuit Connections
The 64 kbit/s channel links must be defined within a node.
The following operating modes are possible:
Standard
Polling
Ring polling
Multi-polling
Channel protection switching
In the following description, the terms "converter address" and "port
address" are used.
These terms can be briefly described as follows:
The converter address is defined by the card slot no. of the module and
the converter no. on the module.
12/2 means:
Module in card slot 12 of the XMP1 subrack and converter no. 2 on the
module.
The port address is defined by the card slot, port no. on the module and
PCM channel no..
14/2/10 means:
Port module in card slot 14, port interface 2 on the module and channel no.
10 of the PCM frame.
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Standard operation
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2.5.1 Standard operation
In this operating mode, the 64 kbit/s channel and signalling information
contained in time slot 16 of a port interface are assigned to a converter.
The diagram depicted below shows an example of standard operation.
Figure 2.14: Standard operation, Port <-> converter
In the conversion mode, a channel link is switched between two converters
located in the same node.
The 64 kbit/s signal of converter a is transmitted directly to converter b.
Figure 2.15: Conversion mode, converter <-> converter
Port:
Card slot no.: 15
Port no. : 3
Channel no.: 2
Converter:
Card slot no. :14
Converter no. : 5
PO4
64 kbit/s
Port 1
Port 2
Port 3
Port 4
Node 1
1
2
3
4
5
6
7
8
14/5
Card slot
Subaddress
2 Mbit/s
signals
15/3/2
Subscriber
14/5
15/3/2
Card slot
Subaddress
Channel
14/5
13/4
Node 1
64 kbit/s
Subscriber
Converter b
Card slot no.: 13
Converter no.: 4
Converter a
Card slot no.: 14
Converter no.: 5
Subscriber
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
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Routing ISDN channels in the standard operating mode
64 kbit/s channels for ISDN interfaces are routed in the standard operating
mode. On the ISDN module, the distribution of the 64 kbit/s channels to the
eight converters is implemented by 16 variants which can be adjusted via
the central card slot data of the ISDN module.
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Polling
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2.5.2 Polling
The polling mode permits data transmission between a master station
(polling master) and several sub-stations. Each sub-station monitors the
data transmitted by the polling master (listening). In consequence of a
"request to send" received from the polling master, each sub-station can
communicate with the latter.
Connections between sub-stations are not possible.
Figure 2.16: Polling configuration
The operating mode of the polling master and last sub-station corresponds
to the standard mode, i.e. a channel link is switched between a port and a
converter.
In the last converter of the polling link, info no. 10 "Block VF in case of
incoming b-bit" must be set in the decentral card slot data of the converter.
Note: The KZU FEK module supports the polling operation in the
not extended configuration.
In the sub-stations, port a, port b and the converter are connected via a
channel link.
Setting up a connection between the polling master and a subscriber
1. In the quiescent state, all converters are involved in a port-to-port
connection.
2. The master station wishes the setup of a connection to a sub-station
and goes off-hook. The a-bit is sent out.
3. All sub-stations now receive the incoming a-bit.
Converter
P
Converter
P P
Converter
P P
Converter
P
Node 1 Node 2 Node 3 Node 4
Subscr. 1
Polling master
Polling mode
Subscr. 2
Polling mode
Subscr. 3
Polling mode
Subscr. 4
Last subscriber
Polling mode
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4. The master station sends out the subscriber ID.
5. The calling sub-station detects this ID and answers (off-hook).
The called sub-station sends an outgoing a-bit.
6. The master station receives the a-bit from the called sub-station and
sends the outgoing b-bit.
7. All sub-stations receive the b-bit.
8. There is a connection between the called sub-station and the master
station.
For all other sub-stations, the link is occupied.
Figure 2.17: Polling operation
Converter
10/6
Port
12/1/5
Converter
10/4
Port
11/2/10
Converter
11/6
Port
14/3/5
Port
13/2/10
Ch. 10 Ch. 10 Ch. 5 Ch. 5
Source port
Node 1 Node 2 Node 3
Last subscriber:
Block VF in case of
incoming b-bit
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Ring polling
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2.5.3 Ring polling
The ring polling mode permits data transmission between subscribers
connected to form a ring. In the ring polling mode, all subscribers are equal
in priority, i.e. there is no master station.
Data transmission takes place in a ring into both directions. Thus,
transmission is ensured even if one direction is cut.
Figure 2.18: Ring polling configuration
The subscriber is connected to converter n.
In the "Routing" section, "Ring polling" option must be selected.
In normal operation, i.e. as long as there is no polling requst, all converters
operate in the "Standard" mode. In this case, converter n is connected to
port a and port b.
Subscriber Subscriber Subscriber
Subscriber Subscriber Subscriber
n
Converter Converter Converter
Converter Converter Converter
P P P P P P
P P P P P P
Node 1 Node 2 Node 3
Node 6 Node 5 Node 4
n n
n n n
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Setting up a ring polling connection
1. Subscriber 1 wishes to set up a connection to subscriber 2.
2. All converters are in standard operation (converter - port).
3. Subscriber 1 goes off-hook and transmits bit a in both directions of the
ring.
4. Subscriber x and subscriber 2 receive bit a and set up a port-to-port
connection.
5. The identification of the subscriber to be called is sent out in the ring.
6. Subscriber 2 detects his identification and goes off-hook.
7. Subscriber 2 identifies the a-bit received and his own busy state,
switches to standard operation and transmits his bit b in both directions
of the ring.
8. Subscriber 1 identifies the b-bit. The connection between subscriber 1
and subscriber 2 is set up.
9. All other ring subscribers are now being blocked. Listening to the
64 kbit/s information is no longer possible.
Figure 2.19: Ring polling operation
n n
Node 1
Port a
n
Node 3
14/3/5
Subs.1
Node 2
Port b Port a
Port b
Port a Port b
3/3/5
11/1
13/2/10 10/3/10 11/2/9
1/1
14/1
5/2/9
Subs.2
Subs.3
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Multipolling
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2.5.4 Multipolling
In multipolling operation, which represents a special polling option, several
converters located on one module can be involved in the polling function.
The master station can request the sub-stations involved in multipolling to
send their data. Only one sub-station can transmit data to the master station
at a time.
If several converters of the same module shall participate in multipolling, the
total number of converters concerned must be indicated. The converters
following the one entered as first multipolling converter are defined as
further multipolling converters (sub-stations).
In the last converter of the polling link, info no. 10 "Block VF in case of
incoming b-bit" must be set in the decentral card slot data of the converter.
Note: Multipolling is supported by analog KZU modules with
drawing no. 62.7006.xxx.xx and 62.7026.xxx.xx.
Example: Converter 3 of the module accommodated in card slot 12 is the
first multipolling converter.
Total number of multipolling converters: 3
Converters 3, 4 and 5 are thus defined as multipolling converters on the
module accommodated in card slot 12.
The first multipolling converter on the module located at the beginning of the
multipolling section, is defined as multipolling master automatically (master
station). On this module, only one converter can be defined as multipolling
converter.
Converters not participating in multipolling can be used as normal
converters, polling converters or ring polling converters.
Figure 2.20: Multipolling configuration
Node 1 Node 2 Node 3 Node 4
Converter
Subscr.1
Converter Converter Converter
P P P P P P
Subscr.1 Subscr.2 Subscr.1 Subscr.2 Subscr.1 Subscr.2
Multipolling start
Sub-
station
Sub-
station
Sub-
station
Sub-
station
Sub-
station
Sub-
station
Master
station
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Setting up a connection between the multipolling master and a
subscriber
1. If the polling master wishes to communicate with a sub-station, it
transmits a "request to send" in the 64 kbit/s data stream of the
multipolling section.
2. All subscribers monitor these data.
3. The subscriber addressed by the multipolling master identifies the
request to send and sets up a connection to the latter.
4. The multipolling master identifies the connection to the required
subscriber.
5. The master station and subscriber are connected to each other.
6. The multipolling section is then occupied and blocked for all other
subscribers.
7. The subscriber addressed can now transmit his data to the multipolling
master.
In the following example, a total of six converters are involved in
multipolling.
The end of the multipolling link is located in node 3, the master station in
node 1. The master station is converter 11/1 in node 1.
Figure 2.21: Multipolling configuration
Node 2 Node 3
Port 1 Port 2
11/2/5 5/1/10
2/2/10
Converter 11/1 is the
multipolling master
Node 1
Port a
14/3/5
11/1 10/3 10/4 10/5
Port 1
12/4 12/5
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2.5.5 Single-channel protection switching
Single-channel protection switching is a special ring polling function. This
function permits a protection path to be switched for a converter.
Two channels that can be routed in the network via different paths must
each be switched in the starting and end node to a converter.
Single-channel protection switching is possible for the KZU SUB, KZU EX,
KZU FEK, DSK 64k, DSK V.24, DSK X.21, DSK V.35 and DSK WT
modules.
In the transmit direction, converter n is involved in a channel link between
port a and port b. In the receive direction, converter n is connected to port
a and port b. The subscriber is connected to converter n. The protection
path is switched via port b. "Protection switching" must be entered as
operating mode in the "Circuits" mask.
Note: In the central card slot information of the ports via which
the channel path is routed with single-channel protection
switching, info no. 2 "Interrupt signalling immediately in case of
failure" must be set.
In the example depicted below, converter 11/1 is linked to port 14/3/5. Port
13/2/10 is defined as protection port.
Normal operation:
Port 14/3/5 and port 13/2/10 monitor the data transmitted by converter 11/1.
Transmission is effected via link 1. The converter receives its information
from port 14/3/5.
Protection link:
As soon as link 1 fails, AIS is transmitted in the service digits. Converter
11/1 identifies AIS and switches over immediately to the receive data of port
13/2/10 of the protection link. The receive data are applied to converter 11/5
and are passed on to the subscriber.
Figure 2.22: Single-channel protection switching
Conv.
P
P
n
P
P
Port a
Port b
11/1
Conv.
Port a
Port b
Node 1 Node 2
14/3/5
13/2/10
Subscr.
Subscr.
Link 1
Protection link
FCD 901 48
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Conference Circuits
Page 2-42 Proprietary Information Aastra
2.6 Conference Circuits
2.6.1 Digital conference for data channels
The channel modules permit a digital conference to be switched. In such
a digital conference, several sub-stations (DTE) can be connected to one
main station.
This main station can then exchange data with the sub-stations (DTE). The
identification of the desired DTE takes place via the protocols exchanged
between the main station and the DTE.
In the receive direction, each sub-station (DTE) receives the signal sent by
the main station. In the transmit direction, the signals from the sub-stations
are linked via an AND gate in the digital conference circuit and are then
transmitted to the main station.
In the quiescent state, the signal is logic "1".
Each logic "0" is transmitted to the main station.
On one module, a maximum of 7 converter signals can be involved in a
digital conference. This number is reduced by the number of interfaces
connected.
Converters not participating in the digital conference can be used for other
applications.
When a digital conference is switched, converter 1 is not available for other
applications.
The alarms of converters n and converter 1 involved in the digital
conference must be suppressed.
Figure 2.23: Block diagram of a digital conference
Main station
Sub-station 1
DTE DTE DTE
Sub-station n Sub-station 2
P
o
r
t
DSK
P
o
r
t
P
o
r
t
P
o
r
t
P
o
r
t
2 Mbit/s 2 Mbit/s
DSK DSK
Node 1
Node 2
Node 3
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Digital conference for data channels
Aastra Proprietary Information Page 2-43
The following diagram shows an example of a digital conference.
Figure 2.24: Digital conference
Configuring a digital conference
See Figure 4-26.
The DTE of sub-station 1 in node 2 must be connected to interface 5 of the
DSK module.
Using the "STANDARD" function, converter 5 of this interface must be
connected to another converter (converter 6 n the above example) of the
module.
In the central card slot data of the module, this converter 6 must be defined
as "Digital conference converter 6". Converter 6 then sends its data via the
AND link to converter 1 of the module and thus to the main station.
Converter 1 of the module receives the main station signals and passes
them on to the other sub-stations. In the transmit direction, this converter 1
is used to send the signals from the sub-stations to the main station.
There is a channel link between converter 1 and channel 6 of port 1. The 2
Mbit/s connection is used to transmit channel 6 to node 1.
In node 1, there is a channel link between channel 6/port2 and converter 4
of the DSK module. The main station is connected to interface 4 of the DSK
module.
Channels from another node, e.g. channel 9 / port 2, are applied to a
converter available on the module by means of the "STANDARD" operating
mode. In the example described, channel 9 is applied to converter 4.
Converter 4 must be defined as "Digital conference converter 4" in the
central card slot data.
DSK
P
o
r
t
P
o
r
t
P
o
r
t
DSK
P
o
r
t
P
o
r
t
DSK
P
o
r
t
P
o
r
t
P
o
r
t
P
o
r
t
Main station
Port
DSK DSK
to further
nodes
DTE DTE DTE DTE
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Digital conference for data channels
Page 2-44 Proprietary Information Aastra
Figure 2.25: Example of a digital conference
Node 2
Conv.
DSK V.24
1 3 5 6 78 4 2
Channel 6
Channel 9
IF
IF 5
S
Port 2 Port 1
1 3 5 6 78 4 2
to node 4
Conv.
DSK V.24
1 3 5 6 78 4 2
Channel 6
IF
Port 2
1 3 5 6 78 4 2
Knoten 1
Main station
DTE
Sub-station 1
Node 1
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Expanded Digital Conference
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2.6.2 Expanded Digital Conference
Using the "Expanded Digital Conference", several subscribers of an XMP1
network can be interconnected to form a conference. The subscriber
signals are transmitted in a 64 kbit/s channel via the 2 Mbit/s links of the
XMP1 network.
The interfaces/converters of a module involved in an EDC are all equal in
priority. The transmit data of each subscriber connected to an
interface/converter are forwarded to all other subscribers participating in the
EDC. Communication is symmetrical and the behaviour corresponds to that
of a subscriber connected to a two-wire bus. For this reason, only
half-duplex operation is possible.
In an "Expanded Digital Conference", a terminating unit connected to an
interface can act as Master. All other terminating units of this EDC are then
used as Slaves. However, this definition is not implemented in the XMP1
system. The Operator himself must define as to which terminating unit shall
act as Master or Slave.
The signals supplied by the terminating units are passed through the XMP1
system transparently. The information determined for the individual
terminating units must be defined by the latter at protocol level.
In the XMP1 system, the "Expanded Digital Conference" is supported by the
following modules (with DIX-ASIC):
DSK modular MDG
DSK modular MDV
DIX QD2ZT add-on
2.6.2.1 8-subscriber/2 x 4-subscriber conference
To ensure a flexible application of the EDC in the network, two different
conferences, i.e. the 8-subscriber and 2 x 4-subscriber conference, can be
configured.
The configuration necessary for this purpose is performed via the central
card slot data of the module.
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8-subscriber/2 x 4-subscriber conference
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8-subscriber conference
In case of the 8-subscriber conference, all 8 sub-addresses available on
a module can be used for one EDC. The connected subscribers are all
involved in one conference.
2 x 4-subscriber conference
If the 2 x 4-subscriber conference mode is adjusted for a module, two
groups of
4 sub-addresses of the corresponding module can be assigned to different
conferences. Thus, subscribers involved in two separate conferences can
be connected to one module.
With this setting, please note the following assignment of sub-addresses:
Conference 1: uses sub-addresses 1 to 4
Conference 2: uses sub-addresses 5 to 8
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Node 1
Card slot 5
8-subscr. conference
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Node 1
Card slot 5
2 x 4-subscriber conference
Conference A Conference B
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2.6.2.2 Use of sub-addresses
If not all sub-addresses of a module are used for the EDC, please note the
following:
If neither the converter nor interface side of a sub-address is involved
in the conference, the corresponding channel can be used for normal
operation.
If only the converter side or interface side of a sub-address is involved
in the conference, the side not involved cannot be used.
In an "Expanded Digital Conference", the 8-subscriber or 2 x 4-subscriber
conference option can be used for connecting the subscribers.
Note: If only the converter side of a module is involved in a
conference, the signal FRSTQ must be tied to 0 V. Thus the
module is registered in the system.
2.6.2.3 Conference channel routing
For routing the conference channel, i.e. the so-called main line, a 64 kbit/s
channel is configured in the network. In case of two separate conferences,
an own 64 kbit/s channel must be provided for each conference. These
channels are routed through the network independently of each other.
For routing this conference channel, a "main line" should be defined. The
subscribers are then connected along this main line.
The 64 kbit/s channel of the "main line" is connected to the converters of the
modules. For an 8-subscriber conference, converters 1 and 2 must be used.
In case of a 2 x 4-subscriber conference, converters 1 and 2 must be used
for conference A and converters 5 and 6 for conference B.
The main line is to be routed via converters 1 and 2 and/or 5 and 6 for the
following reason.
If a module involved in a conference is pulled out, the conference channel
between the other subscribers participating in this conference is not
interrupted along the main line. In the corresponding node, the subscriber
signals are transmitted between converters 1+2 or 5+6 via the switching
matrix. Thus, an interruption of the conference can be avoided. However,
please note that other conference subscribers connected via the extracted
module as well as branching sub-lines possibly connected will be
disconnected.
The converters of a module which are not used for main line channel
routing, i.e. converters 3 to 8 in case of an 8-subscriber conference and
converters 3+4 as well as 7+8 in case of a 2 x 4-subscriber conference, can
be used for connecting further conference subscribers via any interface.
Thus, it is possible to include subscribers in a conference via sub-lines.
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Conference channel routing
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If only one subscriber is connected in both end nodes of the main line, a
simple conference with 1 converter/1 interface can be configured or the
subscriber can be connected in the STANDARD operating mode (converter
<->port).
Port 1
Node 1
Card slot 5 Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
2 x 4-subscr. conference
Conference A Conference B
Port 2 Port 3 Port 4
Conference A
Conference A
Channel 10
Channel 10
Conference A
Channel 11
Node 5 Node 6
Node 7
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2.6.2.4 Examples
The following EDC examples show a pure 8-subscriber conference and a
mixed 8-subscriber and 2 x 4-subscriber conference.
Example of an 8-subscriber conference
All subscribers in this example participate in conference A. The subscribers
of conference A are connected via a module configured for an 8-subscriber
conference by means of the central card slot data.
Figure 2.26: Example of an 8-subscriber conference
Main line
The main line of the conference is routed from node 1 (Central Station) via
nodes 2, 3, 5 and 6 in channel 10. For main line routing, converters 1 and 2
of the modules are connected to the corresponding ports (64 kbit/s
channel). Along this main line, subscribers A-1 to A-3 as well as A-4 to A-7
are involved in the conference.
Sub-line
Subscriber A-4 is connected to the conference in node 3 via a sub-line. For
this purpose, channel 14 (subscr. A-4) is switched through transparently in
node 2 to node 3. In node 3, this channel 14 is then applied to a free
converter.
Fl ex Pl ex XMP1
Conf. subscr.
A-1
Station 1:
Fl ex Plex XMP1
Station 2:
Fl ex Plex XMP1
Conf. subscr. A-3
Station 3
Fl ex Plex XMP1
Conf. subscr. A-4
Station 4
Fl ex Pl ex XMP1
Conf. subscr.
A-5
Station 5
Fl ex Plex XMP1
Conf. subscr. A-7
Station 6
Channel 10
Channel 10
Channel 10
Channel 14
Channel 14
Channel 10
8-subscr. EDC
8-subscr. EDC
8-subscr. EDC
8-subscr. EDC
8-subscr. EDC
Conf. subscr. A-2 Conf. subscr. A-6
Central
station
Main line:
Sub-line
Legend:
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Alternatively to this solution, a conference can also be configured in node 2.
Here only the converters and no interfaces of the module will be involved in
the conference. In this case, converters 1 and 2 are also connected to the
corresponding ports for main line routing. Channel 14 (subscr. A-4) is
applied to a free converter.
Example of a 2 x 4-subscriber and 8-subscriber conference
The example depicted below shows two independent conferences, i.e.
conference A and conference B. For this application, the modules used
must be adjusted for both the 8-subscriber and 2x4-subscriber conference.
Figure 2.27: Example of an 8-subscriber and 2 x 4-subscriber conference
Conference A subscribers:
Conference subscriber A-1
Conference subscriber A-2
Conference subscriber A-3
Conference subscriber A-4
Conference subscriber A-5
Conference subscriber A-6
Main line - Conference A
The main line of conference A starts in node 1 and is routed in
channel 10 [A] via nodes 2, 3 and 5 to node 6. Along this main line,
subscribers A-1, A-3, A-4, A-5 and A-6 are connected. Subscriber A-2 is
connected to the conference via a sub-line (see below).
Fl ex Plex XMP1
Conf. subscr. A-1
Node 1:
Fl ex Plex XMP1
Node 2:
Fl ex Pl ex XMP1
Conf. subscr. A-3
Node 3
Fl ex Pl ex XMP1
Conf. subscr. A-2
Node 4
Fl ex Pl ex XMP1
Conf. subscr.
A-4
Node 5
Fl ex Pl ex XMP1
Conf. subscr. A-6
Node 6
Channel 10[A]
Channel 10 [A]
Channel 10 [A]
Channel 11 [A]
Channel 11 [A]
Channel 10 [A]
Central
station
Conf. subscr.B-1
Conf. subscr. B-2
Conf. subscr.B-3
Conf. subscr.A-5 Conf. subscr.B-4
Module with 8-subscr. EDC
Module with 8-subscr. EDC
Module with 2 x 4-subscr. EDC
Module with 2 x 4-subscr. EDC
Channel 20 [B]
Channel 20 [B]
Channel 20 [B]
Channel 20 [B]
Module with 2 x 4-subscr. EDC
Channel 20 [B]
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For main line B, converters 1 and 2 of the modules are connected to the
corresponding ports (64 kbit/s channel).
In node 1, subscriber A-1 is connected to a module configured for a
2 x 4-subscriber conference. Node 1 is used as Central Station for
conference A.
In nodes 3 and 6, the subscribers A-3 and A-6 of conference A are
connected. Here the module is configured for an 8-subscriber conference.
In node 5, the subscribers A-4 and A-5 are connected to a module
configured for the 2x4-subscriber conference mode.
Sub-line - Conference A
Subscriber A-2 in node 4 is transparently routed in channel 11 [A] via
node 2 to node 3. There it is connected to conference A via a converter.
Conference B subscribers:
Conference subscriber B-1
Conference subscriber B-2
Conference subscriber B-3
Conference subscriber B-4
Main line - Conference B
The main line of conference B starts in node 1 and is routed in
channel 20 [B] via nodes 2, 3, 5 and 6 to node 4. In nodes 2, 3 and 6,
channel 20 [B] is switched through transparently. Subscribers B-1 to B-4 are
connected along this main line.
For main line B, converters 5 and 6 of the modules are connected to the
corresponding ports.
In node 1, subscriber B-1 is connected to a module configured for the
2x4-subscriber conference mode. Node 1 is used as Central Station for
conference B.
In node 5, subscribers B-3 and B-4 are connected to a module configured
for the 2x4-subscriber conference mode.
In node 4, subscriber B-2 is connected to a converter of a module
configured for the 2x4-subscriber conference mode.
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2.6.2.5 Configuration
The following section describes the setting options offered by the central
and decentral card slot data of the modules for an "Expanded Digital
Conference".
Settings in the central and decentral card slot data are possible for the
following modules (with DIX-ASIC):
DSK modular MDG
DSK modular MDV
DIX QD2ZT add-on
Note: The following settings has to be done for the E1 interfaces
which are involved in an Expanded Digital Conference:
Info no. 3: Disconnect also at Ext.-D & Ext.-Dk must be
activated.
Otherwise on the E1 interface the signal (user data) in forward
direction would be involved in the signal of the backward direction
if an on-sided error appears.
Thereby no usable transmission of the conference would be
possible.
Info no. 2: Disconnect immediately when fault should be
activated. Otherwise the rebuild of the conference starts after 4 to
5 seconds.
Central card slot data
Tab. 2.K: Central card slot data for EDC
Info no. Designation Default setting
21 Exp. dig. conf. active (Dec 27-29) yes=1 0
22 Exp. dig. conf. div.: 8=0 2*4(1-4/5-8)=1 0
23 Exp. dig. conf: Master/Slave=0 equal=1 0
24 Exp. Dig. conf: root depends on C/RTSyes=1 0
26 Digital conference - converter 2 yes=1 0
27 Digital conference - converter 3 yes=1 0
28 Digital conference - converter 4 yes=1 0
29 Digital conference - converter 5 yes=1 0
30 Digital conference - converter 6 yes=1 0
31 Digital conference - converter 7 yes=1 0
32 Digital conference - converter 8 yes=1 0
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Info no. 21: Exp. Dig. Conf. active
Using this info no., the "Expanded Digital Conference" mode can be
adjusted for the module.
Note: In this case of application, info nos. 26 to 32 must not be
used and have to be set to "0".
Expanded Digital Conference active:
Info no. 21 set to "1".
Info no. 22: Exp. Dig. conf. div.: 8=0 2*4(1-4/5-8)=1
Using info no. 22, you can define as to whether you want to use this module
for switching a large conference with up to 8 sub-addresses or two smaller,
separate conferences with 4 sub-addresses each (sub-addresses 1 to 4 or
5 to 8).
Expanded Digital Conference with 8 sub-addresses:
Info no. 22 set to "0".
Expanded Digital Conference with 2 x 4-subscriber
sub-addresses:
Info no. 22 set to "1".
Info no. 23: Exp. Dig. conf: Master/Slave=0 equal=1
Expanded Digital Conference: Master/Slave operation:
Using this info no. you can adjust whether the digital conference shall take
place in the Master/Slave mode or with equal subscribers.
Master/Slave mode
The tree must be set up starting from the bus Master. The signal from the
Master is sent to all Slaves, whereas the signals supplied by the Slaves are
sent only to the root. This corresponds to a four-wire bus and is basically
appropriate for full-duplex operation.
This mode must also be used if the Master fills the pauses between
telegrams with data other than the Idle signal (e.g. HDLC flags in case of
SISA).
Info no. 23 set to "0".
Expanded Digital Conference: equal
Equal operation
This mode is typical for operation without a permanent Master (e.g.
professional bus with token ring or telephone conference between
subscribers). The signal of each subscriber is sent to all other subscribers.
This corresponds to a two-wire bus and is basically only appropriate for
half-duplex operation.
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In order to permit "ripping up" meshes, a tree must still be set up starting
from a root. However, this tree is independent of traffic signal transmission.
Info no. 23 set to "1".
Info no. 24: Exp. Dig. conf: Root depends on C/RTS yes=1
For special cases of application, it is possible to configure several roots, i.e.
Masters. Using this card slot information, you can define that one of the
Masters configured can declare itself as Master by activating a control line.
Note: This option is not applicable to G.703 or WT modules,
since control lines are not available.
Decentral card slot data
Info no. 14: Preferred path for conference
Using this info no., you can define the interface or converter located in the
preferred conference path. This path will then be preferred as return
direction to the root (Master). The alternativ path is used if the preferred path
is not available. If the fault in the preferred path is resolved this path will be
used again.
Info nos. 27 to 29: Sync.Freq.| EDK
Info nos. 27 to 29 can assume two different meanings:
1. With an EDC active on the module (setting via central card slot info
no. 21:
=1, the settings are applicable to the Expanded Digital Conference.
2. With info no. 21: Central =0, the previous meaning "Info no. 21:
Frequency table" will apply.
Info no. 27: Sync.Freq.| EDK: conv. takes part yes=1
The converter of the sub-address will be involved in the conference.
Info no. 28: Sync.Freq.| EDK: intf. takes part yes=1
The interface of the sub-address will be involved in the conference.
Info no. 29: Sync.Freq.| EDK: intf. root poss. yes=1
Using this info no., you can define the subscriber unit connected to the interface as
Master.
Tab. 2.L: Decentral card slot data for EDC
Info no. Designation
14 Preferred path for conference yes=1
27 Sync. Freq.|EDK: conv. takes part yes=1
28 Sync. Freq.|EDK: Intf. takes part yes=1
29 Sync. Freq.|EDK: intf. root poss. yes=1
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Common conference circuit
The schematic drawing depicted below shows a conference circuit with all
subscribers participating in the same conference.
Subscribers 1 to 6 in nodes 1, 2, 3 and 4 all participate in a common
conference.
Main line
The main line of the conference is routed in channel 11 from node 1 via
node 2, port 1, and node 2, port 3, to node 3.
In node 2, this channel 11 is switched from port 1 to converter 1 and from
port 3 to converter 2 in the STANDARD operating mode (port <->
converter).
Node 3, i.e. the end node of the main line, is not configured for an EDC.
Here subscriber 5 is configured for the STANDARD operating mode with
channel 11.
Sub-line
Subscriber 6 in node 4 is to participate in the conference in node 2 via a
sub-line.
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Subscriber 6 of node 4 is routed in channel 14, which is connected in
node 2 from port 2 to converter 3.
For this conference circuit, the following configurations must be performed
in the individual nodes via the central and decentral card slot data.
Node 1 for card slot 5
Central card slot data
Info no. 21: Set to "1"; EDC active
Info no. 22: Set to "0"; 8-subscriber conference
Info no. 23: Set to "1"; equal
Info no. 24: without any meaning
Decentral card slot data
SUB-ADDRESS 1:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 2:
Info no. 27: Set to "0"; converter does not take part in conference
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
P1
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Node 1 Node 2 Node 3
Card slot 5 Card slot 6 Card slot 4
8-subscriber conference 8-subscriber conference
Node 4
8-subscriber conference
2-Mbit 2-Mbit
2
-
M
b
i
t
P2 P3 P4
Conf. subscr. 2 Conf. subscr. 3 Conf. subscr. 4 Conf. subscr. 5
Conf. subscr. 6
Card slot 6
Conf. subscr. 1
Channel 11
Channel 11
Channel 14
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Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
Node 2 for card slot 6
Central card slot data
Setting identical with that for node 1.
Decentral card slot data
SUB-ADDRESS 1:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 2:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 3:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "0"; interface does not take part in conference
Info no. 29: without any meaning
Node 3 for card slot 4
This end node of the main line is not configured for an EDC. The subscriber
is connected and operated in the STANDARD mode.
Node 4 for card slot 6
Central card slot data
Info no. 21: Set to "1" ; EDC active
Info no. 22: Set to "0" ; 8-subscriber conference
Info no. 23: Set to "1"; equal
Info no. 24: without any meaning
Decentral card slot data
SUB-ADDRESS 1:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
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Two separate conference circuits
In the example depicted below, two separate conferences, i.e. conference
A and conference B, are configured in the network.
Conference A
Subscribers A-1 to A-6 participate in conference A. Subscriber A-6 is
connected to conference A in node 2 via port 2.
Main line
The main line of conference A is routed in channel 11 from node 1, port 1,
via node 2, port 1 and port 3, to node 3, port 1.
For setting up this main line, converters 1 and 2 of the modules are
connected to the corresponding ports in both node 1 and node 2.
Sub-line
Subscriber A-6 is routed in channel 14 from node 4 to node 2 and is
connected there to converter 3.
Conference B
Subscribers B-1 to B-5 participate in conference B.
The conference channel B (64-kbit/s) of conference B is routed from node
1, port 2, via node 2, port 1 and port 4, to node 4, port 2.
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Configuration
Aastra Proprietary Information Page 2-59
For these conference circuits, the following configurations must be
performed in the individual nodes via the central and decentral card slot
data.
Node 1 for card slot 5
Central card slot data
Info no. 21: Set to "1"; EDC active
Info no. 22: Set to "1"; 2 x 4-subscriber conference
Info no. 23: Set to "1"; equal
Info no. 24: without any meaning
Decentral card slot data
SUB-ADDRESS 1 for conference A:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port 1
Conference A1
Conference A3
Conference B4 Conference B Conference A5
Conference B1
Conference B3
Conference B2
Conference A4
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
P4
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port 1
Channel 11
Channel 20
Channel 20
Channel 11
Node 1
Node 2
Node 3
Card slot 5 Card slot 6 Card slot 4
Conference A2
Converter
Interface
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Standard
Card slot 7
Conference A6
Port 2 P1 P2 P3
2-Mbit
2-Mbit
2-Mbit
2
-
M
b
i
t
Port 2
Channel 14
Node 4
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Configuration
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Info no. 29: without any meaning
SUB-ADDRESS 2 for conference A:
Info no. 27: Set to "0"; converter does not take part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 5 for conference B:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 6 for conference B:
Info no. 27: Set to "0"; converter does not take part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
Node 2 for card slot 6
Central card slot data
Info no. 21: Set to "1"; EDC active
Info no. 22: Set to "1"; 2 x 4-subscriber conference
Info no. 23: Set to "1"; equal
Info no. 24: without any meaning
Decentral card slot data
SUB-ADDRESS 1 for conference A:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 2 for conference A:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "0"; interface does not take part in conference
Info no. 29: without any meaning
SUB-ADDRESS 3 for conference A:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "0"; interface does not take part in conference
Info no. 29: without any meaning
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Configuration
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SUB-ADDRESS 5 for conference B:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 6 for conference B:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
Node 3 for card slot 4
Central card slot data
Info no. 21: Set to "1"; EDC active
Info no. 22: Set to "1"; 2 x 4-subscriber conference
Info no. 23: Set to "1"; equal
Info no. 24: without any meaning
Decentral card slot data
SUB-ADDRESS 1 for conference A:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 2 for conference A:
Info no. 27: Set to "0"; converter does not take part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
SUB-ADDRESS 5 for conference B:
Info no. 27: Set to "1"; converter takes part in conference
Info no. 28: Set to "1"; interface takes part in conference
Info no. 29: without any meaning
Node 4 for card slot 7
This node is not configured for an EDC. The subscriber is connected and
operated in the STANDARD mode.
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Issue R2A, 07.2009
XMP1 Release 5.5 System Description
Analog Conference
Page 2-62 Proprietary Information Aastra
2.6.3 Analog Conference
The "Analog Conference" option is supported by XMP1 version 3.8 and
higher. It is implemented by a software package. This software runs on the
processor of the KZU FEK (8) module (62.7040.250.00-A001,
AN00113903).
In the XMP1 node, this KZU FEK (8) module is mounted in any card slot of
the XMP1 subrack. In the Operator Terminal, not the KZU FEK (8) module,
but the "CNF Analog Conference" module is entered in the Node
Equipment. This module represents the Analog Conference functionality.
The "CNF Analog Conference" module provides up to four analog
conference channels for configuring an "analog conference". The
subscribers of a conference are connected to these conference channels
via subscriber interfaces (KZU SUB and KZU FEK).
Note: If the KZU FEK (8) module is used for the "Analog
conference", an application as a pure KZU FEK (8) module is no
longer possible irrespective of the number of conference
channels used.
Note: The following settings has to be done for the E1 interfaces
which are involved in an analogue conference:
Info no. 3: Disconnect also at Ext.-D & Ext.-Dk must be
activated.
Otherwise on the E1 interface the signal (user data) in forward
direction would be involved in the signal of the backward direction
if an on-sided error appears.
Thereby no usable transmission of the conference would be
possible.
Info no. 2: Disconnect immediately when fault should be
activated. Otherwise the rebuild of the conference starts after 4 to
5 seconds.
In case of an analog conference, a distinction is made between the following
options:
Analog conference with signalling (a-bit)
Analog conference without signalling (modem mode)
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Analog Conference
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Cascading
Cascading the "CNF Analog Conference" module is possible. Thus, more
than four conference subscribers can be interconnected to a conference.
These modules can be mounted either in one or in several nodes. Using
one "CNF Analog Conference" module, up to four connections can be set
up either to another module or to a 2 Mbit/s port.
The following conference channel connections are possible:
[1]Conference channel x with a converter of a subscriber interface operated
in the "STANDARD" mode.
[2]CNF X module, conference channel x with CNF Y module; conference
channel y operated in the "STANDARD" mode.
[3]Conference channel x with a 64 kbit/s channel of a port operated in the
"STANDARD" mode.
When cascading an analog conference, please note that the maximum
number of conference channels depends on the basic noise of the channels
involved.
SUB SUB SUB SUB
CNF Analog conference
on KZU FEK (8) module
Sub.1 Sub. 2 Sub. 3 Sub. 4
Conference channels
1 2 3 4
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Analog conference with signalling
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The following diagram shows an example of such a cascade.
Figure 2.28: Cascading the analog conference
In node 1, the conference channels 1, 2 and 3 of the CNF A conference
module are configured with subscribers 1, 2 and 3 in the "STANDARD"
mode.
Cascading in node 1 takes place between the CNF A and CNF B module by
configuring the conference channels 4 and 1 to operate in the "STANDARD"
mode. The conference channels 2 and 3 of the CNF B module are
configured to operate in the "STANDARD" mode with subscribers 4 and 5.
Cascading between node 1 and node 2 is executed by connecting
conference channel 4 of node 1 to conference channel 1 of node 2. This
connection is set up in the "STANDARD" mode. The conference channels
2 and 3 in node 2 are configured again to operate in the "STANDARD" mode
with subscribers 6 and 7. Conference channel 4 in node 2 can be used for
further cascading.
2.6.3.1 Analog conference with signalling
The output signal of each analog conference channel (to the subscriber)
represents the sum of all input signals participating in the conference minus
the own input signal.
Each conference channel which detects an active a-bit (a-bit =0) in the
incoming direction actively participates in the conference. This means, that
its signal is added up to the other signals. A conference channel with an
incoming passive a-bit (a-bit =1) participates passively in the conference,
i.e. this channel is only listening in.
Starting up a conference
The conference is in its basic status if none of the incoming a-bits (from
subscribers) is active. In the incoming direction, all a-bits are "1". If the
conference detects the first incoming a-bit=0 at one of the conference
SUB SUB SUB
CNF Analog Conference
on KZU FEK (8) module
Sub. 1 Sub. 2 Sub. 3
Conference channels
1 2 3 4
SUB SUB
CNF Analog Conference
on KZU FEK (8) module
Sub. 4 Sub. 5
Conference channels
1 2 3 4
SUB SUB
CNF Analog Conference
on KZU FEK (8) module
Sub. 6 Sub. 7
Conference channels
1 2 3 4
Node 1
Node 2
P
o
r
t
P
o
r
t
2 Mbit/s
[1] [2] [3] [1] [1] [1] [1] [1] [1]
[3]
P
o
r
t
CNF A CNF B
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Analog conference with signalling
Aastra Proprietary Information Page 2-65
channels, its sends an outgoing active a-bit=0 to all other subscribers
connected to the conference. Then the conference is in the calling state.
If a second active a-bit is now detected (one of the subscribers went
off-hook; a-bit=0), the outgoing a-bits of the conference channels are
switched passive by an incoming passive a-bit (traffic state). The outgoing
a-bits of the subscribers participating in the conference call are active and
show that they are in the calling status.
Adding / deleting conference channels in the traffic state
If the conference detects a new channel with an active a-bit, this channel is
involved in the conference and the outgoing a-bit of this channel is switched
active.
As soon as a channel with a passive a-bit is detected in the conference, its
signal is excluded from the conference and the outgoing a-bit is switched
passive.
Terminating the conference
As long as a conference channel includes an active a-bit (from the
subscriber), the conference remains in the traffic state.
If there is only one more active conference channel, its outgoing a-bit (to the
subscriber) is switched passive by the conference circuit. This indicates that
there is no other conference channel participating in the conference. As
soon as the incoming a-bit of the last conference channel becomes passive,
the conference returns to its basic state.
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Analog conference without signalling (modem mode)
Page 2-66 Proprietary Information Aastra
2.6.3.2 Analog conference without signalling (modem mode)
With XMP1 version 3.8.5 and higher, the "Analog conference" can be
configured in such a way that a control function using the a-bit is no longer
necessary.
On all CNF modules involved in the "Analog conference", the central card
slot data bit 1 "Modem mode (without signalling)" must be set to 1. Thus, all
conference channels without AIS are involved in the conference
independent of any incoming signalling data.
In order to ensure operation in the SUB-SUB mode, incoming signalling
data available at a port are looped back to the latter. This means, if the S2in
line of an FEK channel becomes active, its S2out line also becomes active.
However, this does not affect the conference.
Figure 2.29: Analog conference in modem mode (without signalling)
Usable interfaces
All analog XMP1 interfaces can be used to connect subscribers to an
analog conference.
However, in normal cases of application, the SUB and FEK interfaces are
used for this purpose.
Note: When using a SUB module, the SUB-SUB operating mode
must be configured (decentral card slot data - bit 23 =1).
SUB SUB SUB
CNF Analog Conference
on KZU FEK (8) module
Subscr.1Subscr.2 Subscr.3
Conference channels
1 2 3 4
SUB SUB
CNF Analog Conference
on KZU FEK (8) module
Subscr.4 Subscr.5
Conference channels
1 2 3 4
SUB SUB
CNF Analog Conference
on KZU FEK (8) module
Subscr.6 Subscr.7
Conference channels
1 2 3 4
Node 1
Node 2
P
o
r
t
P
o
r
t
2 Mbit/s
[1] [2] [3] [1] [1] [1] [1] [1] [1]
[3]
P
o
r
t
CNF A CNF B
Central card slot data - bit 1:
"Modem mode (without signalling) yes=1
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Analog conference without signalling (modem mode)
Aastra Proprietary Information Page 2-67
Configuration
The configuration of the analog conference is executed in the same way as
a normal module configuration.
1. Define the run of the analog conference (nodes, card slots, ports,
channels etc.).
2. Mount the KZU FEK (8) module(s) you want to use for the analog
conference.
Note: Since a KZU FEK (8) module used as conference module
has no front cable connections, it must be ensured that - after
mounting this module - the FRSTQ signal is tied to 0 V. For this
purpose a D-Sub connector (D-Sub F25 M3/S KPL Part no.
AN00055910) is used.
On this D-Sub connector, PIN 13 must be connected to the
connector housing. The FRSTQ is then tied to 0 V when the
FRSTQ D-Sub connector is plugged in.
This connection must be removed again before extracting the
module.
3. Mount the modules (SUB, FEK) you want to use for connecting the
conference subscribers. When using the SUB module, the SUB-SUB
operating mode must be configured.
4. At the Operator Terminal (MSP, SOX), the special "CNF Analog
Conference" module must be entered in the Node Equipment for the
card slots provided for the KZU FEK (8) module to be used as
conference module.
Note: When using the MSP, the sub-addresses must have been
previously entered.
5. Special settings are not required on the conference module. The
central and decentral card slot data of the "CNF Analog Conference"
module do not allow any settings.
Note: In case of an "Analog conference" in the "modem mode",
bit 1 of the central card slot data must be set to "1" for all CNF
modules.
6. Switch the conference channels in accordance with the defined run.
Use the "Standard" mode.
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Branching function
Page 2-68 Proprietary Information Aastra
2.6.4 Branching function
In contrast to the conference configurations possible so far, a higher
security can now be achieved by switching a conference in an arbitrarily
meshed topology. Relevant in this case is the topology set up using 64 kbit/s
channels switched between the ports of the corresponding conference
nodes.
To "rip up" meshes, a tree with an unambiguous root is set up automatically.
In case of a fault or failure, this tree adapts itself automatically to the
changed topology. The algorithm used for this purpose is identical with that
required for the service channel necessary for communication between the
management system and XMP1 nodes. This also applies to the behavior in
case of interruptions.
The following diagram shows an example of a conference.
The branching function of the XMP1 system permits automatic and
fault-tolerant routing in meshed networks. The subscriber signal is
transmitted in a 64 kbit/s channel between the different subscribers
participating in the conference. This function is supported both for analog
and digital conferences.
The analog branching function is supported by the KZU FEK (8) module.
This module offers four analog conference channels for the branching
function. For this purpose, the "CNF analog conference" module must be
provided in the operating software.
The digital branching function is supported by the "DSK modular" module
equipped with all V- and G-interfaces. Up to 8 subscribers can be configured
here. Another important application option for the digital branching function
is the protection of the 64 kbit/s SOA management channel when using
QD2 and QD2/GN Central Units.
XMP1
#1
XMP1
#4
XMP1
#2
XMP1
#3
XMP1
#5
Head Station
(Master)
Subs.
Modem
Sl ave
Subs.
Modem
Sl ave
Subs.
Modem
Sl ave
Subs.
Modem
Sl ave
Subs.
Modem
64 kbit/s
64 kbit/s 64 kbit/s
64 kbit/s
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Branching function
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Defining the root (Master)
For both applications, an externally connected subscriber unit can be
defined as Master.
This configuration is possible by setting the decentral card slot info. no. 29
to "Root possible at IF" for the DSK module and info no. 29 to "Root for
(analog) conference" for the CNF module (FEK).
All other external conference subscribers will then be used as Slaves.
For special applications it is possible to define several roots (Masters). In
this case, one of the external units connected to the corresponding
interfaces must declare itself as Master by activating a control line. Central
card slot info no. 24 must then be set to "Root independent of C/RTS". If this
Master fails, another possible Master will take over the Master function. The
setup of the new structure will take place automatically.
Automatic tree setup
The tree is set up automatically as soon as the root node (Master) sends out
a forward identifier. This identifier is detected and passsed on by the
subsequent conference nodes. The direction from which this identifier has
been received, will then be defined as return direction to the root (Master).
Definition of a preferred path
If required, a preferred path can be defined. The corresponding
configuration is possible via info no. 14 "Preferred path for conference" of
the decentral card slot data. This direction will then be preferred as return
direction to the root (Master) if the forward identifier has been detected
coming from this direction.
Behavior in case of a fault or failure
Interruptions in the 64 kbit/s channel will be indicated means of an AIS in
the CAS signalling.
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Issue R2A, 07.2009
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Configuration example: one master, no preferred path
Page 2-70 Proprietary Information Aastra
2.6.4.1 Configuration example: one master, no preferred path
The following Fig. 2.30 shows a digital conference with one Master in
Master/Slave operation. A preferred path is not configured.
Master of the conference is conference subscriber 1. The Master is
connected in node 1 to interface 1 of card slot 5. The Slaves are located in
node 2, 3 and 4.
Figure 2.30: Digital conference - Master/Slave mode
Configuration steps to be executed for this example.
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
P1
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Node 1 Node 2 Node 3
Steckplatz 5 Steckplatz 6 Steckplatz 4
8-subscriber conference 8-subscriber conference
Node 4
8-subscriber conference
2-Mbit 2-Mbit
2
-
M
b
i
t
P2 P3 P4
Conf. subscr. 4: Slave Conf. subscr. 5: Slave
Konf. Tln. 6
Slave
Steckplatz 6
Conf. subscr. 1: Master
Channel 11
Channel 11
Channel 14
2-Mbit
2-Mbit
P1 P2 P3 P4
8-subscriber conference
Channel 12
P1 P2 P3 P4
Channel 12
P1 P2 P3 P4
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Configuration example: one master, no preferred path
Aastra Proprietary Information Page 2-71
Tab. 2.M: Configuration table, Digital conference - Master/Slave mode
Node
Card
slot
Sub-
addr.
Central card slot info no. Decentral card slot ino no. Remark
21 22 23 24 14 27 28 29
1 5
1
1 0 0 0
0 1 1 1 Master
2 0 1 0 0
2 6
1
1 0 0 0
0 1 1 0 Slave
2 0 1 0 0
3 0 1 0 0
3 4
1
1 0 0 0
0 1 1 0 Slave
2 0 1 0 0
4 6
1
1 0 0 0
0 1 1 0 Slave
2 0 1 0 0
3 0 1 0 0
Tab. 2.N: Central card slot data for EDC
Info no. Designation
21 Exp. dig. conf. active (Dec 27-29) yes=1
22 Exp. dig. conf. div.: 8=0 2*4(1-4/5-8)=1
23 Exp. dig. conf: Master/Slave=0 equal=1
24 Exp. Dig. conf: root depends on C/RTS yes=1
Tab. 2.O: Decentral card slot data for EDC
Info no. Designation
14 Preferred path for conference yes=1
27 Sync. Freq.|EDK: conv. takes part yes=1
28 Sync. Freq.|EDK: Intf. takes part yes=1
29 Sync. Freq.|EDK: intf. root poss. yes=1
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Configuration example: one master, with preferred path
Page 2-72 Proprietary Information Aastra
2.6.4.2 Configuration example: one master, with preferred path
The following Fig. 2.30 shows a digital conference with one Master in
Master/Slave operation. A preferred path is defined.
Master of the conference is conference subscriber 1. The Master is
connected in node 1 to interface 1 of card slot 5. The Slaves are located in
node 2, 3 and 4. A preferred path is defined for interface 1 in node 4,
interface 1 in node 2 and interface 1 in node 3.
Figure 2.31: Digital conference - Master/Slave mode
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
P1
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Node 1 Node 2 Node 3
Steckplatz 5 Steckplatz 6 Steckplatz 4
8-subscriber conference 8-subscriber conference
Node 4
8-subscriber conference
2-Mbit 2-Mbit
2
-
M
b
i
t
P2 P3 P4
Conf. subscr. 4: Slave Conf. subscr. 5: Slave
Konf. Tln. 6
Slave
Steckplatz 6
Conf. subscr. 1: Master
Channel 11
Channel 11
Channel 14
2-Mbit
2-Mbit
P1 P2 P3 P4
8-subscriber conference
Channel 12
P1 P2 P3 P4
Channel 12
P1 P2 P3 P4
preferred path
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Configuration example: one master, with preferred path
Aastra Proprietary Information Page 2-73
Configuration steps to be executed for this example:
Tab. 2.P: Configuration table, Digital conference - Master/Slave mode
Node
Card
slot
Sub-
addr.
Central card slot info no. Decentral card slot ino no. Remark
21 22 23 24 14 27 28 29
1 5
1
1 0 0 0
0 1 1 1 Master
2 0 1 0 0
2 6
1
1 0 0 0
1 1 1 0
Slave,
preferred path
2 0 1 0 0
3 0 1 0 0
3 4
1
1 0 0 0
1 1 1 0
Slave,
preferred path
2 0 1 0 0
4 6
1
1 0 0 0
1 1 1 0
Slave,
preferred path
2 0 1 0 0
3 0 1 0 0
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Configuration example: multiple master defined
Page 2-74 Proprietary Information Aastra
2.6.4.3 Configuration example: multiple master defined
The following Fig. 2.30 shows a digital conference in Master/Slave
operation with two possible Master.
Conference subscriber 1 and 4 are possible master. Please not that only
one Master may be active, the other Master operates as a slave. The
Master must declare itself as Master by activating a control line. The Slaves
are located in node 3 and 4.
Figure 2.32: Digital conference - Master/Slave mode
Configuration steps to be executed for this example.
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
P1
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Umsetzer
Schnittstelle
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Port
Node 1 Node 2 Node 3
Steckplatz 5 Steckplatz 6 Steckplatz 4
8-subscriber conference 8-subscriber conference
Node 4
8-subscriber conference
2-Mbit 2-Mbit
2
-
M
b
i
t
P2 P3 P4
Conf. subscr. 4: Master
Conf. subscr. 5: Slave
Konf. Tln. 6
Slave
Steckplatz 6
Conf. subscr. 1: Master
Channel 11
Channel 11
Channel 14
2-Mbit
2-Mbit
P1 P2 P3 P4
8-subscriber conference
Channel 12
P1 P2 P3 P4
Channel 12
P1 P2 P3 P4
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Configuration example: multiple master defined
Aastra Proprietary Information Page 2-75
Tab. 2.Q: Configuration table, Digital conference - Master/Slave mode
Node
Card
slot
Sub-
addr.
Central card slot info no. Decentral card slot ino no. Remark
21 22 23 24 14 27 28 29
1 5
1
1 0 0 0
0 1 1 1
possible
Master
2 0 1 0 0
2 6
1
1 0 0 0
1 1 1 0
possible
Master
2 0 1 0 0
3 0 1 0 0
3 4
1
1 0 0 0
1 1 1 0 Slave
2 0 1 0 0
4 6
1
1 0 0 0
1 1 1 0 Slave
2 0 1 0 0
3 0 1 0 0
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Protection Switching Configurations
Page 2-76 Proprietary Information Aastra
2.7 Protection Switching Configurations
In order to ensure optimum reliability and availability of XMP1 even in case
of faults occurring in the network, the system offers the possibility of defining
protection switching configurations. The following protection switching
configurations are possible:
Line protection switching
Card protection switching
2.7.1 2 Mbit/s line protection switching
In line protection switching configurations, 2 Mbit/s data transmission
between two nodes is doubled by a second line. In this case, two port LEs
are operated in parallel in each node in the Tx direction. The Tx signal is
transmitted parallelly over both transmission paths.
Criteria for switchover to the protection path are
AIS
LOS
LOF
BER
-3
.
On detection of one of the above conditions in the operating path, the
control computer switches over to the protection path. A network
management system is not required for switchover.
Note: The protection path must not be occupied by 64 kbit/s
channels.
The automatic switchback function from the protection path to the operating
path (preferred path) if the switchover condition is no longer available can
be configured. When entering the routing data, please ensure that time slot
0 of the 2 Mbit/s signal is transmitted transparently between the terminal
stations.
Figure 2.33: Line protection switching
XMP1
1
2
2
1
Port
2 Mbit/s
el.
Port
2 Mbit/s
opt.
Code-transparent
transmission
Code-transparent
transmission
Port
2 Mbit/s
el.
Port
2 Mbit/s
opt.
XMP1
1
2
3
4
1
2
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Issue R2A, 07.2009
XMP1 Release 5.5 System Description
2 Mbit/s card protection switching
Aastra Proprietary Information Page 2-77
2.7.2 2 Mbit/s card protection switching
In a card protection switching configuration, two port modules are used for
protection switching. In this case, an interface (priority) located on one port
is protected by a standby interface located on a second port. For both ports,
the same subaddress has to be used for both the preferred interface and
standby interface.
Up to 16 port interfaces can be doubled in a node.
Criteria for switchover to the protection path are
AIS
LOS
LOF
BER
-3
.
If one of the above criteria is detected in the preferred path, switchover to
the protection path takes place. A network management system is not
required for switchover. The automatic switchback function from the
standby path to the preferred path can be configured.
When entering the routing data, please ensure that time slot 0 of the 2 Mbit/s
signal is transmitted transparently between the terminal stations.
Figure 2.34: Card protection switching
XMP1
1
2
3
4
1
2
1
2
Port
2 Mbit/s
opt.
Code-transparent
transmission
Code-transparent
transmission
Port
2 Mbit/s
el.
Port
2 Mbit/s
opt.
1
2
3
4
Port
2 Mbit/s
el.
XMP1
FCD 901 48
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XMP1 Release 5.5 System Description
Central Unit Redundancy
Page 2-78 Proprietary Information Aastra
2.8 Central Unit Redundancy
In order to protect the node from failure due to a defective Central Unit, the
XMP1 system offers the possibility to double the Central Unit.
With Central Unit redundancy, only one Central Unit is active at a time. In
case of a fault, the system switches over to the passive Central Unit
automatically and an alarm is generated.
Connection
Information exchange between the two Central Units takes place via their
redundancy interface. All data and clock information necessary for
communication is routed via the cable (ZT redundancy) interconnecting the
two Central Units. The information on which Central Unit is active or passive
is also transmitted via this cable.
A special Y-cable is available for connecting the Operator Terminal (Control
Computer, MSP). The clock and ServiceOn XMP1 system are provided by
a special cabling.
Please note the relevant descriptions.
Caution !
A certain procedure must be followed when you want to mount or extract
one of the two Central Units. For further information, please refer to the
description of the Central Units.
Requesting the redundancy status
Using the Online functions and the debugging commands it is possible to
request the redundancy status. The latter is requested together with the
system information (command "mc 40").
Besides other system information, the answer from the node also includes
the status of the passive Central Unit as well as the alignment status of the
configuration data and firmware.
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XMP1 Release 5.5 System Description
Line Equipment for 2 Mbit/s Transmission Links
Aastra Proprietary Information Page 2-79
2.9 Line Equipment for 2 Mbit/s Transmission
Links
2.9.1 Line equipment for fiber-optic cables
If the 2 Mbit/s signals are to be routed via fiber-optic cables, Port LE2 OPT
U modules must be provided.
The Port LE2 OPT U module offers two electrical equipment interfaces and
two optical card slots which can be flexibly equipped with 1F and 2F
modules.
Module 1F
The 1F module (62.7026.580.00-A001 and 62.7026.580.00-A002) provides
one 2 Mbit/s interface. Transmission in the Tx and Rx direction takes place
via one single fiber using the wavelength-division multiplex procedure.
Module 2F
The 2F module (62.7026.570.00-A001 und 62.7026.540.00-A001) provides
one 2 Mbit/s interface. With this module, transmission in the Tx and Rx
direction takes place via separate fibers.
The laser used on the modules fulfills Laser Class 1 conditions both
in operation and in case of a fault.
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Signal Concentrator
Page 2-80 Proprietary Information Aastra
2.10 Signal Concentrator
In the XMP1 system, the signal concentrator module
(62.7040.180.00-A001, AN00275454) provides interfaces (sensors and
transmitters) to external units. This new module is generally referred to as
"SIG II signal concentrator". It substitutes the signal concentrator module
(62.7006.180.00-A001).
Using the sensors, messages received from external devices can be
processed. In addition, such external devices can be controlled via the
transmitters.
Possible signal sources:
Alarm signals from external units with 7R signalling
A-/B-/EL alarms
ZA(A)/ZA(B) contacts
Door contacts
Fire detectors
The following devices can be controlled via the transmitters:
Central alarm signalling unit
Switching circuits triggered by alarms and messages
Extended alarm signalling
The signal concentrator can also be used for additional alarm signalling for
XMP1 modules via signalling outputs. In this case, the module is displayed
by the Operator Terminal under "EA ext. alarm signalling" modules. The
signal concentrator can be assigned to another module and indicates the
alarm status of the latter via relay contacts (transmitters).
Figure 2.35: Signal concentrator
XMP1 C
e
n
t
r
a
l
u
n
i
t
S
i
g
n
a
l
c
o
n
c
e
n
t
r
a
t
o
r
s
S ensors
1 to 16
Trans-
mitters
1 to 8
7R signalling
door contacts
fire detectors
etc.
C entral alarm
singalling units
switching processors
control functions
etc.
S OX
S erviceOn XMP 1
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Performance Parameters of a Transmission Link
Aastra Proprietary Information Page 2-81
2.11 Performance Parameters of a Transmission
Link
The performance criteria for the transmission of digital signals for different
services and transmission links are defined by ITU-T Rec. G.821.
2 Mbit ports can be defined at which the performance parameters shall be
determined on the basis of ITU-T Rec. 821. The SOX Network Manager
requests and displays the parameters measured.
In the SOX Network Manager, the performance data can be configured and
requested via the "Performance Data" window.
The performance data are stored in the database.
Performance data can be recorded for
2 Mbit/s PDH ports (HDB3, LEU, LE Opt)
Central Unit CUE HDLC, VC12 (near end, far end)
SCU internal 2Mbit E12 internal (near end)
SCU internal 2Mbit E12 internal, VC12 (near end, far end)
SCU external 2Mbit, PPI, D1, VC12 (near end)
SCU OSPI, SFP, RS (near end)
SCU OSPI, SFP, RS, MS (near end, far end)
SCU OSPI, SFP, RS, MS, AU4 (near end)
SCU OSPI, SFP, VC4 (near end, far end)
The following figure shows an example of the 15-minute records.
The entire time of a link is divided up as follows:
time of availability
time of unavailablity.
The time of availablity is subdivided again into the following performance
levels:
error-free operation
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Performance Parameters of a Transmission Link
Page 2-82 Proprietary Information Aastra
degraded operation
severely degraded operation.
The Central Unit of the node uses the number of bit errors counted to
determine the bit error ratio and records the transmission quality during the
entire measuring time in five performance levels depending on the bit error
ratio:
Error-free time
Errored seconds
Errored minutes (BER >110
-6
)
Severely errored seconds (BER >110
-3
)
Unavailable time (more than ten severely errored seconds in a row).
FCD 901 48
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Switching Test Loops
Aastra Proprietary Information Page 2-83
2.12 Switching Test Loops
For troubleshooting purposes, the operator can switch test loops on the
modules listed below (A =analog loop D =digital loop).
Table 2.R: Test loops KZU, KZU II, DSK
Loop
no.
KZU KZU II DSK DSK modular
F
E
K
S
U
B
E
X
O
S
X
F
E
K
S
U
B
E
X
64k V24 X21 WT V35
MDV MDG
1 A A A A A A A
Internal
loop
(F1)
Loop
3c
ITU
V.54
Loop
3c
ITU
V.54
Loop
3c
ITU
V.54
Loop
3c
ITU
V.54
Loop
3
ITU
V.54
Loop
(D2)
2 D D D D D D D
Loop
2b
ITU
V.54
Loop
2b
ITU
V.54
Loop
2b
ITU
V.54
Loop
2b
ITU
V.54
Loop
2
ITU
V.54
Remote
loop
3
Switch-
ing
matrix
loop;
control
line
Loop 3
and
Loop 2
Near-
end and
remote
loop
4
Table 2.S: Test loops ISDN, Ports
Loop
no.
ISDN Port
UQF
(4)
Uk0/Uk0F
S0F
(4)
S0 /
S0F
HDB3
LE
LE34
OPT
MUX34
LEU
LOU
opt u.
1
B1&B2 w/o
B* on both
sides
B1&B2 w/o
B* on both
sides
B1&B2 w/o
B* on both
sides
B1&B2 w/o
B*
on both
sides
Loop
F1out-
>F1in
F2 loop
(coaxial)
Local
loop
(F1)
Loop
F1out->
F1in
Loop
F1out
->F1in
2 UK0 Loop UK0 Loop
B1, B2 & B*
unilateral
B1, B2 & B*
unilateral
F1 Loop
(optical)
3
B1, B2
& B* on both
sides
B1, B2
& B* on
both sides
B1, B2
& B* on both
sides
B1, B2
& B*
on both
sides
4
External
remote loop
External
remote loop
External
remote loop
External
remote loop
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Switching Test Loops
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For a detailed loop description, please refer to the relevant module
description.
Table 2.T: Test loops SHDSL
Loop no. SHDSL
1 LT SDSL loop NS direction
10 NT SDSL loop NS direction
11 NT E1 loop
12 Local E1 loop
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XMP1 Release 5.5 System Description
SDH Expansion in the XMP1 System
Aastra Proprietary Information Page 3-1
Chapter 3
SDH Expansion in the XMP1 System
3.1 Introduction
From the SDH view, the SDH expansion provides the following applications
in the XMP1 system:
STM-1/4 Terminal Multiplexer for 64 kbit/s connections up to STM-1
connections
STM-1/4 Add/Drop Multiplexer for 64 kbit/s connections up to STM-1
connections
Transparent transmission of 2 Mbit/s signals
XMP1 with SDH expansion is primarily used in networks with 64 kbit/s
connections where line interfaces with STM-1/4 access are required.
3.1.1 Applications
Terminal Multiplexer
When used as Terminal Multiplexer, the XMP1 system provides one
STM-1/4 Aggregate interface (or two with Dual Homing). The XMP1 PDH
kernel offers 64 kbit/s switching options for up to eight E1 interfaces
(internal interfaces). Also see Fig. 3.1.
Add/Drop Multiplexer
When configured as Add/Drop Multiplexer, the system can be used in single
or double rings. In addition to the same scope of PDH switching options as
provided by the Terminal Multiplexer, the system can offer SDH Tributary
interfaces in single rings. Also see Fig. 3.1.
Transparent 2 Mbit/s transmission
The SDH expansion also supports a transparent transmission of internal
and external 2 Mbit/s signals.
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Applications
Page 3-2 Proprietary Information Aastra
The following drawing shows the general application as Terminal and
Add/Drop Multiplexer.
XMP1
+
SDH
STM-1/4
2 Mbit/s 64 kbit/s
PDH
XMP1
+
SDH
PDH
XMP1
+
SDH
SDH PDH
STM-1/4
SDH
XMP1
+
SDH
PDH
STM-1/4 STM-1/4
Add/Drop-Mux Add/Drop Mux
Add/Drop Mux
Terminal Mux
Figure 3.1: Application as Terminal or Add/Drop Multiplexer
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Design of the SDH Expansion
Aastra Proprietary Information Page 3-3
3.2 Design of the SDH Expansion
The SDH expansion is implemented in the XMP1 system by means of the
following modules:
SCU (SDH Core Unit)
CU-E (Central Unit Expansion)
The SDH expansion of the XMP1 system is implemented on the SCU
module. This module occupies two card slots in the XMP1 subrack. The
CU-E sub-module is used as control module. It is mounted on the Central
Unit (62.7040.xxx.xx) of the node.
SCU (SDH Core Unit)
The SCU (SDH Core Unit) module is composed of the SCU-B and SCU-E
boards.
Each one of these boards can be equipped with an SDH Interface Unit
SIFU. These are providing the STM-1/4 interfaces. SFP modules (Small
Form Facture Pluggable Modules) are used for optical STM-1/4 interfaces
and the electrical STM-1 interface. These SFP modules carry out the
opto-electrical conversion of the interface signals. The optical fibers are
connected via LC plug connectors. With the electrical STM-1 interface, the
connection is set up using coaxial (straight) 1.0/2.3 plug connectors.
SIFU
SFP
SDH Core Unit SCU
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Design of the SDH Expansion
Page 3-4 Proprietary Information Aastra
The SCU-B board includes the SCP ASIC (SDH Core Processor ASIC), the
2 Mbit/s Tributary ASIC (P12LPU), the interface to the XMP1 PDH system
as well as a processor (PUC) for controlling the module. Furthermore, it
provides a line interface as well as external and internal 2 Mbit/s interfaces.
A second SCU-E board provides an additional line interface as well as
internal and external 2 Mbit/s interfaces. This board also includes the 60 V
voltage converters required to generate the necessary operating voltages.
Module protection can be configured by means of a second SCU module.
This second module is mounted in an adjacent card slot of the
XMP1 subrack. The two SCU modules are interconnected by a common
SCU-FP front panel.
CU-E (Central Unit Expansion)
The CU-E (Central Unit Expansion) sub-board is an expansion module for
the Central Unit of the node. It provides the control functions and
management interfaces to the SCUs (SDH Core Units).
CU-E
Central Unit
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SDH Functions
Aastra Proprietary Information Page 3-5
3.3 SDH Functions
The SDH functions provided by the SDH expansion of the XMP1 system are
made available by the SCP (SDH Core Processor). This SCP offers the line
and cross-connect functions of an SDH multiplexer.
The following functions are provided by the SCP:
2 x SDH line interfaces (West/East), configurable for STM-1 or STM-4
Overhead processing (SOH, HOVC, LOVC)
Overhead interface to the OH bus (SOH, HOVC)
32 x STM-1 ports for non-blocking VC switching (VC-4, VC-3, VC-2,
VC-12)
SETG (Synchronous Equipment Timing Generator)
3.4 Interfaces
In the XMP1 system, the SDH expansion provides the following interfaces:
STM-1/4 interface
(West)
External E1 interfaces
4 x 2 Mbit/s
External E1 interfaces
6 x 2 Mbit/s
Internal E1 interfaces
8 x 2 Mbit/s to PDH section via system bus
IB interface
to CU-E
STM-1/4 interface
(East)
Timing interface
T3, T4
SCU (SDH Core Unit)
SCP
Front panel to 2nd SCU
P12LPU
Central Uni t
CU-E
IB interface
to SCU
LAN
IB cable
PSPE
Figure 3.2: Interfaces of the SDH expansion
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Interfaces
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Optical STM-1/4 interfaces
The optical interfaces are made available by the SIFU (SDH Interface Unit)
via SFP modules. Up to two such SIFUs can be mounted on one SCU
module. A mixed equipment with both STM-1 and STM-4 modules and with
optical and electrical modules is possible.
Connection is implemented using LC-type plug connectors.
The following SIFU modules are available for Release 5.1:
Tab. 3.A: Optical STM-1/4 interfaces
STM-1
STM-1 S1.1 SH 1300 05HAM00088AAW
STM-1 L1.1 LH 1300 05HAM00089AAY
STM-1 L1.2 LH 1550 05HAM00090AAU
STM-4
STM-4 S4.1 SH 1300 05HAM00091AAW
STM-4 L4.1 LH 1300 05HAM00092AAY
STM-4 L4.2 LH 1550 05HAM00093AAB
Application class syntax (acc. to ITU-T G.957):
The application class is described using the following syntax:
Application - STM level - Wavelength range
L 1 . 1
Application:
S: Short-haul,
distance up to about 15 km
L: Long-haul,
distance up to about 40 km with 1300 nm,
distance up to about 80 km with 1500 nm
STM level:
1: STM-1
4: STM-4
Wavelength range:
.1: Wavelength range: 1300 nm
.2: Wavelength range: 1500 nm
The lasers used for the optical interfaces meet Laser Class 1
conditions both in operation and in case of a fault. The lasers are
maintenance-free.
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Interfaces
Aastra Proprietary Information Page 3-7
Electrical STM-1 interfaces
The following SIFU modules will be provided:
STM-1 EL 05HAM00107AAE with SFP electrical
STM-1 Patch 2 m 05HAM00108ACR with patch cable 2 m
Connections are implemented using coaxial 1.0/2.3-type plug connectors.
E1 interfaces
The following interfaces are available for 2 Mbit/s signals:
8 x 2 Mbit/s to the XMP1 PDH kernel via the system bus
10 x 2 Mbit/s, 6 dB equipment interfaces (In-house) for the external
connection of electrical 2 Mbit/s signals acc. to ITU-T G.703
(unstructured and structured acc. to ITU-T G.704).
Timing interfaces
The SCU module provides the timing interfaces T3 and T4. The T3 interface
permits an external T3 clock of 2048 kHz to be connected. The impedance
of this interface can be set to highly resistive, 120 Ohms or 75 Ohms.
The T4 timing interface supplies a 2048 kHz clock for synchronizing
external units.
LAN (CU-E)
The LAN interface on the CU-E (Central Unit Expansion) is used to connect
a network management system via a LAN infrastructure.
Internal bus (IB)
Communication between the SCU module and CU-E (Central Unit
Expansion) sub-module mounted on the Central Unit takes place via the
internal bus (IB).
Tab. 3.B: Electrical STM-1 interfaces
STM-1 EL 05HAM00107AAE with SFP electrical
STM-1 Patch 2 m 05HAM00108ACR with patch cable 2 m
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Functioning
Page 3-8 Proprietary Information Aastra
3.5 Functioning
3.5.1 Switching interfaces
SDH
The SDH expansion provides the following interfaces for switching
purposes:
2 STM-1 interfaces with 63 x 2 Mbit/s
2 STM-4 interfaces with 4 x 63 x 2 Mbit/s
10 external 2 Mbit/s interfaces
8 internal 2 Mbit/s interfaces to the PDH kernel
PDH
The PDH kernel provides the XMP1 interfaces already known.
3.5.1.1 Switching matrices
The following switching matrices are used for switching the signals applied
to the interfaces:
AU4 switching matrix
TU3 switching matrix
TU12 switching matrix
BPX64 switching matrix
AU4 switching matrix
To set up lower-order connections, the AU-4 signal must be disassembled
to a VC-4 signal. This is possible by establishing a bidirectional higher-order
connection from AU-4 to VC-4. This connection is no connection in the
usual sense, but represents a tool for disasssembling the AU-4 signal into
its sub-structures.
LPXVC3 switching matrix
The LPXVC3 switching matrix is used to switch VC3 containers between
HOA <-->HOA.
LPXVC12 switching matrix
The LPXVC12 switching matrix is used to switch VC12 containers of
function units LOI 2M, LO2M and HOA.
The external 2 Mbit/s signals are applied via the LPXVC12 switching matrix
to the TU-12s of the HOA.
BPX64 switching matrix
The BPX64 switching matrix is used to apply the 64 kbit/s signals from the
PDH kernel to function group IPMB64/2.
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Multiplex structure
Aastra Proprietary Information Page 3-9
3.5.1.2 Multiplex structure
Mapping
The SDH expansion uses a subset of the multiplex structure as defined in
ITU-T G.707. The diagram below shows the multiplex structure used in the
SDH expansion.
3.5.2 Traffic architecture
The SDH expansion is primarily based on the functions of the SDH Core
Processor SCP which provides the functions for data processing and
switching.
The following diagram gives an overview of the traffic architecture and the
connections between two SCUs and the XMP1 PDH kernel.
STM-1 AUG-1
TUG-3
TUG-2
TU-12
VC-4
VC-12 C-12
x7
x3
AU-4
x1
x1
x3
Pointer processing
Multiplexing
Aligning
Mapping
Figure 3.3: Multiplex structure of SDH expansion
SwitchA
SCP
Line
West A
Line
East A
SwitchB
SCP
Line
West B
Line
East B
XMP1
PDH
kernel
SDH Core
Unit A
SDH Core
Unit B
Trib B
Trib A
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Traffic architecture
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Connections between the SDH section and PDH kernel
The SDH expansion provides the STM-1/4 interfaces and 10 x 2 Mbit/s
interfaces for the connection of external 2 Mbit/s signals.
In the PDH kernel direction, there are eight 2 Mbit/s interfaces for switching
purposes.
The 64kbit/s switching matrix is used to apply the data of the PDH kernel to
the internal 2 Mbit/s interfaces (E12 internal) of the SDH expansion. Then
the corresponding VC12 is switched via the TU12 switching matrix in the
STM-1 or 2 Mbit/s direction (external).
The following drawing shows the switching matrices used and the resulting
switching options between the SDH expansion and XMP1 PDH kernel.
PDH
64 kbit/s
2 Mbit/s
Ext. 2 Mbit/s
(4 x 2 Mbit/s)
Ext. 2 Mbit/s
(6 x 2 Mbit/s)
STM-1 (West)
SDH
TU12
64kbit
(4 x 2 Mbit/s)
(4 x 2 Mbit/s)
SD bus
E12 internal
E12 internal
AU4
TU3
H
O
A
STM-1 (East)
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Clock Supply
Aastra Proprietary Information Page 3-11
3.6 Clock Supply
For their internal switching process, the network elements included in an
SDH network require a highly precise and stable clock (2048 kHz) which
must be recovered from a reference timing source (Primary Reference
Clock PRC).
The SDH expansion in the XMP1 system provides a SETS functionality
according to EN 300 417-6-1 (Synchronization Layer).
The SDH expansion can recover its clock from one of the following
reference timing sources:
the clock of an STM-N signal received (T1: STM-N port, SCU module),
the clock of a 2 Mbit/s signal received (T2: plesiochronous port, SCU
module, ext. 2 Mbit/s interface),
the synchronous network clock signal applied to the T3 interface,
the internal clock generated by a local oscillator.
Figure 3.5: Synchronous Equipment Timing SETG
Irrespective of the clock quality, clock selection can take place using the
associated priorities in both the revertive and non-revertive mode. The
STM-1 line interfaces are supporting the SSM functionality.
A retiming function is possible for external 2 Mbit/s signals.
SETG
function
T1
T3
T0
T4
SCU
T2
STM-N port
Plesiochr. port
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Synchronous Equipment Timing Source SETS
Page 3-12 Proprietary Information Aastra
3.6.1 Synchronous Equipment Timing Source SETS
In the Synchronous Digital Hierarchy, the clock generator is referred to as
SETS (Synchronous Equipment Timing Source). In the XMP1 system, the
SETS of the SDH expansion is located on the SCU module.
It provides the following features and functions:
Clock generation and clock recovery according to G.813.
When doubling the SCU module, the SETS is available redundantly
(1+1 Protection, both SETS active).
All reference timing sources are monitored (the failure or return of a
clock is signalled to the controller; in case of a failure of the active
reference timing source, it will switch over to a standby timing source).
Regarding the monitoring function and resulting measures, the SETS
distinguishes between transmission defects and clock defects.
Transmission of alarms and status messages to the Network
Management System or Operator Terminal.
Operating modes of the clock generator (SETS):
Tracking mode (synchronization to an external reference signal)
Holdover mode (if reference clock is too bad)
Free-run mode (startup mode).
3.6.2 Synchronous Status Message SSM
To permit easy automatic protection switching, the SETS of the SDH
expansion supports the use of the Synchronization Status Message SSM.
The SSM indicates the quality of the timing source used as basis for a
certain signal.
In case of STM-N signals, the Synchronization Status Message SSM is
transmitted in the S1 byte of the Section Overhead (SOH). S1 byte
transmission can be switched off.
The SSM can assume the values indicated in the following table.
In addition, it is also possible to permanently assign a certain SSM value to
incoming STM-N signals configured as reference timing source,
irrespective of the SSM value supplied with these signals.
Table 3.C: SSM values specifying the clock quality
SOH BYTE S1,
BIT 5 TO 8
CLOCK QUALITY OF THE
SELECTED REFERENCE CLOCK
0000 Quality unknown
0010 Clock source: G.811 / PRC
0100 Clock source: G.812 transit
1000 Clock source: G.812 local
1011 Clock source: G.813 / SETS
1111 Dont use for sync
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The SSM value of outgoing STM-N signals can be set to 1111 (Dont use
for sync) manually. Otherwise these signals will be assigned the SSM value
of the current clock quality of the internal T0 clock.
In case of plesiochronous signals, a SSM value is not transmitted. However,
for incoming plesiochronous signals configured as T2 reference timing
source , the operator can enter a SSM value and thus define the quality
manually. The same applies to the T3 clock which can be applied to the
external clock input.
In addition, each reference timing source can be assigned any priority
between 0 and 7: 0 means high priority, whereas 7 means low priority.
For all types of reference timing sources, the priority is assigned manually
by the user. This applies also to STM-N signals. The priority regarding the
use of T0 (internal system clock) and T4 (clock output) can be adjusted
separately.
The SETS selects the reference clock to be used according to the highest
clock quality (SSM). In case of identical quality, the higher priority
determines as to which reference clock will be selected.
3.6.3 SCU redundancy
The SETG functionality is doubled with the use of a second SCU module.
The active SCU then provides the SETG Master function and supplies the
internal system clock (for the SDH section) and T4 clock signal. The T4
clock signal can be selected using certain quality criteria.
The T1 timing sources of the active SCU (Master) are applied to the second
SCU (Slave).
The external timing interfaces T3 and T4 of the SCUs are connected via
Y-cables.
The following diagram shows the clock structure of the SCU.
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3.6.4 Clock supplied to the XMP1 PDH kernel
The SETG function of the SCU provides the SDH system clock T0, but not
the PDH system clock (for the XMP1 Central Unit).
From the network management view, the different hardware parts of the
SDH-based SETG and the PDH variant PET are not visible. The NMS only
displays the SETG.
However, it is possible to apply the SDH system clock T0 to the PET
function. In this case, the SDH system clock T0 can be used by the PET
function for clock selection.
This setting is made in the SOX via sub-address 1 of the Central Unit using
the Properties ->SDH Clock menu item and the "Use SDH clock" setting.
The default setting of the system does not provide the use of the SDH clock
for the PET function.
The following diagram shows the interaction between SETG and PET from
the network management view.
Core Unit A
SETG
function
Ext.
Y-cable
External
clock T3
Ext.
Y-cable
External
clock T4
Core Unit B
SETG
function
Inter-core
sync
T4
T4
System clock
T0
System clock
T0
T1
T1
9.72
MHz
Squelch
control
T3
T2
T2
T3
Figure 3.6: Clock with SCU redundancy
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If you want the clock network of the PDH network to remain independent,
do not select the "Use SDH clock" setting. The PDH clock selection will then
be independent of the SDH system clock T0. In this case, the current status
of PDH clock selection will not be visible in the SOA.
Since the T3 and T4 status of the XMP1 PDH section is not visible in the
SOA, it is necessary for an XMP1 with SDH expansion to relocate the
external clocks T3 and T4 from the Central Unit to the SCU. This also
improves the clock quality, because the PLLs of the SDH expansion provide
a higher quality. In this case, the clock lines must be connected to X22 of
the SCU module.
3.6.5 Clocks T3 and T4
The timing interfaces T3 and T4 are implemented on the 9-pin Sub-D
connector X22 (male). This connector is located on the front side of the SCU
module.
The impedance of the T3 interface can be set to highly resistive
(>1.6 kOhms), 120 Ohms or 75 Ohms.
SETG
function
NMS view
T2
T1
T3
T0
T4
PET
function
64k T4
64k T0
64k T2
64k T3
Setting:
Use SDH clock
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3.6.6 Functioning of the SETS
The following diagram explains the functioning of the SETS in the SDH
expansion.
The SETS has eight configurable timing sources TS (1) to TS (8), i.e. eight
reference timing sources can be connected to the SETS. The reference
timing sources T1, T2 and T3 can be applied to timing sources TS(2) to
TS (8).
The following applies to the SDH expansion:
The internal oscillator is permanently connected to TS (1) on a
hardware basis.
TS (2) to TS (5) are used for clock T1.
TS (6) is used for PDH clock T2.
TS (7) is used for clock T3.
Selector switches SELECT A and SELECT B select one of the reference
timing sources via the clock sources. The priorities for these switches can
be adjusted at the Operator Terminal.
The reference clock made available at T4 can be recovered from reference
timing sources TS (2) to TS (5).
Oscillator
SETG
Autom.
squelch
SELECT
A
SELECT
B
SELECT
C
T4
T1: Any STM-N port
T2: Any plesiochronous port
1)
T3: Timing input (on the CPM-SWM)
T0
TS(8)
TS(7)
TS(6)
TS(5)
TS(4)
TS(3)
TS(2)
TS(1)
Recovered
clock
No clock
Non-recovered
clock
R
e
f
e
r
e
n
c
e
t
i
m
i
n
g
s
o
u
r
c
e
s
1)
Recommendations G.813 and ETS 300 462-5 include information on permissible jitter and
wander values. Due to their TU-12 pointer jitter, non-recovered 2 Mbit/s signals from SDH
networks must not be used as timing sources for downstream networks.
T0: Internal system timing interface
T4: Timing output (on the CPM-SWM)
Figure 3.7: SETS in the XMP1 SDH expansion
PET
T1
T1
T1
T1
T2
T3
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The SETG (Synchronous Equipment Timing Generator) receives the clock
from SELECT B and uses it to generate clock T0 required by the network
element itself and made available to the modules.
SELECT A passes on the clock to the adjustable "Autom. squelch" switch.
The latter decides whether the clock quality is sufficient and whether the
clock will be switched through to selector switch SELECT C. SELECT C
chooses the clock to be sent out at T4 (previously T3out). Both switches can
be adjusted at the Operator Terminal.
Clock T0 can also be used for clock recovery in the PDH kernel. Clock T0
is then routed from SETG to PET of the PDH section. If one of the XMP1
nodes recovers its clock from the SDH clock, this clock will still be
distributed in the network with priority 65535 via the 2MB ports of XMP1.
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3.7 Protection
The reliability and maintenance of transmisssion networks are important
aspects to be taken into consideration when using multiplexers. In this
conjunction, redundancy configurations are playing a decisive role. The
redundancy of both transmission channels and certain multiplexer modules
is reasonable.
The SDH expansion in the XMP1 multiplexer supports the following
protection types:
Sub-Network Connection Protection SNCP 1+1
Multiplex Section Protection MSP 1+1
2 Mbit/s protection (internal)
Module protection
3.7.1 Traffic protection
3.7.1.1 SNCP Sub-Network Connection Protection
In SNCP configurations, the entire transmission path or individual path
segments between the transmitter and receiver can be protected. Such a
SNCP configuration can also cover several multiplexers.
In case of a failure of the operating path, the system switches over
automatically to the protection path (standby path).
The following drawing shows the principle SNCP concept.
The payload to be protected and available as virtual container (VC) is
transmitted via two different interfaces and transmission paths to the
receiver. In the receiver, both VCs are monitored and one of them will be
selected.
The SDH expansion in the XMP1 supports the following SNCP types as
defined by ITU-T G.841:
SNC/I (inherent)
SNC/N (non-intrusive)
Operating path
Protection path
Path Segment
Doubling Selector
VC-xy
VC-xy
Figure 3.8: Principle of Sub-Network Connection Protection (SNCP)
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SNCP can be configured for the following VC levels:
VC-4,
VC-3,
VC-12.
SNCP features
Traffic signals are transmitted redundantly;
SNC/I (inherent), SNC/N (non-intrusive);
Single-ended switching (switchover takes place in the receiver only);
Unidirectional/bidirectional;
Non-revertive switching (no automatic reversion) or revertive switching
(automatic reversion);
Manual switchover;
Switching criteria: Signal Fail SF, Signal Degrade SD;
No extra traffic possible.
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3.7.1.2 MSP Linear Multiplex Section Protection
With Multiplex Section Protection (MSP), the entire multiplex section
between two multiplexers will be protected.
Transmission takes place both via the operating path and protection path.
In case of a failure of the operating path, switchover to the protection path
takes place automatically in the far end.
In the XMP1 unit, Multiplex Section Protection is used for the protected
transmission via STM-N signals (of the SCU module).
A MSP can be configured for STM-N interfaces of on SCU module and for
STM-N interfaces of different SCU modules.
The STM-N signal to be protected is doubled on the SCU module of the
transmitter and send out via two line interfaces. On the SCU module of the
receiver, a selector is used to select the operational transmission path.
MSP 1+1 features
Single-ended, switchover in one MUX
Dual-ended 1+1, switchover in both MUXs
Revertive; reversion once the operating path has been restored
Non-revertive, no reversion after the operating path has been restored
No extra traffic possible
Switchover
Switchover between the operating path and protection path takes place in
case of the following events:
Line errors locally detected (SF and SD)
Appropriate operator entries via the LCT or Element Manager:
Force switch traffic to working channel.
Force switch traffic to protection channel.
Manual switch traffic to working channel.
Manual switch traffic to protection channel.
Lockout of protection.
Doubling
Selector switch
Working channel
Protection channel
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A request received from the far end is executed either using the
protocol in compliance with ITU-T G.841 or a proprietary K1/K2
protocol. These requests are valid only in the bi-directional mode.
Requests include:
Lockout of protection
Force switch traffic to working channel
Force switch traffic to protection channel
Manual switch traffic to working channel
Manual switch traffic to protection channel
SF on operating path
SD on operating path
SF on protection path
SD on protection path
Wait to restore
Exercise
Reverse request
Do not revert
No request
Protocols for MSP switchover
Two different protocols can be used for MSP 1+1 control via K1- K2 bytes:
the ITU-T G.841 protocol and
a proprietary (accelerated) K1/K2 protocol with enhanced switchover
behaviour.
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MSP with one SDH module SCU
If an XMP1 node includes only one SCU module, MSP 1+1 can be
configured as follows:
Example 1: see Fig. 3.9
- STM-N West: Working channel
- STM-N East: Protection channel
Example 2:
- STM-N West: Protection channel
- STM-N East: Working channel
MSP with two SDH modules SCU in an XMP1 node
If an XMP1 node includes two SCU modules, MSP 1+1 can be configured
between all STM-N interfaces of the modules available.
Example 1: see Fig. 3.10
SCU-A:
STM-N West: Working channel
SCU-B:
STM-N East: Protection channel
Example 2: see Fig. 3.11
SCU-A:
STM-N West: Protection channel
SCU-B:
STM-N West: Working channel
STM-N
West
STM-N
East
SCU
STM-N
West
STM-N
East
SCU
Working channel
Protection channel
Figure 3.9: MSP 1+1 with one SCU module in the XMP1 node (example 1)
XMP1 node 1 XMP1 node 2
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STM-N
West
STM-N
OST
SCU-A
STM-N
West
STM-N
East
SCU-A
Working channel
STM-N
West
STM-N
East
SCU-B
STM-N
West
STM-N
East
SCU-B
Protection
channel
XMP1 node 1
XMP1 node 2
Figure 3.10: MSP 1+1 with two SCU modules in the XMP1 node (example 1)
STM-N
West
STM-N
East
SCU-A
STM-N
West
STM-N
East
SCU-A
Protection channel
STM-N
West
STM-N
East
SCU-B
STM-N
West
STM-N
East
SCU-B
Working
channel
XMP1 node 1 XMP1 node 2
Figure 3.11: MSP 1+1 with two SCU module in the XMP1 node (example 2)
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3.7.1.3 2 Mbit/s protection
Internal 2 Mbit/s ports
For internal 2 Mbit/s ports, the 2 Mbit/s protection options supported by the
PDH kernel can be configured.
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3.7.2 Module protection
3.7.2.1 SDH Core Unit Protection
The SDH Core Unit Protection is a SCU protection implemented at the
equipment level. This protection covers the functions of the switching matrix
and the synchronization functions of the SDH Core Unit. Since the SDH
Core Unit also supports the connection of external 2 Mbit/s signals, these
signals will also be protected by a SDH Core Unit Protection configuration.
The 2 Mbit/s signals are routed and applied to the interfaces via Y-cables.
For such a protection configuration, two SCU modules are mounted in the
XMP1 subrack in two contiguous card slots. These two SCU modules are
interconnected by means of the SCU-FP front panel.
One SCU acts as Master, the other one as Slave.
The SDH Core Protection configuration is non-revertive, i.e. there will be no
automatic reversion from the Protection SCU (Slave SCU) to the primary
SCU (Master SCU) once the latter operates again correctly, e.g. after
replacement of a faulty module.
3.7.2.2 CU-E Protection
The CU-E is mounted as sub-module on the Central Unit of the XMP1 node.
The Central Unit in the XMP1 node can be doubled.
With Central Unit redundancy, the CU-E sub-module must be mounted on
both Central Units.
In case of a Central Unit switchover, switchover also takes place from one
CU-E sub-module to the other. Thus, it is ensured that an active CU-E is
never on a passive Central Unit.
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3.8 Management Functions
3.8.1 Fault Management
The Fault Management in the SDH expansion is executed in compliance
with ITU-T G.784.
BW7R alarm signalling scheme
The BW7R alarm signalling scheme is processed on the Central Unit. The
required alarm information from the SDH expansion is routed via the CU-E
sub-module to the Central Unit and processed by the latter.
SDH alarms
See Section 6.8.1, Alarm list for SDH alarms.
3.8.2 Configuration Management
The Configuration Management covers the following functions:
Connection Management
Interface Configuration
Clock Management
3.8.2.1 Connection Management
The Connection Management of the SDH expansion provides the following
functions:
Add connections
Delete connections
Modify connections
These connections can have the following attributes:
Unidirectional or bidirectional connections
VC type: VC-4/3/12 for STM-N interfaces, VC-12 for E1 interfaces
Connection status: configured, activated
Protection
3.8.2.2 Interface configuration
The different interfaces and their sepcial versions permit the following
configuration options:
Optical SDH Physical Interface OSPI
Activate/deactivate laser
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Test loop (port, switching matrix)
STM-1/4 Regenerator Section
Trail trace identifier
BER thresholds
Switch through byte D, E, F
STM-1/4 Multiplex Section
BER thresholds
Switch through byte D, E
Forced SSM
Higher Order Path
Signal structure, signal label
Trail trace identifier
BER thresholds
2Mbit/s interfaces
Interface modes (PCS, transparent)
Retiming mode
Lower Order Path
Mapping
Signal label
Trail trace identifier
BER thresholds
3.8.2.3 Clock Management
The Clock Management deals with the configuration and behaviour of
SETG functions. Its main tasks include:
Configuration of timing sources (T1, T2, T3, internal oscillator)
Quality of timing sources
Priority of timing sources
Clock selection criteria (quality, priority, error status)
For further information, please refer to Section 3.6, Clock Supply .
3.8.3 Software and Data Management
Application software
The application software of the SDH expansion running on the SCU module
and CU-E sub-module must be considered separate from the XMP1 Central
Unit software. It is stored in a FLASH memory on the CU-E sub-module.
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This non-volatile memory is composed of two banks, i.e. an active and a
passive bank. The application software is downloaded to the passive bank
via the XMP1 Central Unit.
During the SCU startup process, the application software is loaded to the
RAM of the SCU processor.
With Central Unit redundancy and thus CU-E sub-module redundancy, the
application software of the CU-E is aligned between the active and passive
Central Unit via the internal bus (IB).
SDH database
The SDH database is stored in a RAM located on the CU-E sub-module.
From there it is saved to a battery-buffered flash bank of the Central Unit.
The SDH database can be uploaded and downloaded together with the
PDH database. The data are downloaded always to the passive bank.
An alignment process between the active and passive CU-E ensures data
consistency between the active and passive CU-E sub-module.
3.8.4 Equipment Management
The Equipment Management covers the modules and sub-modules of the
SDH expansion.
These include:
SCU
SIFU (2)
SFP (2), only for SFP-based SIFU
Main functions:
Module detection
RID (remote inventory data)
In-service configuration changes
Nominal/actual equipment
Module insertion/extraction detection
Module insertion or alarm signalling on extraction
LED management
3.8.4.1 Remote inventory data (RID)
The RID data provide information on modules and sub-modules used in the
SDH expansion. This information can be requested via the NMS.
RID data are available for:
SCU module
SIFU sub-module
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SFP module
The following drawing shows the physical and logic view of the modules and
sub-modules with their RID data.
GB =Remote Inventory Data (RID)
SCU
SCU-B
SIFU
SFP
GB
GB
GB
SCU-E
SIFU
SFP
GB
GB
Physical view
SCU
SIFU
SFP
GB
GB
GB
SFP
GB
Logic view
SIFU
GB
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3.9 Network Management
The existing PDH functionality and additional SDH expansion are described
in a common information model. The PDH and SDH functionality are treated
as network element. The information model is based on the existing function
units for SDH and PDH.
With release 5.0 and higher, the network management for the SDH
expansion of XMP1 will be implemented using the ServiceOn XMP1 (SOX)
Network Management System based on the information model. This
permits an easy transition to the planned ServiceOn Access utilization.
3.9.1 ServiceOn XMP1
The ServiceOn XMP1 (SOX) Network Management System is the
successor of the Control Computer previously used.
The ServiceOn XMP1 Network Management System is used to control,
configure and monitor pure XMP1 networks.
PCs with the MS Windows Server 2003