Design and Control of Photoash Capacitor Charging Circuits

by

Michael G. Negrete
Submitted to the Department of Electrical Engineering and Computer Science in partial fulllment of the requirements for the degree of Masters of Engineering in Electrical Engineering and Computer Science at the MASSACHUSETTS INSTITUTE OF TECHNOLOGY January 2004 c Linear Technology Corp, MMIV. All rights reserved. The author hereby grants to MIT permission to reproduce and distribute publicly paper and electronic copies of this thesis document in whole or in part.

Author . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Department of Electrical Engineering and Computer Science January 16, 2004 Certied by . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Albert M. Wu Design Engineer VI-A Company Thesis Supervisor Certied by . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . David J. Perreault Assistant Professor M.I.T. Thesis Advisor Accepted by . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Arthur C. Smith Chairman, Department Committee on Graduate Students

Design and Control of Photoash Capacitor Charging Circuits by Michael G. Negrete

Submitted to the Department of Electrical Engineering and Computer Science on January 16, 2004, in partial fulllment of the requirements for the degree of Masters of Engineering in Electrical Engineering and Computer Science

Abstract
This thesis develops an optimal strategy for charging photoash capacitors. Photoash capacitors need to be charged to voltages as high as 350V in low-voltage batterypowered portable devices. With the decreasing size of digital cameras, existing solutions are too large. This thesis will study the operation and losses of a yback capacitor charger. Specically, the thesis will focus on minimizing the solution size, given an input current, in addition to keeping eciency acceptable. VI-A Company Thesis Supervisor: Albert M. Wu Title: Design Engineer M.I.T. Thesis Advisor: David J. Perreault Title: Assistant Professor

Acknowledgments
This thesis would not have been possible without assistance of the people below. First, I would like to thank Albert Wu and Steve Pietkiewicz for proposing the idea behind this thesis. Albert Wu served as a great mentor and supervisor. I learned a great deal from his expertise in the area of circuit design and power electronics and this will continue to benet me in the coming years. I would like to thank Professor Perreault for volunteering to be my thesis advisor with his already tremendous work load. He gave many insightful comments to some of the ideas presented in my thesis well before the ambitious deadline I set for myself. There are many other individuals that served as valuable sources of information at Linear Technology that I would like to thank too. This thesis would not be possible without the support from Linear Technology and Dave Bell. Dave Bell always made sure my project was exciting and relevant throughout my VI-A internship. And last but not least, I could not have done such a professional job on the diagrams without assistance from Ilyssa Lu. I would also like to thank all my family and friends that have supported throughout my life, especially when times have been tough. I extend my biggest thanks to my parents, who have served as a crucial role model and inspiration throughout my life. My father has encouraged a curiosity about how things work at an early age, and this has done wonders to my ability to excel at engineering. I credit my mother for helping me develop the personal skills needed to get through life and always trying to keep me humble. I would also like to thank my sister for giving me some of her enthusiasm.

Contents
1 Introduction 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 18 20 23 23 27 27 28 28 30 33 33 34 34 35 36 36 37 38 39

2 Operation of a Flyback Converter 2.1 Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Boundary Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . 2.6 Linear Technology Flyback Capacitor Chargers . . . . . . . . . . . . 3 Modeling a Flyback 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Losses associated with the switch . . . . . . . . . . . . . . . . . . . . 3.2.1 3.2.2 Switch Resistance Losses . . . . . . . . . . . . . . . . . . . . . Losses due to Rise and Fall Time of Switch . . . . . . . . . . .

3.3 Losses from Transformer . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.1 3.3.2 3.3.3 3.3.4 Loss from Leakage Inductance . . . . . . . . . . . . . . . . . . Loss from DC Winding Resistance . . . . . . . . . . . . . . .

Core Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transformers Parasitic Capacitance Loss . . . . . . . . . . . . 7

3.4 Diode Losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Charge time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Modeling in MATLAB 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 Calculating Individual Losses . . . . . . . . . . . . . . . . . . . . . . 5 Design, Construction and Testing of a Flyback Capacitor Charger 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3 Construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

39 41 43 43 43 49 49 49 53 54 54 55 57 57 57 60 61 61 65 66 69 69 69 71 77 81 83 88

5.4 Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 Boundary Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . 5.6 Final Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Transformer Optimization 6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2 Transformer Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.3 Hand-winding Transformers . . . . . . . . . . . . . . . . . . . . . . . 6.4 Measuring Inductance Values for Transformer Model . . . . . . . . 6.5 Eects of Leakage Inductance . . . . . . . . . . . . . . . . . . . . . . 6.6 Eects of the Transformers Capacitance . . . . . . . . . . . . . . . . 6.7 Energy Storage Requirements . . . . . . . . . . . . . . . . . . . . . . 7 Experimental Results 7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.2 Correlation of Simulated and Measured Data . . . . . . . . . . . . . . 7.3 Magnetizing Inductance . . . . . . . . . . . . . . . . . . . . . . . . . 7.4 Alpha Comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5 Turns Ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.6 Scaled Transformer Core . . . . . . . . . . . . . . . . . . . . . . . . . 7.7 Experimental Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . 8

8 Flash Unit 8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2 Self-Oscillating Capacitor Charger . . . . . . . . . . . . . . . . . . . . 8.3 Xenon Bulb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.4 IGBT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Conclusion 9.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.2 Further Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A MATLAB Code B Board Layout

91 91 91 93 96 99 99 99 101 109

10

List of Figures
1-1 Generic yback converter. . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Flyback converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Primary current waveform. . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Secondary current waveform. . . . . . . . . . . . . . . . . . . . . . . . 2-4 Magnetizing inductor current. . . . . . . . . . . . . . . . . . . . . . . 2-5 Second order network when switch turns on. . . . . . . . . . . . . . . 3-1 Magnetizing inductor current. . . . . . . . . . . . . . . . . . . . . . . 3-2 Primary current waveform. . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Switch turn o waveform. . . . . . . . . . . . . . . . . . . . . . . . . 3-4 Switch turn on waveform. . . . . . . . . . . . . . . . . . . . . . . . . 3-5 Secondary current waveform. . . . . . . . . . . . . . . . . . . . . . . . 3-6 Scope shot: Ch4 is primary switch pin. . . . . . . . . . . . . . . . . . 3-7 Diode reverse recovery current. . . . . . . . . . . . . . . . . . . . . . 4-1 Breakdown of losses from a typical yback charger (Part 1 of 2). . . . 4-2 Breakdown of losses from a typical yback charger (Part 2 of 2). . . . 4-3 Eciency curve for yback converter with alpha=0 and L=24uH. . . 4-4 Eciency versus magnetizing inductance. . . . . . . . . . . . . . . . . 5-1 Flyback capacitor charger test circuit. . . . . . . . . . . . . . . . . . . 5-2 Simulated primary and secondary currents of test circuit. . . . . . . . 5-3 Circuit diagram of the boundary mode controller. . . . . . . . . . . . 19 24 24 24 26 29 34 34 35 35 37 40 40 44 45 46 48 50 52 55

5-4 Scope shot: Ch1 is output voltage, and Ch3 is input current(.25A/div). 56 11

6-1 Transformer model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 Scope shot: Ch3 is primary current (AC coupled, .1A/div), and Ch4 is switch voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3 Scope shot: Ch2 is secondary winding Pin, and Ch3 is secondary winding current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4 Scope shot: Ch3 is real primary current (ac coupled, 1A/div), and Ch4 is primary switch pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5 Scope shot: Ch3 is real secondary current (inverted, 100mA/div), and Ch4 is primary switch pin. . . . . . . . . . . . . . . . . . . . . . . . . 6-6 Scope shot: Ch1 is amplied primary current(1A/div), Ch2 is amplied secondary current(100mA/div), and Ch4 is primary switch pin. . . .

60

63

63

64

65

66 67 72 72 73 73 74 74 75 75 76 78 79 80 80 81 82 84 84

6-7 Magnetizing inductance increase with . . . . . . . . . . . . . . . . . 7-1 Eciency versus output voltage for L=10uH and = 0. . . . . . . . . 7-2 Eciency versus output voltage for L=10uH and = 0.1. . . . . . . . 7-3 Eciency versus output voltage for L=16uH and = 0. . . . . . . . . 7-4 Eciency versus output voltage for L=16uH and = 0.1. . . . . . . . 7-5 Eciency versus output voltage for L=16uH and = 0.2. . . . . . . . 7-6 Eciency versus output voltage for L=24uH and = 0. . . . . . . . . 7-7 Eciency versus output voltage for L=24uH and = 0.2. . . . . . . . 7-8 Eciency versus output voltage for L=24uH and = 0.4. . . . . . . . 7-9 Eciency versus output voltage for L=24uH and = 0.6. . . . . . . . 7-10 Inductance versus eciency. . . . . . . . . . . . . . . . . . . . . . . . 7-11 Eciency versus alpha with variable gap length. . . . . . . . . . . . . 7-12 Eciency versus alpha with xed gap length. . . . . . . . . . . . . .

7-13 Maximum frequency versus alpha with variable gap length. . . . . . . 7-14 Maximum frequency versus alpha with variable turns. . . . . . . . . . 7-15 Eciency curves with dierent turns ratios. . . . . . . . . . . . . . . 7-16 Eciency versus volume factor. . . . . . . . . . . . . . . . . . . . . . 7-17 Eciency per unit volume versus volume factor. . . . . . . . . . . . . 12

7-18 Magnetizing inductance versus volume factor. . . . . . . . . . . . . . 7-19 Primary peak current versus volume factor. . . . . . . . . . . . . . . . 7-20 Scope shot: Ch1 is secondary current waveform(100mA/div), and Ch4 is switch waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

85 85

87

7-21 Scope Shot: Ch1 is primary current(1A/div), and Ch3 switch waveform. 87 8-1 Self-oscillating capacitor charger circuit diagram. . . . . . . . . . . . 91 94 95 95 96 97

8-2 Xenon triggering circuit. . . . . . . . . . . . . . . . . . . . . . . . . . 8-3 Xenon triggering waveform. . . . . . . . . . . . . . . . . . . . . . . . 8-4 Xenon bulb current. . . . . . . . . . . . . . . . . . . . . . . . . . . .

8-5 IGBT circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6 Illustrative IGBT waveforms. . . . . . . . . . . . . . . . . . . . . . .

B-1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

13

14

List of Tables
4.1 Table of inputs to total eciency function for yback charger. . . . . 7.1 Total eciency using capacitor energy method. . . . . . . . . . . . . 7.2 Equivalent switch capacitance eects with turns ratio. . . . . . . . . . 47 71 82

15

16

Chapter 1 Introduction
1.1 Background

This thesis develops an optimal strategy for charging photoash capacitors. Two ICs developed by Albert Wu at Linear Technology, LT3420 [2]and LT3468 [1], inspired the ideas presented in this thesis. These ICs implement two dierent charging strategies, both focusing on shrinking the solution size while improving the eciency over previous charging methods. Only one other signicant research paper, by Sokal, has been written on charging capacitors. In [5], Sokal comes to a conclusion on the fastest and most ecient method to charge a capacitor given a maximum peak switch current. The techniques developed in this thesis are most applicable to charging photoash capacitors in digital cameras. Before the wide spread use of electronics, cameras used individual ash bulbs or ash bars to produce a 40ms pulse of intense white light from a chemical reaction. About 40 years ago, professional photographers started to use electronic ashes with a much shorter 1ms pulse of white light, generated using a Xenon bulb. Electronic ashes were not used extensively until the last 10 years when all but the cheapest cameras utilize them as standard equipment. With improvements in technology in the last ten years, cameras have decreased considerably in size. The smallest digital camera is the size of a
1 4

inch thick credit card. Cell phones now feature built-in

digital cameras, which may someday incorporate an integrated Xenon ash. With 17

space as a premium in camera cases, the size of the ash capacitor charger is critical to its utility. Currently, popular methods to charge a photoash capacitor include the selfoscillating forward converter and the micro-controlled yback converter. The selfoscillating forward converter is comparatively the most cost eective, since it requires only a few discrete transistors. However, it is inecient at low voltages and the custom multi-winding transformers are too bulky for the increasingly feature-packed digital and lm cameras. This type of charger is only found in disposable and inexpensive lm cameras. Most other cameras produce a ash with a microprocessor-controlled yback converter. It controls the gate of a power switch with a pre-programmed set of switch on and o times with only the ability to detect the primary current and the output voltage. Since the controller cannot sense secondary current, the controller has to store an algorithm to calculate an appropriate switch o-time. If the secondary current decays to zero before the end of the o-time, the circuit will remain idle which increases the peak-current requirements, thus it enlarges the transformer and the switch. Clearly, a more eective method of charging capacitors exists. This thesis will explore the variable frequency control methods explained in [5], but apply them to the rapidly expanding market of digital cameras.

1.2

Overview

To generate a ash, a Xenon ash bulb requires a special capacitor charged to a high voltage. This thesis will study methods to charge this photoash capacitor from a low input voltage with a power limit. The required capacitance is determined by the size of the ashbulb. [7] Without variations in eciency, the charge time is set by the nal output voltage, the output capacitance, and the input power. As a result of this dependency, this makes solution size and eciency the most important features of a capacitor charger. This thesis will focus on analyzing yback capacitor charger performance normalized to a given input power specication. 18

A yback converter consists of a transformer, switch, diode, output capacitor and control circuitry. Figure 2-1 shows the conguration of a yback converter. The transformer serves as the energy storage device. With the switch on, the transformers magnetizing inductance magnetizes from the input power source. The input voltage determines the rate of magnetization. When the core of the transformer becomes close to saturation, the switch turns o, forcing the transfer of current from the transformers primary winding to the secondary winding. The current from the secondary winding ows through the diode to the output capacitor. Depending on the charging strategy, the switch might turn on to terminate the current to the output capacitor before the secondary current falls to zero. The secondary winding has more turns than the the primary winding to limit the voltage the switch has to withstand.
1:N Vout

Vin

Figure 1-1: Generic yback converter. In a yback converter with ideal components, the amount of magnetizing inductance would not aect the charge time of the charger, but would only determine the operating frequency. With stray capacitances on the switch node and core losses, eciency decreases with increased operating frequency. Therefore, a magnetizing inductance should be determined to keep the operating frequency below a maximum operating frequency. This maximum operating frequency would be dependent on the type of core material used and the amount of stray capacitance on the switch node. Although losses from the core and the stray capacitance decrease with larger magnetizing inductance, more turns are needed for both the primary and secondary 19

windings, thereby increasing the winding resistance. An accurate model of these losses is needed to determine the optimum amount of magnetizing inductance. All the loss terms for a yback charger may be easily derived analytically as a function of the output voltage. These equations could be added together analytically, but would result in a large, un-intuitive equation. Instead, MATLAB is used to plot, sum and integrate these equations numerically. MATLAB is also capable of converting a power loss in terms of Vout to a total charge cycle eciency. This thesis will rely on MATLAB to plot total eciency versus parameters such as magnetizing inductance. The calculations done in MATLAB will focus the experimentation and be correlated with actual data afterwards. For the experiments, a yback controller was built with adjustable primary and secondary current limits. The primary and secondary currents are measured with sense resistors and op amps. With control over both current limits, the controller is capable of keeping the maximum input current constant with all the charging strategies. The controller is also capable of turning the switch on by monitoring the switch node voltage instead of the secondary current. The yback capacitor charger is exible enough to use a wide range of transformers. These transformers have dierent magnetizing inductances, turns ratios, winding window allocations, and core gap lengths. A TDK EPC10 core is used for all of the experiments. [6]

1.3

Organization

In Chapter 2, the thesis explains the operation of a yback capacitor charger and the benets of variable-frequency operation. The components are also discussed briey. In Chapter 3, the yback chargers losses are modeled analytically, along with the charge time. Chapter 4 outlines the techniques used in MATLAB to compute losses with the analytical models. From there, Chapter 5 describes the construction and testing of a yback capacitor charger. Chapter 6 analyzes the transformer in detail. Chapter 7 compares the experimental results with the simulations and also suggests optimal values for components. Chapter 8 is an overview of the components used to 20

create a ash in a digital camera. Finally, conclusions and suggestions for further work are discussed in Chapter 9.

21

22

Chapter 2 Operation of a Flyback Converter

2.1 Theory

A yback converter, as shown in Figure 2-1, consists of a transformer, a power transistor, a diode, and an output capacitor. The following description of a yback converter is valid for one that regulates or charges. The switch turns on to allow the current in the magnetizing inductance of the transformer to reach a peak value, Ilim , as shown in Figure 2-2. The slope of the current in the charging pulse is constant over the charging cycle. When the switch turns o, the magnetizing inductance delivers current to the output capacitor through the secondary winding; this time period is known as the yback period. The peak secondary current is N times smaller than the primary current, as shown in Figure 2-3. As the output voltage increases, the secondary current decreases faster. 1 = T
T 0

Psw

1 2 2 Rsw Isw dt = dIlim Rsw [ + (1 )2 ] 3

(2.1)

Most regulating yback converters operate in a constant-frequency control mode. With a constant-frequency, the steady-state duty cycle is determined solely by the input voltage, output voltage, and the turns ratio. However, with a light load, the converter enters discontinuous mode and the duty cycle relationship is no longer valid. Discontinuous mode occurs when the magnetizing current falls to zero before 23

1:N

Vout

Vin

Figure 2-1: Flyback converter.

Isw Ilim Ilim

dT

Figure 2-2: Primary current waveform.

Isw Ilim /N Ilim /N

dT

Figure 2-3: Secondary current waveform.

24

the switch turns on again. In discontinuous mode, the duty cycle controls the average current to the output capacitor. In lieu of duty cycle control, many regulators control duty cycle implicitly by controlling the peak current in the primary winding which allows converters to operate in either continuous or discontinuous mode. Converters use a sense resistor between the emitter of the switch and ground to sense the peak current. The peak current limit is adjusted by sensing if the output voltage is above or below the set output voltage. Constant-frequency control works eciently with a constricted output voltage range, but in the charging of a capacitor, the output voltage ranges from 0 volts to the nal output voltage which could be as high as 500 volts. The voltage across the secondary winding varies drastically, resulting in o-times that vary by a 500:1 ratio. At low voltages, the duty cycle will become very small and will approach the minimum on-time of the controller. Once the minimum on-time is reached the part can no longer return the magnetizing current to the level at the start of the switch cycle. The magnetizing current will increase with every switching cycle. To limit current, the regulator will need to be capable of skipping cycles to let the secondary current fall below the current limit which will in turn reduce the switching frequency. At high output voltages, the secondary current falls fast compared to switch on-time. As a result, the secondary current falls to zero before the end of the switching period, leaving the circuit in an idle state, which leads to higher peak currents for a given input power. At both low and high output voltages, undesirable operation occurs when implementing constant-frequency control for charging capacitors. To operate more eciently in capacitor charging, the yback converter should operate with a variable frequency. Without a set switching frequency, the circuit determines when to end the yback period. As in the constant-frequency case, the switch turns o once the primary winding current reaches a current limit. One method to determine when to terminate the yback period involves sensing the secondary winding current. The switch is turned back on once the current falls to a fraction of the current limit. This technique is shown in Figure 2-4 where is the ratio of the secondary current to the primary current. In [5], Sokal and Redl discuss yback 25

charging circuits. They conclude that an close to unity, producing at current pulses to the output capacitor, minimizes peak and RMS currents, thus reducing losses associated with parasitic resistances and current-carrying requirements of the switch, transformer and the diode. In contrast with their ndings, the Linear Technology converter LT3468 switches when the secondary winding current falls to zero [1]. This charging method may use a smaller inductor and reduces the losses due to parasitic capacitances of the transformer on the collector of the switch. Isw
6

Ilim Ilim
-

dT

Figure 2-4: Magnetizing inductor current. While charging, the yback capacitor charger needs to be able to sense when the output voltage reaches the desired value. A resistive voltage divider connected to the output is commonly used in regulators. With a nite resistance voltage sense amplier connected to the output of the voltage divider, the resisters cannot be made arbitrarily large, therefore a substantial current can ow through the resistors when the output is near its nal value. This loss is unacceptable in battery operated devices. Not only does it lower the eciency of the yback capacitor charger, the capacitor loses its charge from the end of the charging period till the user presses the ash button. Linear Technology has patented a method to avoid this problem by sensing the voltage on the primary winding during the yback period [3]. When the switch is o, the diode is conducting and the output voltage is across the secondary winding. The switch node sees the input voltage plus the output voltage divided by the turns ratio. By subtracting the input voltage with a circuit, the output voltage is available to the control circuitry without power dissipation from the output voltage. At high voltages, the yback period, or o-time, becomes very short. tof f =
Lsec Ilim (1) . Vout N

For a comparator to sense this voltage during the yback period, there

is a minimum o-time based on the speed of the comparator. For the output voltage 26

sense to work correctly, the inductance of the secondary winding has to satisfy the following relationship: Lsec >
tof f Vf inal N . Ilim (1)

Without considering eciency, this inequality

limits the minimum size of the transformer.

2.2

Transformer

The transformer is often the most complicated component in a yback converter, and often accounts for the majority of losses. In a yback transformer, the magnetizing inductance acts as the main energy storage device. The transformer acts as a coupled inductor, since current never ows through both windings simultaneously, thus never obeying the current relationship of an ideal transformer. The turns ratio of the transformer serves two main purposes: to protect the power switch from the high output voltage, and to decrease the rate of decay of the magnetizing current. The turns ratio should be kept to a minimum to reduce the amount of winding area used by the secondary winding. As the main energy storage device, the magnetizing inductance value aects the operating frequency of the yback converter. By increasing the magnetizing inductance, the switching frequency decreases linearly. The lower frequency reduces frequency-dependent losses. By increasing magnetizing inductance, more turns are needed around the core in both the primary and secondary windings. However, the windings still need to t in the same winding window. This leads to the need for longer wires while decreasing the winding wires width, consequently increasing the DC winding resistance and the associated losses.

2.3

Power Switch

In the test circuit, a 2A MOSFET is used to control the primary current. The MOSFET is subjected to DC drain-source voltage equal to the output voltage divided by the turns ratio. The leakage inductance also creates a high voltage on the drain of the MOSFET. When the switch turns o, the leakage inductance continues to source 27

current into the drain of the MOSFET. The energy in the inductance charges the capacitance of the switch causing a voltage spike. The voltage spike becomes larger with more leakage inductance, but remains constant throughout the charging cycle. This voltage spike could reach as high as Ilim
Lleak . Cp

The capacitance, Cp , comes

from the switchs capacitance, and the primary windings capacitance. The switch needs to be capable of withstanding this voltage spike.

2.4

Diode

The diode blocks current from owing from the output capacitor back into the transformer. The diode serves as the second switch in the topology. The secondary current turns the switch on after the MOSFET turns o. When the switch is turned back on, the diode blocks current from owing into the transformer. To block this current, the diode withstands a reverse voltage of Vout + N Vin . The most important property of the diode in this application is its DC reverse breakdown voltage. The parasitic capacitance adds to the problem of reverse breakdown voltage. The parasitic capacitance on the secondary winding is charged to the output voltage. At this point, the capacitance is in parallel with the secondary windings leakage inductance. With Vin across the primary, the parasitic capacitance sees N Vin on the other side of the leakage inductance, as shown in Figure 2-5. This produces a damped second-order response on the secondary winding with an amplitude of Vout + N Vin with a steady state voltage of N Vin . With the damping, the voltage does not swing down completely to the negative amplitude, but does increase the requirement of the dynamic blocking voltage of the diode substantially.

2.5

Boundary Mode Operation

Boundary mode operation constitutes a major dierence from continuous conduction mode, and the following section will detail these dierences. Continuous conduction mode (CCM) indicates that the inductor current or magnetizing current of the trans28

former is always positive. In contrast, discontinuous conduction mode (DCM) is when the current in the inductance falls to zero. Furthermore, with both the switch and diode o, the switch voltage rings. The energy from the parasitic capacitance of the switch, transformer, and the diode transfers to the inductance, and forms a parallel resonance tank. At low output current levels, most xed-frequency converters enter DCM. In a variable frequency power converter, as the one described above, it does not make sense for the circuit to remain idle in DCM, since it is capable of turning the switch on at anytime, unless a reduction in input current is wanted. If the switch has a xed current limit, this idle time would lower the output power capabilities of the switch. With a variable-frequency converter, there is the option of allowing the parasitic capacitance to ring to zero before turning the switch on opposed to turning the switch on immediately after the current reaches zero. This mode of operation is called boundary mode or edge of DCM. Boundary mode brings higher eciency by recycling the energy from the parasitic capacitance instead of dissipating the energy in the switch resistance, and is also known as zero-voltage switching. With high Q capacitors and inductors, all the energy from the capacitance is recovered. In actuality, a fraction of the energy is dissipated in parasitic resistances. Since this capacitance loss is the dominant loss at higher output voltages, boundary mode could possibly result in signicant improvements in eciency over a converter in CCM.

Vout Secondary Leakage Inductance Secondary Winding DC Resistance

Parasitic Capacitance

-NVin

Figure 2-5: Second order network when switch turns on. 29

In addition, the diode is turned o when the current through it is zero, known as zero-current switching. Zero-current switching does not improve the eciency at all since the reverse recovery loss is not a signicant factor in the eciency. Boundary mode decreases the power output of the converter in a slightly dierent way than a converter in DCM. The ring of the capacitance does not take much time compared to the operating frequency of the converter. However, the current in the magnetizing inductance becomes negative when storing the energy from the parasitic capacitance. When the switch turns on, the current in the magnetizing inductance takes a fraction of the on-time to reverse the negative current in the magnetizing inductance.

2.6

Linear Technology Flyback Capacitor Chargers

The LT3468 operates in boundary mode operation. In contrast, the LT3420 is a continuous mode controller. The LT3420 was the rst part to be released as a capacitor charger for photoash applications. The LT3420 miniaturized the components traditionally needed in a photoash capacitor charger, but also suered from some unexpected problems. The part operates by sensing both the primary and secondary currents and switches when those currents reach their limits. The LT3420 enjoyed fast charge times with a low peak switch current. Although the LT3420 beneted from its continuous operation, the LT3420 had large losses due to the parasitic capacitance of the transformer, and also required a large magnetizing inductance to keep the operating frequency low. The LT3468 was designed to solve the problems that plagued the LT3420. The LT3468 improves upon the previous design with three major improvements. Instead of sensing the secondary current, the part switches on when the switch pin rings down to the input voltage. The current change every cycle is much larger than the LT3420, thus resulting in either a reduced switching frequency or the freedom to lower the magnetizing inductance. The LT3468 takes advantage of the power savings of boundary mode operation. More information is available about 30

these parts in [2], and [1].

31

32

Chapter 3 Modeling a Flyback

3.1 Introduction

To better understand the tradeos with components in a yback converter, the losses need to be accurately modelled. There are four forms of power loss in a yback converter: switch loss, transformer loss, parasitic capacitor loss, and diode loss. While most of the losses can be modelled as an energy loss per cycle or a power loss, the manufacturer core loss data is given as a power loss, so to maintain consistency, power loss is used throughout. Unlike most power converters, a yback capacitor charger is never in steady state. The power in and out of the circuit varies with output voltage, as well as the power loss terms calculated in the following sections. The most ecient method to understand the losses below is to graph them over Vout with MATLAB. While this method produces graphs that are easily correlated with data collected in lab, the graph is misleading since the yback charger spends more time at higher voltages. To more accurately model the capacitor charger, an equation is derived to give the amount of time spent per V , or loss, the energy lost per V , or
dE dv dt . dv

By multiplying this quantity by power

is calculated. By integrating this equation over

V max, the total energy lost per charge cycle is used to compare a capacitor charger while dierent parameters such as the turns ratio, or the magnetizing inductance are varied. Also in this chapter, the charge time will also be modeled. 33

3.2
3.2.1

Losses associated with the switch

Switch Resistance Losses

In the test circuit describe in the thesis, the switch is a MOSFET. In contrast, the parts made by Linear Technology use an integrated bipolar junction transistor. These two transistors can be modelled as an ideal switch with series resistance. Using a resistance, instead of modeling it with a Vce saturation voltage, more accurately reects the switch plus simplies calculations since its in series with the primary winding resistance. 1 T
T 0

Psw =

1 2 2 Rsw Isw dt = dIlim Rsw [ + (1 )2 ] 3

(3.1)

The loss from the switch resistance is calculated as the time average of the equation
2 P = I 2 R, or the Irms R. With this equation and the current waveform in Figure 3-2,

the power loss in the switch is calculated. As approaches one, the circuit loses three times the amount of power in the switch with only twice the amount of power in, or equivalently a decrease in charge time by half without considering the loss in eciency. Isw Ilim Ilim
6

0 Isw Ilim Ilim

dT

Figure 3-1: Magnetizing inductor current.

6

dT

Figure 3-2: Primary current waveform. 34

3.2.2

Losses due to Rise and Fall Time of Switch

With non-zero rise and fall times, the switch dissipates energy as current and voltage exist at the same time. Figure 3-3 shows a simple model of the switch turning o. As the switch turns o, the switch voltage rises linearly to
Vout N

before the current

falls linearly to zero from its initial value of Ilim . The switch turn on is the opposite process with the current rising linearly before the voltage falls linearly, as shown in Figure 3-4. The rise and fall time energy loss is the area of the multiplication of the current waveform and the voltage waveform. By multiplying the energy loss by frequency, the power loss is given by Pf = ( V out )(Ilim )tf f N (3.2)

Pr = (

V out )(Ilim )tr f N

(3.3)

Isw , Vsw Ilim 6 Isw

V out N

Vsw

tf

Figure 3-3: Switch turn o waveform.

Isw , Vsw

V out 6 N

Vsw Isw

Ilim

tf

Figure 3-4: Switch turn on waveform.

35

3.3

Losses from Transformer

The transformer contributes a majority of the losses in the yback converter. The thin copper wire used for the windings has signicant resistance. The loss from the winding is known as the DC winding resistance loss. At higher frequencies, the windings may suer additional losses from proximity and skin eect. These two losses will not be modelled because they are highly dependent on the winding method, which cannot be closely controlled in my thesis, and also they do not contribute a signicant loss compared to other loss terms. Losses in the core encompasses another fraction of the energy loss in the transformer. The copper losses and the core losses translate into heat lost inside the transformer, resulting in a considerable increase in the transformers temperature and causing it to be the only component to become noticeably hot.

3.3.1

Loss from Leakage Inductance

The core is responsible for transferring ux between the windings on the transformer. Even though the permeability of the core is much higher than air, some ux still leaks into the air, thus not coupling into the secondary. This leads to additional inductance in series with the windings and the magnetizing inductance. Leakage inductance is the name given to this parasitic inductance. A method of measuring the leakage inductance is presented in Chapter 6. The primary leakage inductance causes a voltage spike when the switch turns o. The leakage inductance forms a second-order circuit with the capacitance on the switch node. This transient might exceed the maximum allowable voltage the switch can withstand. In most yback converters, a snubber network clamps the voltage on the switch node. A snubber dissipates an energy greater than the amount stored in the leakage inductance per switch cycle. Because space is limited in a yback capacitor charger, the switch is designed to handle the voltage transient caused by the leakage inductance. With no snubber, the energy in the leakage inductance rings briey, but most of the energy is eventually transferred to the output. On the secondary side, the leakage inductance 36

is not a problem because it discharges through the diode to the output capacitor. The power loss from the leakage inductance is given by 1 2 f Pleak = Lleak Ilim 2 (3.4)

is a factor much less than one. Leakage inductance was not seen experimentally to make a dierence in eciency, but caused substantial ringing in the secondary winding current.

3.3.2

Loss from DC Winding Resistance

Isec
Ilim N Ilim N

dT

Figure 3-5: Secondary current waveform.

DC resistance is the simplest loss to understand in a transformer. The nite conductivity of copper results in a parasitic resistance in each of the windings. The resistance is given by R =
lt n , A

where lt is the average length per winding, n is the

number of windings, A is the cross-sectional area of the wire, and is the conductivity of copper. The power loss is given by P = I 2 R, where I is shown in Figure 3-2 for the primary winding and Figure 3-5 for the secondary winding. The power loss equations reduce to the following: 1 2 Pdcp = dIlim Rp [ + (1 )2 ] 3 (3.5)

2 Pdcs = (1 d)Ilim

1 Rs [ + (1 )2 ] 2 N 3

(3.6)

37

3.3.3

Core Loss

Core loss consists of two remagnetization losses: hysteresis loop loss and eddy current loss. In most textbooks, these losses are considered separate, but in reality they cannot be separated. In [9], the authors explain the origin of a combined remagnetization loss. Manufacturers publish the core loss with a sinusoidal waveform. In a yback converter, the excitation waveform is a square wave. The paper introduces a simple way to modify the Steinmetz equation to use non-sinusoidal waveforms. The rst step in using the Steinmetz equation is to calculate the ac peak ux density In the manufacturers data, power loss density is plotted against peak ac ux density with sinusoidal excitation at dierent frequencies. To nd peak ac ux density, the change in current per cycle needs to be found with the following: 1 I = (1 )Ilim . 2 (3.7)

After the change in current is found, the peak ac ux density is found by the following equation. B = IL IAl n = Ae nAe
lg ), 0 Ac

(3.8) n is the number of turns

Where Al is nF per turns squared of the core(Al

for the primary winding, and Ae is the eective cross-sectional area of the core. The core power loss is approximated by the Steinmetz equation. By using the published data , Kf e0 , , and are determined by tting the following equation to the manufacturers plot of core loss data.
Pf e = Kf e0 (B ) feq Ve

(3.9)

The frequency used in the above equation is not the switching frequency of the yback charger, but a modied frequency from [9] or [10]. In a capacitor charger, the modied frequency takes the following form. feq = 2f d) (3.10)

2 d(1 38

3.3.4

Transformers Parasitic Capacitance Loss

While not directly a loss in the transformer, the transformer has a signicant amount of capacitance between the windings and between the opposing ends of the primary and secondary windings. In continuous mode, this capacitance energy is dissipated across the switch when it turns on during every switching cycle. In boundary mode, the energy is transferred to the magnetizing inductance of the transformer, but during this transfer a portion of the energy is lost. The only way to determine the amount of energy in this capacitance is by observing a yback capacitor charger in operation. In discontinuous mode, the capacitance forms a second-order network with the magnetizing inductance and rings. By measuring the frequency and the magnetizing inductance, the total capacitance on the switch pin can be calculated. This total capacitance not only accounts for all the parasitic capacitance in the transformer, but also the diodes capacitance and the switchs capacitance. The formula to calculate the total parasitic capacitance is shown below along with a scope photo of the fall-time, Figure 3-6. (4ttf )2 4 2 Lpri

Cpara =

(3.11)

In the equation, ttf is the fall-time of the yback waveform. It is also measured in the scope photo, Figure 3-6.

3.4

Diode Losses

While the diode is in forward conduction, the power loss is approximately the forward voltage drop times the current. In the case of a yback capacitor charger, the current through the diode cannot be approximated as constant. The power equation needs to be integrated over a switching cycle and divided by the time period of a switching cycle. This results in the following equation. Vin + Vout 2Vout (Vout + N Vin )

Pdiode = Vf Ilim (1 + ) 39

(3.12)

The forward diode drop does not contribute a signicant loss above 25V. Another loss occurs in the diode when it turns o. The diode stores a small amount of charge when conducting forward current. The diode conducts current in the opposite direction to remove this charge. The amount of time it takes is called the reverse recovery time. Modern diodes that only conduct small amounts of current typically have very fast reverse recovery times. The reverse recovery current is proportional to the forward current of the diode at turn o. In the diode used in the test circuit, a Vishay GSD2004S, the reverse recovery time (trr ) is 50nS and the reverse recovery current is 3mA with a 30mA forward current prior to the turn o. By using a very conservative estimation using the following equation to calculate the

Figure 3-6: Scope shot: Ch4 is primary switch pin.

Figure 3-7: Diode reverse recovery current. 40

power loss, Vout IF trr f , the reverse recovery loss is not signicant compared to the other losses and will not be modeled.

3.5

Charge time

There are many dierent approaches to calculate charge time. To start with the simplest method, the input current over the charge cycle can be approximated as constant. This is a fairly accurate representation in the test circuit above 100V. With this one assumption, the charge time can be found with the following equation.
2 Cload Vout Iin Vin

tcharge =

(3.13)

In the equation above, is the total eciency of the circuit. This model of the charge time is relatively simple and is not that useful, except to understand on a rst order how parameters inuence charge time. A more complete model is derived by integrating range. Instructions on how to calculate
t v t v

over the charging voltage

are in Chapter 4, Modeling in MATLAB.

This integration results in the following equation.

Vout

tcharge =
0

t CVout Vout 1 dv = ( + 2N ) v Ilim Vin 1 2

(3.14)

This equation shows the eects of changing and the other parameters. With an close to 1, the charge time decreases by half over an of 0. The last two methods have assumed a constant eciency over the charge cycle. The eciency varies by up to 10% over the charge cycle, so the previous methods would be inaccurate. While this can be done numerically with an eciency plot, there are no benets because charge time cannot be modeled to this accuracy because of circuit delays. There are two major delays not accounted for in the models above. The rst major delay is the amount of time it takes for the primary winding current to decrease, and transfer to the secondary winding. Another delay is the amount of time it takes for the switch to turn back on. These delays will be explained in more 41

detail in Chapter 5.

42

Chapter 4 Modeling in MATLAB

4.1 Introduction

This thesis uses MATLAB to numerically calculate the losses for a yback capacitor charger. The vector operations are used extensively, along with the analytical expressions in Chapter 3, to calculate the losses. These vectors are capable of calculating these loss equations over the range of Vout .

4.2

Calculating Individual Losses

The rst step in developing a model to evaluate the performance of a yback capacitor charger is to plot each of the individual loss term versus output voltage. These individual losses are shown in Figure 4-1 and Figure 4-2. Each of these individual loss terms are checked for obvious errors. A high power loss in any of these terms generates heat, which is easy to check for in lab. The two major loss terms correspond with the two components which become warm during operation, therefore assuring reasonable values for each of the individual power losses. Each of the losses needs the correct behavior over output voltage range. There are four dierent types behavior over Vout out of the nine loss terms. The primary winding resistance (Pdcp), the switch resistance (Psw), and the leakage inductance (Pleak) increase with the duty cycle of yback capacitor charger. The duty cycle, or 43

the proportion of time the switch is on, increases quickly at lower voltages and stays relatively constant over 100V. The diode loss (Pdiode), and the secondary winding loss (Pdcs) are proportional to current through the secondary winding. The average current through the secondary side of the circuit is proportional to the complement of the duty cycle, and determines the loss in these two secondary side components. The loss due to the parasitic capacitance of the transformer increases quadratically
2 with Vout , because the energy stored in this capacitance is proportional to Vout . The

rise and fall time losses from the switch are proportional to the operating frequency. The core loss is proportional to frequency to 1.72 power with the TDK core.
Breakdown of Losses from a Typical Flyback Charger (Part 1 of 2) 0.2 Pdcp Pdcs Pleak Psw

0.18

0.16

0.14 Power of Loss (W)

0.12

0.1

0.08

0.06

0.04

0.02

50

100

150 200 Output Voltage (V)

250

300

Figure 4-1: Breakdown of losses from a typical yback charger (Part 1 of 2).

Subtracting the sum of all these losses from the input power calculates the output power. Eciency simply equals
Pout ; Pin

a plot of eciency is generated, as shown in

Figure 4-3. This plot shows the decrease in eciency at higher output voltages caused mainly by the losses due to parasitic capacitances on the switch. At higher output voltages, the operating frequency increases. Consequently, the frequencydependent losses increase at higher output voltages. The parasitic capacitance loss 44

increases quadratically with output voltage and is the main cause of eciency decrease at higher output voltages. The plot shown in Figure 4-3 is relatively at because of adequate magnetizing inductance, keeping operating frequency low. Operating frequency should be kept low enough to keep the parasitic capacitance from being the dominant loss term over the DC losses in the switch and the primary winding. To plot eciency versus a parameter such as magnetizing inductance, we need to convert the eciency plot into total eciency. The eciency curve is deceiving since the charger spends more time at higher voltages. By starting with power loss in terms of Vout , we can multiply this with
t V dt dV

. The rst step in calculating

is to nd the

output voltage increase per switching cycle as a function of the output voltage. The amount of energy added to the output capacitor each cycle is the energy held in the magnetizing inductance. This leads to the following equation. 1 1 1 2 Lp Ilim (1 2 ) = C (V + V )2 CV 2 . 2 2 2

(4.1)

By solving for V and ignoring second-order terms, we arrive at the following

Breakdown of Losses from a Typical Flyback Charger (Part 2 of 2) 0.2 Pdiode Pcloss Pf Pr Pcore

0.18

0.16

0.14 Power of Loss (W)

0.12

0.1

0.08

0.06

0.04

0.02

50

100

150 200 Output Voltage (V)

250

300

Figure 4-2: Breakdown of losses from a typical yback charger (Part 2 of 2). 45

equation.
2 Lp Ilim . 2Cout Vout

V =

(4.2)

t is simply the reciprocal of the the cycle frequency, or ton + tof f . By dividing these two terms, we arrive at N t 2CVout 1 1 + ]. = [ 2 V Ilim 1 Vin Vsat Vout + Vd

(4.3)

After multiplying the power loss curve with (4.3), we integrate over this new curve, giving us the energy lost during a charge. An integral is impossible to do with sampled data, so the integral is approximated by summing the multiplication of the value of the eciency by the distance between eciency data points for all the eciency data points. The total eciency is given by energy out divided by the energy in. The energy out is equal to the energy stored in the capacitor, 1 CV 2 and the energy in is 2 given by the energy out plus the energy lost in charging. By creating a MATLAB function with this as an output, we may plot eciency as parameters are changed.

0.8

0.75 Efficiency 0.7 0.65 0.6 100

120

140

160

180

200 220 Output Voltage (V)

240

260

280

300

320

Figure 4-3: Eciency curve for yback converter with alpha=0 and L=24uH. 46

Table 4.1 lists all the inputs to this function and a short description, while the code is listed in Appendix A. Variable Name Al Wa MLT Ve Ae Bex fex n N Iin alpha Cload Vin Vmax leakpercent primarywinding Description Henries per turns squared Winding Window Area Mean Length per Turn Eective Volume of Core Eective Cross-sectional Area of Core Value in Core Power Loss Equation Value in Core Power Loss Equation Number of Turns for Primary Winding Turns ratio Average Input Current Sets Secondary Current Limit Load Capacitance Input Voltage Final Output Voltage Leakage Inductance is this Fraction of Magnetizing Inductance Fraction of Winding Window Dedicated to Primary Winding

Table 4.1: Table of inputs to total eciency function for yback charger. As an example, Figure 4-4 shows a sweep of magnetizing inductance for a typical yback capacitor charger. Each inductance uses the same core and winding window area. As the the inductance increases, the number of turns on both the primary and secondary windings increases, so therefore the cross-section area of the wire needs to be smaller to t within the allocated winding window. The function accounts for this new cross-sectional area by calculating the resistance per length of the wire and multiplying by the required length of the winding based on the mean length per turn information given by the core manufacturer.

47

Efficiency Vs. Magnetizing Inductance 0.8

0.78

0.76

Efficiency

0.74

0.72

0.7

0.68

0.66

0.5

1.5 2 2.5 Magnetizing Inductance (L)

3.5 x 10

4
5

Figure 4-4: Eciency versus magnetizing inductance.

48

Chapter 5 Design, Construction and Testing of a Flyback Capacitor Charger

5.1 Introduction

Designing a yback capacitor charger controller is straightforward. Without the complicated feedback loops of regulating DC/DC converters, the yback capacitor charger is driven by three main events. The design of a yback controller can be done by hand initially and requires no equations. The controller to be built will operate with a variable frequency, the advantages of this are discussed in a previous section, and the basic operation is as follows. The primary current needs to be monitored and once an adjustable current limit is met, the switch turns o. Then, as the secondary current feeds the output capacitor, the current decreases to the secondary current limit, and the switch turns back on. The output voltage needs to monitored to check if an adjustable nal output voltage has been reached. With the two adjustable current limits, any is possible while keeping the average input current constant.

5.2

Design

Most of the controller circuitry is digital, except the portion that determines the current in the primary and secondary windings. To determine the current on the 49

D1 T1 680 F Vin

+
-

4.7 F

C1 5K Vcc

Cout Photoflash Capacitor

1K R1 U3.1

R2

+
Vs

U1.1

Vsec

U2.1

0 1

0:Continuous Mode 1:Boundary Mode U5 D2

Vin D4 40K U6.1 1K 200pF

Vcc S Q U8.1 R Q U7.1 In Out

Si230805

Vin U4 70K 250K

U3.2

Vcc U1.2

262K

+
1K U5.3 ENABLE 1K Q S U8.2 Q R D3 U6.2

Vcc

U5.2 U7.2

+ U2.2
DC

200pF

U1: LT1801CS8 U2,U3: LT1720CS8 U4: LTC1693-1CS8 U5: 74LS00 U6: 74LS04 U7: 74LS08 U8: 74LS163 T1: TDK EPC10 core D1: Vishay GSD2004S Dual Diode Connect in series D2,D3,D4:Zetex ZHCS400 C1: 4.7 F, X5R or X7R, 10V

Figure 5-1: Flyback capacitor charger test circuit.

50

primary, a low-value sense resistor is placed between ground and the source of the MOSFET. A non-inverting operation amplier conguration is used to measure the current across the sense resistor. This amplied version of the sense resistor voltage is compared with the adjustable primary current limit reference voltage with a comparator. When the current reaches the current limit, the comparator outputs high. Similarly, the voltage on the secondary winding is measured with a sense resistor between the the secondary winding and ground. The current on the secondary winding is in the opposite direction, requiring the use of an inverting operation amplier conguration. A comparator compares the output of the op amp with the secondary current limit voltage, so that the output goes high when the secondary current is less than the current limit. After the primary and secondary currents are in digital form and are ready to be interfaced to the digital portion of the circuit. The digital portion of the circuit consists of one-shots, S-R latches, AND gates, and OR gates. The whole circuit, in Figure 5-1, is relatively simple in its operation with one exception. Once the controller is started with a rising edge on the net labelled ENABLE, the switch turns on and the primary current in the transformer ramps up. The primary current will eventually trigger the primary current limit comparator and reset a latch. The output of the latch will then force the switch o. The comparator is connected to the latch through an AND gate, which has the other input connected to an inverted one-shot that triggers when the switch turns on. A current spike occurs after the switch turns on caused by the stray capacitance on the switch node. The one-shot disables the primary current comparator to turn the switch o. When the switch turns o, the energy stored in the core releases into the output capacitor. The secondary current declines to the secondary current limit and the comparator goes high, and this positive edge on the comparator signal triggers a one-shot. The one-shot turns on the latch that determines the state of the switch. At the beginning of the charge, a latch is set to tell the circuit to charge. When the nal output voltage is reached, this latch turns o. This latchs output is connected to an AND gate with the latch that determines the state of the switch. The circuit uses the reected output voltage 51

on the primary winding during the yback time period to determine if the capacitor is charged.

Figure 5-2: Simulated primary and secondary currents of test circuit. We use LT1800s for the operational amplier and we use LT1720s for the comparators. The op amp was chosen since it has an acceptable slew rate. The one-shot is made by using an inverter and an AND gate, shown in Figure 5-1. The one-shot connected to the enable pin does not require a specic time length. However, the one used after the switch turns on, needs to have a duration long enough to blank the stray capacitor current, around 100nS. The S-R latches are J-K Flip-ops with preset and reset. The clock and the J-K inputs are tied to ground and only the preset and reset inputs are used. A LTC1693, a CMOS gate drive, is used to drive the MOSFET. After designing the yback controller on paper, it was tested in Spice. One major error was found in the paper design. A one-shot after the secondary current comparator was necessary. Although the magnetizing current will always remain above the secondary current limit, the secondary current drops to zero during the switch on period, therefore the secondary comparator output is high. When the primary current limit is reached, both inputs of the S-R latch are high, which is an undened state. A rising edge event from the secondary output comparator is unique to the secondary current crossing the current limit from a higher current. A one-shot is the ideal circuit to capture this rising edge and turn the switch on. After nding this error, the circuit simulated in Spice as expected. The one-shot used in blanking the initial primary current was combined with this new one shot, since they red at the same time. 52

5.3

Construction

While Spice simulations are useful for debugging purposes, actual testing in lab is necessary to make real performance measurements. Since most of the components are only available in surface mount packages, layout software was utilized to expedite routing of the copper board in-house. Constructing the board consists of determining the component packages, guring out special requirements for traces, and paying attention to large switching current paths. The backside of the copper board is the ground plane. Many of the digital interconnects, required external wiring. A bypass capacitor was added near each of the voltage pins of the digital and analog parts used in the design.

When the board layout was complete, a routing machine was used to make the board. This process proceeded smoothly. To put the nal touches on the board, the excess copper was removed with a soldering iron and tweezers. First, the digital logic for the one-shots were placed on the board. Because these were designed from scratch extensive tests were done to verify their performance. A major problem was detected with the rst design, as shown in Figure 5-1 without the included diode. The one-shot needs a time in the low state to reset. The short o-time of the switch does not allow the one-shot to reset, so the design was modied with a diode to quickly charge the capacitor to its high state. After completion of the one-shots, the rest of the digital logic was connected. The next step was to place the analog components. This portion was straight forward and there was no easy way to test their individual functionality. After all components were properly assembled, the circuit was probed. The output of the op amps were probed to show the primary and secondary currents. Nothing worked on the rst attempt. A couple of wiring errors were then found by reexamining the circuit. After xing these errors, the circuit charged the capacitor. 53

5.4

Debugging

Further testing with a load to operate the yback with a steady state output voltage. The circuit would operate initially, but then the output voltage would collapse. After a careful inspection of voltages at the time of the collapse, the collapse was linked to noise in the primary and secondary current sensing circuitry. The adjustable voltage levels for the current limits picked up noise from external sources and would cause the comparator to change states. A premature trigger of the primary current limit and a high allows the circuit to enter an invalid state where the secondary current never exceeds the secondary current limit, thus not triggering the one-shot to turn the switch back on. A quick solution to the problem was to add more capacitance to the voltage limit inputs of the comparators and minimize the length of the wires feeding into these inputs.

5.5

Boundary Mode Operation

After studying the possible benets of boundary mode operation, a circuit was added to allow the controller to operate in boundary mode. Instead of turning the switch on when the secondary current falls below the limit, the switch monitors when the switch pin falls below Vin . The ringing settles at Vin . At low voltages, the amplitude of the ring is small, and the switch pin voltage falls slightly below Vin . To add a noise margin, the comparator trips at a voltage slightly above Vin to guarantee the switch turns on, but below the lowest possible yback period voltage. The circuit is shown in Figure 5-3. The resistive dividers move the comparator trip point slightly above Vin . They also lower the inputs to the comparator to keep it within its common-mode range. The diode also protects the comparator by limiting the voltage seen at the input of the comparator to a diode drop above Vin . The one-shot is already present in the existing circuitry. The secondary current comparator usually connects to the input of the one-shot. This input can be switched back and forth to change the circuit from boundary mode operation to continuous operation. 54

5.6

Final Product

The output of the yback capacitor charger is shown in Figure 5-4. The input current waveform is ltered with a large bypass capacitor to show the average input current. The average input current stays constant over the charge cycle in this example using a 16uH magnetizing inductance, an output capacitance of 150uF and an input voltage of 3.5V. The output voltage increases as the square root of the time elapsed, since the energy input is constant and energy storage in a capacitor is proportional to voltage squared. The nal constructed circuit uses two separate power supplies. One power supply is for the digital logic, the gate driver, comparators, and the operational ampliers and the other is for the energy to be transferred to the capacitor. The general architecture of the circuit makes it capable of accepting any input voltage, but low voltages suer from high losses in eciency. The maximum input voltage is set at 10V by the ceramic input capacitor, but could easily accommodate higher voltages. The MOSFET is rated at 2A with a breakdown voltage of 60V. This MOSFET allows the primary

Vin

40k Sw Vin 40k 250k 262k +

1-Shot

Figure 5-3: Circuit diagram of the boundary mode controller. 55

current limit to be as high as 2A and the output voltage to reach 600V with 10 turn transformer. With a low leakage inductance transformer, the may be set as high as 0.9. The maximum input power is 16W with an input voltage of 10V, current limit of 2A, and an of .9. But running at this power for an extended period of time would need adequate heat sinking. The charge time for this circuit follows equation 5.1. The plot in Figure 5-4 shows a charge time of 6.7s. The equation predicts a charge time of 7.2s. The charge time is slightly higher due to dielectric absorbtion in the capacitor, lowering the value of the capacitance with a quick charge. Experimental charge times predict other charge times with dierent photoash capacitance values nicely by scaling.
2 Cload Vout Iin Vin

tcharge =

(5.1)

Figure 5-4: Scope shot: Ch1 is output voltage, and Ch3 is input current(.25A/div).

56

Chapter 6 Transformer Optimization

6.1 Introduction

This chapter focuses on the transformer and its impact on the performance of a yback capacitor charger. A brief outline of the requirements of the transformer is presented in the rst section. Within these requirements, the design still remains exible. In the model developed to simulate the capacitor charger, the winding resistances and core loss are modeled. There is no easy way to model some of the parasitic eects of the transformer such as leakage inductance, winding capacitance, and proximity loss. The tradeos of these parameters are discussed without the use of simulations.

6.2

Transformer Basics

As discussed before in previous sections, the transformer serves a dual role in a yback capacitor charger. The transformer protects the switch from the high output voltage, and it stores energy in the core. While the transformer is the simplest component to manufacture in a yback, the transformer has the largest impact on eciency. In addition, a transformer is also the largest component in a yback capacitor charger. Therefore, the transformer is the most important component to optimize and analyze in depth. The transformer in the yback capacitor charger has two windings. The primary 57

winding is connected to the switch on the input side. The secondary winding is connected to the output capacitor through a diode. To protect the switch from high collector-to-emitter voltages, the secondary winding usually needs ten times the amount of turns as the primary winding in typical photoash applications. In contrast with a forward converter, the yback converter intentionally stores energy in the transformers magnetizing inductance. In most transformers, the magnetizing inductance is made as high as possible using an un-gapped core. A yback converter uses a gapped-core transformer with energy stored as a magnetic eld in the air gap. The amount of magnetizing inductance in the core is most important to the operation of the yback converter because it determines the operating frequency of the yback capacitor charger along with the primary and secondary current limits. The magnetizing inductance can be measured with an impedance analyzer on the primary and secondary windings, but this measurement includes the leakage inductance. The approximate turns ratio is found by taking the square root of the ratio of these two inductances. When the yback waveform is used to determine when the output has reached its nal value, the switch o portion needs to be long enough for a speedlimited comparator to trigger once the output voltage is reached. A minimum otime will be specied by the controller, and this corresponds to a minimum secondary magnetizing inductance. In an inductor, the winding is wrapped around the core as closely as possible to keep the ux in the core. But the cores permeability is only several orders of magnitude larger than air so some ux is leaked into the surrounding air. When this happens in a transformer, the ux leaked into the air creates an inductance in series with the transformer, as shown in Figure 6-1. Leakage inductance is the worst when the primary and secondary windings are poorly coupled. Poor coupling occurs when ux from one winding has signicant room to go between itself and the other winding. Coupling becomes worse with a winding area with a small width, since it leads to the use of many layers. These layers create a lot of space between the primary and secondary windings. A winding window with a large width is best to lower the amount of layers, thus decreasing leakage inductance. To improve leakage inductance, the 58

primary and secondary may be interleaved. It is typically possible to decrease leakage inductance by half with interleaving. In the yback capacitor charger, multiple wires may be used for the primary winding and each of these windings could be interleaved with the secondary winding. This technique is dicult to do by hand for prototypes and is best left to transformer manufacturers. While interleaving will reduce leakage inductance, it will increase the capacitance between the windings. This capacitance will increase the total lumped capacitance from the switch node and the secondary winding node, which can be analyzed as a reected capacitance on the primary switch node. In continuous operation mode, the capacitance on the switch node is charged to the transformers step-downed output voltage when the switch turns on. This capacitance discharges through the closed switch. At lower output voltages, the amount of energy lost is low, but it increases with the square of the output voltage, and becomes the dominate loss term at higher voltages. The capacitance between the windings is distributed throughout both of the windings and cannot be well modeled with a lumped capacitance linking the two windings. If the secondary winding is put on top of the primary winding, the capacitance is greater on the section of the winding directly on top of the primary winding. This pin of the secondary winding should be connected to ground to minimize the eect of the interwinding capacitance. In experiments, the eciency decreases by at least 5% if the preferential transformer connection is not used. Losses in the core and the windings are discussed in Chapter 3. The primary winding DC resistance loss is the greatest out of these losses. The duty cycle of the charger is relatively constant above 100V where is spends most of its time. Therefore, the amount of power lost in the primary and secondary windings is constant over the charge cycle. While decreasing the primary winding resistance helps eciency, its returns are marginal because the switchs on-resistance is in series with the winding and is usually much higher in a well-designed transformer. In addition, a larger gauge primary winding increases the leakage inductance. 59

6.3

Hand-winding Transformers

Transformers from manufacturers are wound by machine. A machine is able to place the windings in a similar way each time. This results in nearly identical transformers with the same leakage inductance and capacitance. It is impossible to achieve this consistency in placing the windings by winding the transformer by hand. In the lab, in which this thesis was carried out, there is a transformer winding machine, but it does not have the capabilities of directing the windings. This type of machine will still be considered winding a transformer by hand since its only function is to spin the bobbin and keep a count of the number of turns. There are not many documents or textbooks written on the art of winding transformers. The only way to learn is by experimentation. At rst, all the transformers made by hand had a signicant fraction of their magnetizing inductance as leakage inductance. The high leakage inductance was linked to the secondary winding, which is signicantly harder to wind with ten times the amount of turns. The wires for the secondary winding should be done slowly and adjacent turns should not be on top of each other but just to the side. The wire should be swept from side to side in the bobbin at a good pace to not bunch adjacent wires.

Primary Leakage Primary DC Inductance Resistance Rpri Lleak,p Magnetizing Inductance Lpri

Ideal Transformer 1:N

Secondary Leakage Inductance Lleak,s

Secondary DC Resistance Rsec

Figure 6-1: Transformer model. 60

6.4

Measuring Inductance Values for Transformer Model

A good way to understand the eects of a transformer is to model it with the model, shown in Figure 6-1. The turns ratio is calculated by exciting the primary side with a sinusoid and measuring the magnitude of the resulting sinusoid, or by counting the number of primary and secondary windings. N= Np Vp = Vs Ns (6.1)

Measuring the magnetizing inductance and the leakage inductances is more complicated. The coupling coecient is the rst step in calculating these values. The coupling coecient is found with the following equation. Lshort Lopen

k=

(6.2)

With an impedance analyzer, measure the inductance of the primary winding with the secondary side open. This is equal to Lopen . Now with the secondary side shorted, measure the inductance of the primary winding with the secondary side shorted. This is the value Lshort in the above equation. The primary leakage inductance is equal
1 to (1 k ) Lopen , and the secondary leakage inductance is equal to (1 k ) Lopen N 2.

The magnetizing inductance is equal to k Lopen . The primary and secondary winding resistances are measured with an ohm meter.

6.5

Eects of Leakage Inductance

As discussed in previous sections, leakage inductance causes a spike as shown in Figure 6-2. When the switch turns o, the majority of the energy stored in the core transfers to the secondary winding, but not all the ux from the primary winding is linked to the secondary winding. This inductance is known as the leakage inductance. 61

The leakage inductance current ows into the switch node and charges the switchs capacitance. This results in a voltage spike approximated by Vleak = Ilim
Lleak . Csw

The

current reverses and the energy stored in the switch capacitance ows through the transformer to the input, because there is no voltage across the primary side of the ideal transformer at this point. Simultaneously, the magnetizing current is linearly charging the parasitic capacitance of the transformer to the output voltage on the secondary side. As soon as the primary terminal voltage of the ideal transformer increases from the charging of the parasitic capacitance, the switch ring current becomes transferred to the output. As seen in Figure 6-2, once the switch voltage reaches its nal value, the ringing dies o completely. This explains how the leakage inductance energy is recovered. Although high leakage inductance does not result in substantially higher losses, the voltage spike caused by the leakage inductance requires a switch with a higher collector-emitter voltage rating. Since the voltage spike is related inversely to the the capacitance on the switch node, an external capacitance on the switch pin lowers the peak of the leakage inductance voltage spike. This capacitance does not add substantially to the equivalent capacitance on the switch pin when determining the capacitor loss, since the transformer contributes almost all the capacitance on the switch pin. Along with the voltage spike on the switch node, one of the main problems with leakage inductance is the ringing it causes on the secondary winding. This ringing, along with the current in the secondary winding, is shown in Figure 6-3. In this example, the output voltage is at 250V and a transformer with 16H of magnetizing inductance is used. At the peak of the negative ring, the diode has 430V across it, and this voltage across the diode can be as high as 600V when the output voltage is at its nal value. In our test circuit, we use two diodes with a DC blocking voltage of 200V, but are capable of handling voltage spikes up to 650V. Not accounting for this ringing could cause the diode to go into reverse breakdown and blow up while in operation. We have tested this phenomenon in lab and this occurs at 375V for a single diode. With two diodes, the circuit will not breakdown under any conditions. Another eect of the leakage inductance, occurring with the above phenomenon, 62

Figure 6-2: Scope shot: Ch3 is primary current (AC coupled, .1A/div), and Ch4 is switch voltage.

Figure 6-3: Scope shot: Ch2 is secondary winding Pin, and Ch3 is secondary winding current.

63

is the primary current ring when the switch turns on. When the switch turns on, the secondary current falls to zero, and the diode turns o. When the diode turns o, the capacitance from the diode holds the secondary winding pin at the output voltage. Normally at this point, the magnetizing inductance would have 3V across it from the input voltage and the current in the inductance would increase linearly. But this operation does not account for the eects of the leakage inductance and the ringing on the secondary winding pin. In addition to forming a second-order network, the leakage inductances from the primary and secondary form an impedance divider. The output of this impedance divider is the node of the magnetizing inductance, which cannot be probed experimentally. The ringing on the secondary produces a current through the primary winding as shown in Figure 6-4. The current on the secondary during this time period is shown in Figure 6-5. When the ringing dies, the voltage drop across the primary windings leakage inductance becomes zero, and the magnetizing current begins to increase.

Figure 6-4: Scope shot: Ch3 is real primary current (ac coupled, 1A/div), and Ch4 is primary switch pin.

64

6.6

Eects of the Transformers Capacitance

As discussed above, the transformers parasitic capacitance is one of the major losses in continuous operation yback capacitor chargers, and becomes a major loss with boundary mode with small magnetizing inductances. This energy is discharged

through the switch in continuous mode. In boundary mode, this energy is transferred to the magnetizing inductance with some of the energy lost in the transformers resistance. The transformers capacitance is charged up when the switch turns o. The charging of this capacitance causes a delay between the transfer of current between the primary winding to the secondary winding. Two nodes in the circuit increase with the turn o of the switch. The secondary winding pin increases from Vin N to Vout . The switch pin increases as a step-downed version of the secondary winding pin, therefore increasing to
Vout . N

Since these two voltage increases are not instantaneous,

these two points in the circuit have parasitic capacitance. The secondary capacitance may be reected to the switch pin and lumped with the capacitance on the switch pin. The slope of the voltage on the switch when the switch turns o is equal to

Figure 6-5: Scope shot: Ch3 is real secondary current (inverted, 100mA/div), and Ch4 is primary switch pin. 65

Ilim . Cpara

This slope is shown in Figure 6-6 with the primary and secondary currents.

The slope of the switch voltage cannot be clearly seen with the ring caused by the leakage inductance and the capacitance of the switch, but can be easily measured by dividing the voltage rise by the amount of time it takes. The value of the capacitance found corresponds nicely with the the amount of capacitance found by measuring the frequency of the fall of the switch voltage when the switch turns on by the formula as described in the Chapter about the Flyback Operation.

Figure 6-6: Scope shot: Ch1 is amplied primary current(1A/div), Ch2 is amplied secondary current(100mA/div), and Ch4 is primary switch pin.

6.7

Energy Storage Requirements

A transformer is required to store 1 L I 2 in the magnetizing inductance. To make 2 pri lim a fair comparison when comparing energy storage requirements as a function of , input current and operating frequency should remain constant. Since the switch otime has very little inuence on the operating frequency past 100V and simplies calculations greatly, the on-time will be held constant instead of operating frequency. The on-time is equal to
Lpri I (1 Vin lim

). Ilim decreases as increases if input current

(1+)Ilim . 42d

is held constant. Input current is equal to 66

By eliminating the Ilim term

and solving for the needed magnetizing inductance to keep ton constant, the following equation is found. ton Vin 1 + (4 2d)Iin 1

Lpri =

(6.3)

3.5

Inductance Factor

2.5

1.5

0.5

0.1

0.2

0.3

0.4

0.5 alpha

0.6

0.7

0.8

0.9

Figure 6-7: Magnetizing inductance increase with . In this equation, increases the inductance by a factor graphed in Figure 6-7. At an of .2, the required inductance is already 50% greater. As increases, the current limit decreases, but not enough to cancel out the increase in the inductance as demonstrated in the following energy equation. ton Vin Iin (4 2d) 2(1 2 )

E=

(6.4)

This equation shows that an of zero will result in the lowest energy storage 67

requirement for the transformer. This is an important result for determining what type of charge scheme to use. With just this result, an of zero charge scheme appears optimal in reducing the size of the transformer.

68

Chapter 7 Experimental Results

7.1 Introduction

The experimental results are a combination of measurements from lab and simulations performed with MATLAB. Winding transformers has limitations mentioned in the previous chapter, so simulations are relied upon to expand the experimental ndings. To do so, the simulations are compared with the experimental results to show consistent simulation results from dierent transformers and charging schemes. Simulations are then used to show the aect of changing the magnetizing inductance, charge scheme, turns ratio, and the size of the core.

7.2

Correlation of Simulated and Measured Data

The following eciency curves show the experimental data with the simulated data. The MATLAB simulator code is listed in Appendix A. The simulator uses the transformers parameters measured by an impedance analyzer. The primary input current is adjusted to keep the average maximum input current below 500mA. For alpha values other than zero, the secondary current limit is raised as the primary current is lowered until the ratio of these currents is alpha and the maximum average input current is 500mA. An of zero signies boundary mode. An of .1 is approximately continuous mode with the current falling to zero at voltages higher than 100V because 69

of small delays in turning the switch on. The boundary mode simulation only loses 30% of the energy stored in the parasitic capacitance on the switch pin, whereas the continuous simulations lose all the energy. The 30% factor is based on the amount of the capacitors energy transferred to the magnetizing inductance. The primary current limit for boundary mode is also adjusted to a higher value in the simulation because of the time it takes to reverse the negative magnetizing current caused by the capacitance. Figure 7-1 and Figure 7-2 show the simulation data and the test data on the same eciency curve. The points on the two curves match fairly well and the slope of the curves also correspond, although the curves are not exactly the same. The most likely source of errors in the boundary mode is the modeling of the parasitic capacitance loss. The 30% factor used to determine the amount of energy lost in the capacitance is not constant over the output voltage range. More energy is lost during the higher output voltages due to the primary resistance because the magnetizing current becomes much more negative. This resistance loss scales with I 2 and becomes greater with the more negative peak current. Figure 7-2 shows a much stronger correlation between the two sets of data. By comparing the eciencies from Figure 7-1 and Figure 7-2, the advantage of boundary mode over continuous conduction mode is clearly shown. At 300V, the dierence between the two modes is 6%. The boundary mode scheme does use a peak current of 1.38A compared to a peak current of 1.24A for the continuous conduction mode scheme. With everything else kept the same, an increase of 10% in peak current provides a 6% increase in eciency. In addition to the loss savings of recovering energy from the parasitic capacitance, the boundary mode scheme saves energy from a lower operating frequency, 165kHz compared to 200kHz. The advantage of boundary mode is most profound at lower magnetizing inductance values. Figure 7-3, Figure 7-4 and 7-5 show a similar degree of correlation using a 16uH transformer as the previous set of eciency curves. The operating frequency of the circuit is much less than the previous 10uH transformer, therefore the losses due to the parasitic capacitance is much less, but the peak eciency drops slightly because of 70

more primary winding resistance. The eciency dierence between boundary mode and continuous mode is much less in this case, around 2%. For the 24uH transformer, the eciency curves are done for four dierent charging schemes. All the charging schemes are well predicted by the simulation. As can be seen from the curves, eciency decreases with higher alpha due to the higher operating frequency discharging and charging the parasitic capacitance. The boundary mode scheme with a 24uH transformer performs much better than the rest of the continuous conduction mode charging schemes. Magnetizing Inductance 10uH 10uH 10uH 16uH 16uH 16uH 24uH 24uH 24uH 24uH Alpha 0 .1 .2 0 .1 .2 0 .2 .4 .6 Total Charge E 78% 75.6% 72.4% 77.2% 75.4% 75.5% 77.1% 77.0% 75.0% 69.7%

Table 7.1: Total eciency using capacitor energy method.

7.3

Magnetizing Inductance

Magnetizing inductance plays an important role in a capacitor charger. The size of transformer is also strongly a function of its magnetizing inductance. In addition to storing the energy for the yback capacitor charger, it determines the operating frequency. A low magnetizing inductance causes a high operating frequency, leading to large losses in continuous conduction mode operation. A large magnetizing inductance requires a large amount of turns, which increases the primary and secondary winding resistances with a xed winding area. Figure 7-10 shows the eect of changing magnetizing inductance on eciency. The plot displays a continuous conduction mode capacitor charger and a discontinuous capacitor charger. In both 71

Efficiency for 10uH, Vin=3.3V, a=0 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-1: Eciency versus output voltage for L=10uH and = 0.

Efficiency for 10uH, Vin=3.3V, a=.1 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-2: Eciency versus output voltage for L=10uH and = 0.1.

72

Efficiency for 16uH, Vin=3.3V, a=0 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-3: Eciency versus output voltage for L=16uH and = 0.

Efficiency for 16uH, Vin=3.3V, a=.1 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-4: Eciency versus output voltage for L=16uH and = 0.1.

73

Efficiency for 16uH, Vin=3.3V, a=.2 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-5: Eciency versus output voltage for L=16uH and = 0.2.

Efficiency for 24uH, Vin=3.3V, a=0 85 Measured Simulated

80

Efficiency(%)

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-6: Eciency versus output voltage for L=24uH and = 0.

74

Efficiency for 24uH, Vin=3.3V, a=.2 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-7: Eciency versus output voltage for L=24uH and = 0.2.

Efficiency for 24uH, Vin=3.3V, a=.4 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-8: Eciency versus output voltage for L=24uH and = 0.4.

75

congurations, an optimal amount of magnetizing inductance exists to maximize the eciency. In this case, the simulations uses a model of a TDK EPC10 core. The optimal amount of magnetizing inductance for a core depends on many transformer characteristics, such as winding area and Al . Using MATLAB is a cumbersome way to calculate the optimal amount of magnetizing inductance; most designers would prefer an analytical expression. As mentioned above, the capacitance loss is greatest at low magnetizing inductance, and the loss from the primary winding resistance is greatest at higher magnetizing inductances. The peak eciency occurs approximately when these two losses equal each other. In continuous conduction mode, the optimal magnetizing inductance is approximated by the following formula.
2 Vin Csw Vmid 1 3 1.85 Ilim (Rsw + Rpri )( + 3 (1 )2 )

Lpri =

(7.1)

This formula has its weaknesses, since it includes the primary resistance of the transformer and the parasitic capacitance of the transformer. This formula needs to be used in an iterative fashion to solve it exactly. By sizing the primary winding
Efficiency for 24uH, Vin=3.3V, a=.6 100 Measured Simulated 95

90

85 Efficiency(%)

80

75

70

65

60 100

120

140

160

180 200 220 Output Voltage(V)

240

260

280

300

Figure 7-9: Eciency versus output voltage for L=24uH and = 0.6. 76

correctly, the primary resistance can be specied before winding the transformer, but the parasitic capacitance has to be approximated and cannot be calculated a priori. Boundary mode operation cannot be approximated in this fashion, since the parasitic capacitance loss is less substantial. Other loss terms, such as core loss and the rise and fall time losses also increase with higher operating frequencies. An analytical expression would be of little use with the added complication of all these loss terms. Figure 7-10 shows that the needed magnetizing inductance for discontinuous mode is less than CCM by about 20%. As a rough estimate, the optimal value for a CCM operation capacitor charge can be found with Equation 7.1 and reduced slightly. The fall at lower magnetizing inductance is not nearly as steep for boundary mode, therefore the designer may go to a lower magnetizing inductance without losing much eciency. The simulation optimizes the transformers windings for each magnetizing inductance. In actuality, there are not the perfect size wires for each of the magnetizing inductances, therefore the windings would be slightly smaller, resulting in more winding resistance. In addition, the primary winding has to lay at within the winding window to keep the packing fairly tight and leakage inductance low. Tight packing depends on the number of turns for the primary and the width of the wire. Since a tightly packed primary winding is important to the operation of the charger, the primary windings amount of turns and the size should be optimized for packing around the optimal value. The optimal value should be used as a guide, not as a tight design constraint.

7.4

Alpha Comparisons

Since proving the simulation can be relied upon, simulations will be used to show eciencies for dierent charging strategies with optimal transformer characteristics. The simulations will calculate the resistance of the primary and secondary windings with the winding window area, mean length per turn, packing factor, primary to secondary window allocation, and the number of turns. 77

In the previous section, the simulation was shown to be reliable in predicting the eciency behavior of a yback capacitor charger. With the aid of simulation, the optimal charging strategy will be studied. From the eciency curves above, when alpha is increased while keeping input power constant, the eciency decreases at higher output voltages. While this supports that low alpha has higher eciency, the same transformer is used for all the charging schemes, not one optimized for that particular charging scheme. When alpha is increased, the primary current limit decreases along with the magnetic ux density, allowing the transformer to have a smaller gap length or more windings. Without the aid of a core manufacturers equipment, changing the gap length is dicult. Even changing the amount of windings is not trivial, since the winding wire size needs to shrink. In simulation, these tasks can be done easily, allowing many points of data. To study the optimal charging strategy, alpha will be swept from 0 to .9 using MATLAB. As mentioned briey above, the transformer may be optimized by changing the gap length while leaving the amount of turns untouched, or by changing

0.86 CCM Boundary Mode 0.84

0.82

0.8 Efficiency

0.78

0.76

0.74

0.72

0.7

0.5

1.5 2 2.5 Magnetizing Inductance (H)

3.5 x 10

4
5

Figure 7-10: Inductance versus eciency. 78

the amount of turns while leaving the gap length constant. The rst method keeps the resistance of the primary and secondary windings while increasing the magnetizing inductance linearly with decreasing peak primary current. The second method increases the resistance of the primary and secondary windings linearly with turns ratio, but the magnetizing inductance increases quadratically with decreasing peak primary current. Figure 1 shows eciency versus alpha with a variable gap length. Figure 2 shows eciency versus alpha with a variable amount of turns. Coincidentally, the eciency drops similarly in the two methods. As alpha increases, the operating frequency becomes too great with either of these methods and the loss due to the capacitance dominates. These two graphs clearly show that an alpha of .4 should not be exceeded with this particular core. The eciency at high values of alpha improves if a larger core capable of higher magnetizing inductance is used, but the extra space for the larger core is a higher design cost than the savings in peak current for the switch.

Alpha Vs. Efficiency with Constant Turns/Variable Gap Length 80

75

70

Total Efficiency (%)

65

60

55

50

45

0.1

0.2

0.3

0.4 alpha

0.5

0.6

0.7

0.8

0.9

Figure 7-11: Eciency versus alpha with variable gap length.

79

Alpha Vs. Efficiency with Variable Turns/Constant Gap Length 80

75

Total Efficiency (%)

70

65

60

55

0.1

0.2

0.3

0.4 alpha

0.5

0.6

0.7

0.8

0.9

Figure 7-12: Eciency versus alpha with xed gap length.

2.5

x 10

Alpha Vs. Max Operating Frequency Variable Gap Length

Max Operating Frequency (Hz)

1.5

0.5

0.1

0.2

0.3

0.4 alpha

0.5

0.6

0.7

0.8

0.9

Figure 7-13: Maximum frequency versus alpha with variable gap length.

80

7.5

Turns Ratio

Four transformers were wound to explore the aects of a higher turns ratio on efciency. The parasitic capacitance from the transformer has a large impact on the eciency, even using boundary mode operation. The turns ratio has a strong aect on the amount of capacitance reected to the switch pin from the secondary windings parasitic capacitance. Any capacitance on the secondary side is multiplied by the square of the turns ratio when reected to the primary side. But the turns ratio also decreases the output voltage reected upon the primary side when the switch is o. In regards to the capacitance loss on the switch, the eects of varying the turns ratio cancel each other and do not change this loss term. A simulation sweep of turns ratio is not possible because of these changes in the capacitance on the switch pin. Table 7.2 lists the turns ratio equivalent capacitance on the switch and a factor proportional to the amount of energy stored in this capacitance at 300V for the four transformers. The energy factors do not show any correlation with the amount of turns and their variations likely result from winding dierences.
x 10
5

Alpha Vs. Max Operating Frequency Variable Turns

12

11

10

Max Operating Frequency (Hz)

0.1

0.2

0.3

0.4 alpha

0.5

0.6

0.7

0.8

0.9

Figure 7-14: Maximum frequency versus alpha with variable turns. 81

Turns Ratio 10 13 16 20

Equivalent Switch Capacitance 1.9uF 3.55uF 4.3uF 6.5uF

Cap. Energy Factor 1710 1863 1511 1462

Table 7.2: Equivalent switch capacitance eects with turns ratio.

Efficiency Curves of Turns Ratio 90 TR 10 TR 13 TR 16 TR 20

88

86

84

Efficiency (%)

82

80

78

76

74

72

70 100

120

140

160

180

200 220 Voltages (V)

240

260

280

300

Figure 7-15: Eciency curves with dierent turns ratios.

82

Figure 7-15 shows the eciency curves for a capacitor charger with dierent transformer turns ratios. The transformers are wound with 10uH of magnetizing inductance, while also using the same wire sizes for all the turns ratios. Thus, the primary winding resistance is constant, but the secondary winding resistance increases linearly with the turns ratio. The eciency curves are relatively at, since they are all operating in boundary mode. The higher turns ratio transformers suer from higher losses at lower voltages. The secondary resistance becomes much more important at lower output voltages, because the secondary current decreasing more slowly causes the diode conduction period to be a larger portion of the switch cycle. This eect is shown clearly in the individual power loss gures, Figure 4-1 and Figure 4-2. The eciency curves vary by only one-percent, which is unsubstantial in a practical application and could uctuate with the measurement techniques used. Therefore, turns ratio does not dramatically increase the eciency of the capacitor charge. Along with the increased area used in the winding window, the higher turns ratio transformers increase the charge time as shown in Equation 3.14, or increase the primary peak current to compensate for additional charge time.

7.6

Scaled Transformer Core

From the previous data, the boundary mode scheme outperforms the continuous conduction mode converters with any value of alpha. To focus directly on this type of converter, an TDK EPC10 is scaled using MATLAB to nd the optimal power to volume ratio. Although a manufacturer does not create a transformer by keeping the aspect ratio the same for all the dimensions, this gives a good estimate of the size the transformer can be made without eciency suering. The volume factor in the gures is cubed when multiplied with volume, squared when multiplied with area, and just multiplied with length. The volume factor eects the cross-section area, volume of the core, mean length per turn, winding window area, and the maximum number of turns. The inductance per turn squared is kept constant, so gap length is multiplied by the volume factor squared. Since the EPC10 has plenty of energy 83

Efficiency vs. Volume Factor 0.9

0.8

0.7

0.6

Efficiency

0.5

0.4

0.3

0.2

0.1

0 0.1

0.2

0.3

0.4

0.5 0.6 Volume Factor

0.7

0.8

0.9

Figure 7-16: Eciency versus volume factor.

Efficiency/Volume vs. Volume Factor 80

70

60

Effiency/Volume Factor

50

40

30

20

10

0 0.1

0.2

0.3

0.4

0.5 0.6 Volume Factor

0.7

0.8

0.9

Figure 7-17: Eciency per unit volume versus volume factor.

84

x 10

Indutance vs. Volume Factor

1.8

1.6

1.4 Magnetizing Indutance (H)

1.2

0.8

0.6

0.4

0.2

0 0.1

0.2

0.3

0.4

0.5 0.6 Volume Factor

0.7

0.8

0.9

Figure 7-18: Magnetizing inductance versus volume factor.

Current vs. Volume Factor 9

Switch Current (A)

1 0.1

0.2

0.3

0.4

0.5 0.6 Volume Factor

0.7

0.8

0.9

Figure 7-19: Primary peak current versus volume factor.

85

storage at its original size, the number of windings has to be limited to keep the inductance value at 16uH, shown in the previous section as the optimal inductance value for this particular core in boundary mode. The MATLAB model averages the negative current in the primary inductance caused by the boundary mode scheme with the primary current to keep the input current at 500mA. With a small magnetizing inductance, the negative current becomes comparable to the original peak current, therefore peak current has to increase substantially. Figure 7-18 shows how the inductance scales with the volume factor. The maximum turns causes the inductance to be constant from a volume factor of .55 to 1. As a result the eciency, shown in Figure 7-16, stays relatively constant for this range of volume factor. At about 10uH, the eciency begins to fall because the increase in operating frequency causes the capacitance loss to become the dominate loss. Along with the increase in frequency, the main reason for the sharp fall in eciency is the sharp increase in primary peak current, shown in Figure 7-19. The Eciency volume factor is calculated with the following equation, where e is the eciency, Pin is the input power, and core volume is the eective volume of the core. e3 Pin core volume

(7.2)

The power to unit volume factor is plotted against the volume factor in Figure 7-17. The plot shows a peak power density at a volume factor of 0.3. A volume factor of 0.3 corresponds to a magnetizing inductance of 1.7uH and a total charge eciency of 65%. This value of magnetizing inductance operates the converter at a frequency above 600kHz. While this frequency would not work with the LT3468, since it needs a longer o-time to compare the yback voltage waveform, it works in the modied test circuit. The modied test circuit uses zener diodes to detect when the nal output voltage is reached. Since scaled versions of the EPC10 do not exist, a EPC10 core was used to produce 2uH with only a small section of the winding window. The eciency of the converter was 62%, very close to the predicted value. Two scope photos of the 2uH transformer are shown in Figure 7-20 and Figure 86

Figure 7-20: Scope shot: Ch1 is secondary current waveform(100mA/div), and Ch4 is switch waveform.

Figure 7-21: Scope Shot: Ch1 is primary current(1A/div), and Ch3 switch waveform.

87

7-21. In the rst oscilloscope screen shot, the ringing secondary winding current is shown with the switch pin voltage. Unlike continuous converters that compare the secondary current waveform to a reference to determine when to turn the switch on, the boundary mode converter does not need a slow and clean waveform to determine when to switch. This allows more exibility with the amount of magnetizing inductance and the amount of leakage inductance.

7.7

Experimental Conclusion

The experimental results conclusively support the use of the boundary mode control scheme. From the results, a boundary mode controller is shown to operate more eciently with the same transformer than a continuous mode controller. Even with a continuous controller scheme, the highest eciency is achieved at an of zero. In addition, the boundary mode controller is easier to implement since it only needs to monitor the primary winding current. The continuous mode controllers do allow lower peak current levels for the transformer and the switch. However, as shown in Chapter 6, the lower of peak current in the transformer does not oset the amount magnetizing inductance needs to increase to keep operating frequency constant. The turns ratio of the transformer should only be high enough to protect the switch from the output voltage. Most of the capacitance from the transformer is from the secondary side. Therefore, lowering the voltage on the primary side by increasing the turns ratio does not lower the amount of energy stored because the capacitance is higher when reected to the primary side. This all leads to using the lowest turns ratio possible while still protecting the switch. The lower turns ratio require less secondary turns, which frees winding window area for thicker primary or secondary wires. Choosing the optimal amount of magnetizing inductance depends on many factors. With a boundary mode control scheme, the process is much simplied because the value of the magnetizing inductance has less of an impact on the performance of the capacitor charger. The volume factor experiment for boundary mode control shows 88

that there is an optimal size for the transformer. This value results in a marginally acceptable eciency, but results in a good trade-o for the space conscience camera manufacturer. These optimal values are currently too low for the comparator in Linear Technologys LT3468. For this controller, the magnetizing inductance should be chosen so the o-time is the smallest possible time the comparator can work consistently with.

89

90

Chapter 8 Flash Unit

8.1 8.2 Introduction Self-Oscillating Capacitor Charger
EE13 P DFC05 MC 200 F to 400 F

2.2k

S Manganese, alkali battery 3V

+
100 F 2SD879 F

0.01 F

Figure 8-1: Self-oscillating capacitor charger circuit diagram. The rst widely used method to charge a photoash capacitor was a self-oscillating capacitor charger. This capacitor charger is perfect for disposable cameras where the product is highly cost sensitive. The main components are a high turns ratio transformer, a transistor, a diode, an output capacitor, and an input capacitor. The circuit diagram can be seen in Figure 8-1. [11] The circuit starts with current following through the 2.2k resistor through the F winding and into the 0.01F capacitor. As soon as this capacitor reaches the threshold of the transistor, the transistor turns on and current ows through the P winding. The P winding drives the 91

current in the S winding, but the S winding determines the voltage drop across the P winding. Since the turns ratio between the P and S winding is approximately 125, the voltage across the P winding is the current output voltage divided by 125. The turns ratio of the transformer should be kept close to the beta of the transistor since the base current is supplied by the S winding and the P winding is the collector current of the transistor. The transformer will eventually saturate, causing the S winding current to go to zero and turning the switch o. Unlike the yback capacitor charger, the core does not need to store much energy, since the current is directly transferred between the primary and secondary windings; never being stored in the magnetizing inductance. With the switch o, the magnetizing current of the transformer core will reset itself with the positive voltage across the F winding. This positive voltage will again create a current across the F winding into the 0.01F capacitor, and the switch will turn on to start the cycle again. As the output voltage becomes higher, the voltage across the P winding will become almost as large as the battery input. The transistor collector-to-emitter voltage will become small and eventually the transistor will not be capable of conducting current. At this point, the charging of the capacitor stops and this is the maximum output voltage of the charger. Therefore, the nal output voltage on the output capacitor will be a function of the input voltage. While this circuit requires a minimum amount of expensive components, it also has many disadvantages compared to a yback capacitor charger. As mentioned above, the nal output voltage will decrease linearly with the input voltage. A typical battery will lose over 30% of its value over its lifetime. Even though most Xenon ash bulb used in cameras only require a minimum voltage of 225V and can handle a maximum voltage of up to 350V, they operate more eciently at their nominal voltage, 330V. This operating range is only slightly larger than the variations in output voltage of a self-oscillating capacitor charger using alkaline batteries. The other major drawback of this solution is its size. The transformer required has three windings with the 1:125 primary-to-secondary winding ratio. Peak currents through the primary winding will go as high as 5A. A battery cannot supply a current this high so a large input capacitor is needed to average the current consumption. 92

In addition to the size and output variations, the self-oscillating capacitor charger will suer large power losses in the transistor at low output voltages of the charge cycle. The collector-to-emitter voltage is equal to the input voltage minus the output voltage divided by the turns ratio. The power loss is the collector-to-emitter voltage times the input current. The charger spends more time at higher voltages during the charge cycle, but there is a major advantage of using a yback capacitor charger which uses the transistor as a switch. As a switch in the yback capacitor charger, the collector-to-emitter voltage is determined by placing a on-resistance in series with an ideal switch.

8.3

Xenon Bulb

Instead of light emitting from a lament as in a incandescent, the Xenon gas ionizes and emits light. Michael Faraday discovered light emissions from a tube with lowpressure gas in 1838. Geissler continued Faradays work and made the rst practical low-pressure gas tubes with Krypton, which were called Geissler tubes. In the 1920s, the Seguin brothers were the rst to adapt the Geissler tube to a working stroboscope. The Seguin brothers drastically improve the ring of the bulb by separating the main energy storage capacitor from the ignition circuit. This allowed more precise control over the large amount of energy stored in the capacitor. They used their stroboscopes to aid their work on airplane engines. MIT professor Harold Edgerton pioneered the use of Xenon bulbs for high speed photography in the 1930s and is known as the inventor of the modern-day Xenon ash. For his research as a doctoral student, he became interested in using Xenon strobe lights to allow the human eye to see the movement of fast mechanical machinery. While most in industry saw strobe technology as a novelty, including General Electric, Edgerton saw a great need for it and developed a commercial strobe light. Soon, he became interested in the use of electronic ashes for use in high speed photography. As a pioneer in the eld, Edgerton created stunning images of bullets impacting objects such as apples. These photographs were a combination of cutting 93

edge technology and art and were exhibited in the Museum of Modern Art in New York and the Boston Museum of Fine Art. To trigger a Xenon bulb, a high voltage waveform ionizes the Xenon gas in the bulb. This high voltage waveform just needs to be next to the bulb and not electrically connected to either the cathode or anode. Once the gas ionizes it becomes conductive. A large capacitor connected in parallel to the bulb provides the energy for the ash. To create a short duration ash, 320V needs to be stored in a capacitor with hundreds of microfarads of capacity. The length of the is proportional with the capacitance.

R2

T2

Flash Lamp

C3

C4

Figure 8-2: Xenon triggering circuit.

The standard circuit for triggering a Xenon ash bulb is shown in Figure 8-2. The capacitor, C4, becomes charged to the output voltage. When the switch is pressed, the capacitor, C4, is in parallel with the transformer, T2. The transformers magnetizing inductance forms a second-order network, and produces a decaying sine waveform. The transformer multiplies this sine waveform by the turns ratio. The generated waveform needs to be greater than 4kV and the frequency greater than 500KHz. [7] An example of the waveform is shown in Figure 8-3. The tube starts ashing when the rst trigger pulse occurs. The current in the bulb is shown with the trigger waveform in Figure 8-4. A Xenon ashbulb manufacturer will provide typical capacitance and voltage values for the output capacitor. More luminance can be achieved with more capacitance or a higher voltage, however the life expectancy of the bulb shortens. 94

Figure 8-3: Xenon triggering waveform.

Figure 8-4: Xenon bulb current.

95

8.4

IGBT

An Insulated Gate Bipolar Transistor(IGBT) is the perfect device to control the current through the Xenon ashbulb once triggered. Current IGBTs for strobe applications can pulse 150A with only a 4V gate drive and no gate/base current. These devices are perfect for implementing a red-eye reduction feature on a digital camera. Red-eye occurs when intense light is reected o the retina of the eye. The retina reects the blood vessels nourishing the eye. This occurs when a picture is taken from a camera with a ash and lens very close. More specically, if the lens to the eye to the ash form an angle less than 5 degrees red eye will certainly occur if the subject is looking directly into the lens. With a point-and-shoot camera, the ash is very close to the lens. One way to reduce red-eye is to reduce the size of the iris. One method to decrease the size of the iris is to simply turn on all the lights in the room. Another way to reduce the size of the iris is to have a series of pre-ashes before the picture is taken. An IGBT can switch the current o in the bulb to create smaller ashes before the main photoash.

IXe CM

+
Vtrig RG VCE VG IGBT

VCM

Figure 8-5: IGBT circuit. Figure 8-5 shows a typical implementation of a IGBT strobe circuit. [12] The IGBT goes in series with the Xenon bulb. The current generation of IGBTs require a 4V gate drive, but this will decrease to 2.5V in the next generation. The IGBT should be turned on before the Xenon bulb is triggered, and can be shut o anytime after the triggering. Figure 8-6 shows the triggering voltage, gate voltage on IGBT, and the current through the IGBT. The current through a IGBT designed for strobing can 96

be as high as a 150A. These IGBTs can also block up to 400V between the collector and emitter without any substantial gate drive current.

Figure 8-6: Illustrative IGBT waveforms.

97

98

Chapter 9 Conclusion
9.1 Summary

This thesis investigated the design of a yback capacitor charger as used in a cameras photoash circuitry. Since a limited about of power is available in a portable device, this thesis focused on the eciency and size of the yback capacitor charger solution. The experimental results and simulation data show a boundary mode controller is able to work with the smallest possible transformer with acceptable eciency. This is an exciting result for camera manufacturers with the decreasing size of digital cameras. A boundary mode controller saves power by recycling the energy in the parasitic capacitance of the transformer and operating at a lower frequency for a given magnetizing inductance value.

9.2

Further Work

As a battery is drained, its internal resistance increases, lowering the amount of current it can supply. Some camera designers would like the yback input current to decrease with the battery energy level. The most obvious way to accomplish lowering the input current is to lower the primary peak current. However this increases the frequency of the yback charger, and under utilizes the transformer. A way around this problem is to delay the turn on of the switch when it reaches discontinuous 99

mode. The delay decreases the frequency of the converter, but the amount of energy transferred to the output capacitor is the same per cycle. This feature of a yback converter would increase the battery life of a digital camera. The boundary mode technique also has potential applications with regulating circuits. Many of the benets stated in this thesis would apply to a controller with a xed output. The operating frequency would increase substantially at low output currents, but this problem can be overcome.

100

Appendix A MATLAB Code

%Closs.m %MATLAB Code to Calculate Efficiency Curve, Individual Power Losses %and Charge Time Vout = linspace(1, 320,1000); dV = Vout(2)-Vout(1); Ilim=1.3; alpha = .0; N=10.1; Vin=3.3; Vdiode = 1.2; Vsat = .30; Vmax = 320; Cload=100e-6; Cpara = 2.1e-9; Rsw = .35; Lleakfactor = .3e-6; %Core Winding Al = 40e-9; n=16; L = n^2*Al; %Core Geometry Ae = 9.39e-6; Ve = 167e-9; Ec = .5*24e-6*1.4^2; 101

%Winding Resistances Rp = .22; Rs = 32.6;

tf = 10e-9; tr = 15e-9; figure(1) cntr=0; %Frequency Calculations ton = L*Ilim*(1-alpha)/(Vin-Vsat); toff = L*Ilim*N*(1-alpha)./(Vout+Vdiode)+t_blanking; duty = ton./(ton+toff); freq = 1./(ton+toff); %Modified frequency to use sine wave core loss data freq_m = (2/pi^2).*freq./(duty.*(1-duty)); %Core Loss Data Calculations di = .5*(1-alpha)*Ilim; dB = di*Al*n/Ae; P=5.17e-2.*Ve.*dB^2.45.*freq_m.^1.72; %DC Resistance in transformer Pdcs = (1-duty).*Ilim^2.*(alpha+((1-alpha)^2)/3)*Rs/N^2; Pdcp = (duty).*Ilim^2.*(alpha+((1-alpha)^2)/3)*(Rp); Ip = (Pdcp./Rp).^.5; Is = (Pdcs./Rs).^.5; %Losses in switch Psw = (duty).*Ilim^2.*(alpha+((1-alpha)^2)/3)*(Rsw); Pf= (Vout./N)*Ilim*tf.*freq./2; Pr = (Vout./N)*Ilim*alpha*tr.*freq./2; %Loss from Leakage Pleakfactor = .5*Ilim^2*Lleak*freq; %Parasitic Capacitor Loss Pcloss = .5*Cpara.*(Vout./N).^2.*freq; %Diode losses Pdiode = Vdiode*Ilim*(1+alpha).*((Vin-Vsat).*(Vout+Vdiode)) ./(2.*Vout.*(Vout+Vdiode+N*(Vin-Vsat))); 102

%Power from battery Pin = .5*Ilim.*duty.*(alpha+1)*Vin; %Iin =Pin./Vin;

Plosslf = Pdcs+Pdcp; Plosshf = Pcloss+P+Pf+Pr; Ploss = Pdcs+Pdcp+P+Pcloss+Pdiode+Pf+Pr+Pleak+Psw; Eff = (Pin-(Ploss))./Pin; %Efficiency Curve Plot plot(Vout,Eff); axis([100 320 .6 .85]); %Individual Power Loss Plot figure(2) plot(Vout,Pdcp,Vout,Pdcs,Vout,Pleak,Vout,Pdiode,Vout, Pcloss,Vout,Pf,Vout,Pr,Vout,P,Vout,Psw); legend(Pdcp,Pdcs,Pleak,Pdiode,Pcloss, Pf,Pr,Pcore,Psw) %Charge Time Calculation nu=.75; Cload=100e-6; tb=300e-9; Lpri=10e-6; tcharge = (Cload*Vmax./Ilim./nu)*(Vmax./Vin+tb*Vmax/Lpri/Ilim+2*N) %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %losscalc.m %A function to calculates the efficiency for %a capacitor charger function [eff,data] = losscalc(Al, Wa, MLT, Ve, Ae, Bex, fex, n, N, Ilim, alpha, Cload, Vin, Vmax, leakpercent, primarywinding) Vout = linspace(1, 320,1000); dV = Vout(2)-Vout(1); Vdiode = 1.2; Vsat = .3; t_blanking = 0;

103

alpha1 = primarywinding; alpha2 = 1-alpha1; tf = 10e-9; tr = 15e-9; Rsw = .30; %Set to .3 for Boundary Mode and 1 for Continuous boundaryeff = .3; Cpara = 2e-9; C = boundaryeff*Cpara;

L = n^2*Al; data(1)=L; %Not used since leakage energy is mostly recovered Lleak = L*leakpercent; Ku = .3; p = 1.724e-8; %Negative Current from Boundary Mode Ic = (1-boundaryeff).*(Vout./N)*(Cpara/L)^.5;

%Winding Resistances calculated from winding window data Rp = p*n^2*MLT/Wa/Ku/alpha1 Rs = p*(n*N)^2*MLT/Wa/Ku/alpha2 %Wire thickness aw1=alpha1*Ku*Wa/n; aw2=alpha2*Ku*Wa/(n*N); data(2)=aw1; data(3)=aw2; %data(4)=Ilim; %data(5)=Ilim*alpha; %Frequency Calculations ton = L.*(Ilim + Ic).*(1-alpha)./(Vin-Vsat); toff = L*Ilim*N*(1-alpha)./(Vout+Vdiode)+t_blanking; duty = ton./(ton+toff); freq = 1./(ton+toff); data(4)=max(freq); %Modified frequency to use sine wave core loss data freq_m = (2/pi^2).*freq./(duty.*(1-duty)); 104

%Core Loss Data Calculations di = .5*(1-alpha)*Ilim; dB = di*Al*n/Ae; P=5.17e-2.*Ve.*dB^2.45.*freq_m.^1.72; %DC Resistance in transformer Pdcs = (1-duty).*Ilim^2.*(alpha+((1-alpha)^2)/3)*Rs/N^2; Pdcp = (duty).*Ilim^2.*(alpha+((1-alpha)^2)/3)*(Rp); Ip = (Pdcp./Rp).^.5; Is = (Pdcs./Rs).^.5; %Losses in switch Psw = (duty).*Ilim^2.*(alpha+((1-alpha)^2)/3)*(Rsw); Pf= (Vout./N)*Ilim*tf.*freq./2; Pr = (Vout./N)*Ilim*alpha*tr.*freq./2; %Loss from Leakage Pleak = .5*Ilim^2*Lleak*freq; %Parasitic Capacitor Loss Pcloss = .5*C.*(Vout./N).^2.*freq; %Diode losses Pdiode = Vdiode*Ilim*(1+alpha).*((Vin-Vsat).*(Vout+Vdiode)) ./(2.*Vout.*(Vout+Vdiode+N*(Vin-Vsat))); %Power from battery Pin = .5*Ilim.*duty.*(alpha+1)*Vin; Plosslf = Pdcs+Pdcp; Plosshf = Pcloss+P+Pf+Pr; Ploss = Pdcs+Pdcp+P+Pcloss+Pdiode+Pf+Pr+Pleak+Psw; Eff = (Pin-(Ploss))./Pin; dv_dt=2.*Cload.*Vout./Ilim.*(1/Vin+N./Vout).*((1-alpha)/(1-alpha^2)); temp = dv_dt.*(Ploss); intarea = dV*sum(temp); EnergyC = .5*Cload*Vmax^2; eff = (EnergyC)./(EnergyC+intarea); data(6)=eff; %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %ploteff 105

%Generates Efficiency Sweeps for different Parameters such as alpha %and magnetizing inductance. clear L; clear eff; clear Pin cntr = 0; %for alpha = 0:.01:.9, for n = 0:1:30, cntr=cntr+1; u0 = 1.26e-6; Al = 40e-9; Wa = 3.2e-6; MLT = 17.5e-3; Ve=167e-9; Ae=9.4e-6; Bex = 2.45; fex = 1.72; %n = 16; N = 10; Iin = .6; Ilim = 1.3 alpha = 0; Cload = 100e-6; Vin = 3.3; Vmax = 320; leakpercent = .03; primarywinding = .7;%Winding window allocation for primary wind. lg = u0*Ae/Al; Bsat = 400e-3; %Bsat = Al*n*1.2/Ae; %Ilim = 2*Iin/(alpha+1)/.85; %Al = Bsat*Ae/n/Ilim %n= Bsat*Ae/Al/Ilim [eff(cntr) jk(cntr,:)] = losscalc(Al, Wa, MLT, Ve, Ae, Bex, fex, n, N, Ilim, alpha, Cload, Vin, Vmax, leakpercent, primarywinding); alphalst(cntr) = alpha; ncntr(cntr) = n^2*Al; end figure(1) plot(ncntr,eff,b);

106

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %ploteff2 %Generates efficiency data for the scaled core. clear L; clear eff; clear Pin cntr = 0; for vf = .1:.01:1, cntr=cntr+1; u0 = 1.26e-6; Al = 40e-9; Wa = 3.2e-6; MLT = 17.5e-3; Ve=167e-9; Ae=9.4e-6; Bex = 2.45; fex = 1.72; nmax = 20; N = 10; Iin = .5; alpha = 0; Cload = 100e-6; Vin = 3.3; Vmax = 320; leakpercent = 0; primarywinding = .7;%Winding window allocation for primary wind. lg = u0*Ae/Al; Bsat = 400e-3; Pin = Iin*Vin; Vtot = 280.9e-3*vf^3; MLTf = vf.*MLT; Aef = vf^2*Ae; lgf = vf^2*lg; Alf = u0*Aef/lgf; Waf = vf^2*Wa; Vef = vf^3*Ve; Ilim = 1.4; nsat = Bsat*Aef/Ilim/Alf; n = min(nmax,nsat); L(cntr) = n^2*Al; 107

Ilimvf(cntr) = 2*Iin/.9+(23)*(2e-9/L(cntr))^.5;

[eff(cntr) jk(cntr,:)] = losscalc2(Alf, Waf, MLTf, Vef, Aef, Bex, fex, n, N, Ilimvf(cntr), alpha, Cload, Vin, Vmax, leakpercent, primarywinding,Pin); toffvf(cntr) = L(cntr)*Ilim*N*(1-alpha)./(300); vflist(cntr) = vf; factorvf(cntr) = eff(cntr)^3.*Pin./Vtot; end figure(1) plot(vflist,factorvf); figure(2) plot(vflist,eff); figure(3) plot(vflist,L); figure(4) plot(vflist,Ilimvf);

108

Appendix B Board Layout

109

Figure B-1: Board Layout

110

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www.namkwong.com.hk, 2003. [8] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics Second Edition, Norwell: Kluwer Academic Publishers, 2001, Chapters 13-15. [9] J. Reinert, A. Brockmeyer, and R. W. De Doncker, Calculation of Losses in Ferro- and Ferrimagnetic Materials Based on the Modied Steinmetz Equation, Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. 111

Conference Record of the 1999 IEEE , Volume: 3 , 3-7 Oct. 1999 Page(s): 2087 -2092 vol.3. [10] M. Albach and A. Brockmeyer, Calculating Core Losses in Transformers for Arbitrary Magnetizing Currents A Comparison of Dierent Approaches, Power Electronics Specialists Conference, 1996. PESC 96 Record., 27th Annual IEEE , Volume: 2 , 23-27 June 1996 Page(s): 1463 -1468 vol.2. [11] Sanyo Electric Co., Ltd., 2SD879, NPN Epitaxial Planar Silicon Transistor, www.sanyo.com, 2003. [12] Fairchild Semiconductor, FGS15N40L IGBT, www.fairchildsemi.com, 2003.

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