Computer Architecture

Architechture of 8085:
Acumulator :It is a 8-bit register which is used to perform airthmetical and logical
operation. It stores the output of any operation. It also works as registers for i/o
accesses.
Temporary Register :It is a 8-bit register which is used to hold the data on which
the acumulator is computing operation. It is also called as operand register because
it provides operands to ALU.
Registers:These are general purposes registers. Microprocessor consists 6 general
purpose registers of 8-bit each named as B,C,D,E,H and L. Generally theses
registers are not used for storing the data permanently. It carries the 8-bits data.
These are used only during the execution of the instructions.
These registers can also be used to carry the 16 bits data by making the pair of 2
registers. The valid register pairs available are BC,DE HL. We can not use other pairs
except BC,DEand HL. These registers are programmed by user.
ALU:ALU performs the airthmetic operations and logical operation.
Flag Registers :It consists of 5 flip flop which changes its status according to the
result stored in an accumulator. It is also known as status registers. It is connected
to the ALU.
There are five flip-flops in the flag register are as follows:Sign(S), zero(z),Auxiliary
carry(AC),Parity(P),Carry(C)
The bit position of the flip flop in flag register is:
D7
D6
D5
D4
D3
AC
D2
P
All of the three flip flop set and reset according to the stored result in the
accumulator.
1.Sign-If D7 of the result is 1 then sign flag is set otherwise reset. As we know that a
number on the D7 always desides the sign of the number. if D7 is 1: the number is
negative. if D7 is 0: the number is positive.
2.Zeros(Z)-If the result stored in an accumulator is zero then this flip flop is set
otherwise it is reset.
3.Auxiliary carry(AC)-If any carry goes from D3 to D4 in the output then it is set
otherwise it is reset.
4.Parity(P)-If the no of 1's is even in the output stored in the accumulator then it is
set otherwise it is reset for the odd.
5.Carry(C)-If the result stored in an accumulator generates a carry in its final output
then it is set otherwise it is reset.
Instruction registers(IR): It is a 8-bit register. When an instruction is fetched from
memory then it is stored in this register.
Instruction Decoder: Instruction decoder identifies the instructions. It takes the
informations from instruction register and decodes the instruction to be performed.
Program Counter :It is a 16 bit register used as memory pointer. It stores the
memory address of the next instruction to be executed. So we can say that this
register is used to sequencing the program. Generally the memory have 16 bit
addresses so that it has 16 bit memory. The program counter is set to 0000H.
Stack Pointer: It is also a 16 bit register used as memory pointer. It points to the
memory location called stack. Generally stack is a reserved portion of memory
where information can be stores or taken back together.
Timing and Control Unit: It provides timing and control signal to the
microprocessor to perform the various operation.It has three control signal. It
controls all external and internal circuits. It operates with reference to clock signal.It
D1
synchronizes all the data transfers.

There are three control signal:
1. ALE- Address Latch Enable, It provides control signal to synchronize the
components of microprocessor.
2. RD- This is active low used for reading operation.
3. WR-This is active low used for writing operation.
There are three status signal used in microprocessor S0, S1 and IO/M. It changes its
status according the provided input to these pins.
Serial Input Output Control-There are two pins in this unit. This unit is used for
serial data communication.
Interrupt Unit:There are 6 interrupt pins in this unit. Generally an external
hardware is connected to these pins. These pins provide interrupt signal sent by
external hardware to microprocessor and microprocessor sends acknowledgement
for receiving the interrupt signal. Generally INTA is used for acknowledgement.
Pin Diagram and Pin description of 8085
8085 is a 40 pin IC, The signals from the pins can be grouped as follows
1.
2.
3.
4.
5.
6.
Power supply and clock signals

Address bus
Data bus
Control and status signals
Interrupts and externally initiated signals
Serial I/O ports
1. Power supply and Clock frequency signals:

Vcc: + 5 volt power supply
Vss: Ground
X1, X2 : Crystal or R/C network or LC network connections to set the frequency of
internal clock generator. The frequency is internally divided by two. Since the basic
operating timing frequency is 3 MHz, a 6 MHz crystal is connected externally. CLK
(output)-Clock Output is used as the system clock for peripheral and devices
interfaced with the microprocessor.
2. Address Bus:A8 - A15: (output; 3-state)

It carries the most significant 8 bits of the memory address or the 8
bits of the I/O address.
3. Data bus:AD0 - AD7 (input/output; 3-state)
These multiplexed set of lines used to carry the lower order 8 bit
address as well as data bus.
During the opcode fetch operation, in the first clock cycle, the lines deliver
the lower order address A0 - A7.
In the subsequent IO / memory, read / write clock cycle the lines are used as
data bus.
The CPU may read or write out data through these lines.
4. Control and Status signals:

ALE (output) - Address Latch Enable.
It is an output signal used to give information of AD0-AD7 contents.
It is a positive going pulse generated when a new operation is started by uP.

When pulse goes high it indicates that AD0-AD7 are address.
When it is low it indicates that the contents are data.
RD (output 3-state, active low)

Read memory or IO device.
This indicates that the selected memory location or I/O device is to be read
and that the data bus is ready for accepting data from the memory or I/O
device
WR (output 3-state, active low)

Write memory or IO device.
This indicates that the data on the data bus is to be written into the selected
memory location or I/O device.
IO/M (output) - Select memory or an IO device.
This status signal indicates that the read / write operation relates to whether the
memory or I/O device.It goes high to indicate an I/O operation and low for memory
operations.
5. Status Signals:S1: S2:

It is used to know the type of current operation of the microprocessor.
IO/M
S1
S0
OPERATION
Opcode fetch
Memory read
Memory write
I/O read
I/O write
Interrupt acknowledge
Halt
Hold
Reset
6. Interrupts and Externally initiated operations:

They are the signals initiated by an external device to request the
microprocessor to do a particular task or work.
There are five hardware interrupts called,TRAP
RST 7.5
RST 6.5
RST 5.5
INTA
On receipt of an interrupt, the microprocessor acknowledges the interrupt by the
active low INTA (Interrupt Acknowledge) signal.
Reset In (input, active low)
This signal is used to reset the microprocessor.

The program counter inside the microprocessor is set to zero.
The buses are tri-stated.Reset Out (Output)
It indicates CPU is being reset.
Used to reset all the connected devices when the microprocessor is reset.
The CPU controls the data transfer operation between memory and I/O device.
Direct Memory Access operation is used for large volume data transfer between
memory and an I/O device directly.
HOLD signal is generated by the DMA controller circuit. On receipt of this signal,
the microprocessor acknowledges the request by sending outHLDA signal and
leaves out the control of the buses. After the HLDA signal the DMA controller starts
the direct transfer of data.
READY (input):
Memory and I/O devices will have slower response compared to microprocessors.
Before completing the present job such a slow peripheral may not be able to
handle further data or control signal from CPU.
The processor sets the READY signal after completing the present job to access
the data.
The microprocessor enters into WAIT state while the READY pin is disabled.
8. Single Bit Serial I/O ports:
SID (input) Serial input data line
SOD (output) Serial output data line
These signals are used for serial communication.
Addressing Modes in 8085:

1. Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Indirect Addressing Mode
5. Implied/implicit Addressing Mode
Immediate Addressing Mode:
An immediate is transferred directly to the register.
Eg: MVI A, 30H (30H is copied into the register A)
MVI B,40H(40H is copied into the register B).
Register Addressing Mode

Data is copied from one register to another register.
Eg: MOV B, A (the content of A is copied into the register B)
MOV A, C (the content of C is copied into the register A).
Direct Addressing Mode

Data is directly copied from the given address to the register.
Eg: LDA 3000H (The content at the location 3000H is copied to the register A).
Indirect Addressing Mode
The data is transferred from the address pointed by the data in a register to other
register.
Eg: MOV A, M (data is transferred from the memory location pointed by the regiser to
the accumulator).
Implied Addressing Mode

This mode doesn't require any operand. The data is specified by opcode itself.
Eg: RAL
CMP
Bus Structure in 8085

There are three buses in Microprocessor:
1. Address Bus
2. Data Bus
3. Control Bus
Address Bus
Genearlly, Microprocessor has 16 bit address bus. The bus over which the CPU
sends out the address of the memory location is known as Address bus. The address
bus carries the address of memory location to be written or to be read from.
The address bus is unidirectional. It means bits flowing occurs only in one direction,
only from microprocessor to peripheral devices. We can find that how much memory
location it can using the formula 2^N. where N is the number of bits used for
address lines.
Data Bus
8085 Microprocessor has 8 bit data bus. So it can be used to carry the 8 bit data
starting from 00000000H(00H) to 11111111H(FFH). Here 'H' tells the Hexadecimal
Number. It is bidirectional. These lines are used for data flowing in both direction
means data can be transferred or can be received through these lines. The data bus
also connects the I/O ports and CPU. The largest number that can appear on the
data bus is 11111111.
It has 8 parallel lines of data bus. So it can access upto 2^8 = 256 data bus lines.
Control Bus
The control bus is used for sending control signals to the memory and I/O devices.
The CPU sends control signal on the control bus to enable the outputs of addressed
memory devices or I/O port devices.
Some of the control bus signals are as follows:
1. Memory read
2. Memory write
3. I/O read
4. I/O write
Interrupts In 8085
what is Interrupt?
Interrupt is a mechanism by which an I/O or an instruction can suspend the normal
execution of processor and get itself serviced. Generally, a particular task is
assigned to that interrupt signal. In the microprocessor based system the interrupts
are used for data transfer between the peripheral devices and the microprocessor.
Interrupt Service Routine(ISR)
A small program or a routine that when executed services the corresponding
interrupting source is called as an ISR.
Maskable/Non-Maskable Interrupt
An interrupt that can be disabled by writing some instruction is known as Maskable
Interrupt otherwise it is called Non-Maskable Interrupt.
There are 6 pins available in 8085 for interrupt:
1. TRAP
2. RST 7.5
3. RST6.5
4. RST5.5
5. INTR
6. INTA
Execution of Interrupts
When there is an interrupt requests to the Microprocessor then after accepting the
interrupts Microprocessor send the INTA (active low) signal to the peripheral. The
vectored address of particular interrupt is stored in program counter. The processor

executes an interrupt service routine (ISR) addressed in program counter.
There are two types of interrupts used in 8085 Microprocessor:
1. Hardware Interrupts
2. Software Interrupts
Software Interrupts
A software interrupts is a particular instructions that can be inserted into the desired
location in the rpogram. There are eight Software interrupts in 8085 Microprocessor.
From RST0 to RST7.
1. RST0
2. RST1
3. RST2
4. RST3
5. RST4
6. RST5
7. RST6
8. RST7
They allow the microprocessor to transfer program control from the main program
to the subroutine program. After completing the subroutine program, the program
control returns back to the main program.
We can calculate the vector address of these interrupts using the formula given
below:
Vector Address = Interrupt Number * 8
For Example:
RST2:
vector address=2*8
= 16
RST1:
vector address=1*8
= 08
RST3:
vector address=3*8
= 24
Vector address table for the software interrupts:

Interrupt
Vector Address
RST0
RST1
0000H
0008H
RST2
0010H
RST3
0018H
RST4
RST5
0020H
0028H
RST6
RST7
0030H
0038H
Hardware Interrupt
As i have already discussed that there are 6 interrupt pins in the microprocessor
used as Hardware Interrrupts given below:
1. TRAP
2. RST7.5
3. RST6.5
4. RST5.5
5. INTR
Note:
INTA is not an interrupt. INTA is used by the Microprocessor for sending the
acknowledgement.TRAP has highest priority and RST7.5 has second highest priority
and so on.
The Vector address of these interrupts are given below:
Interrupt
Vector Address
RST7.5
003CH
RST6.5
0034H
RST5.5
002CH
TRAP
0024H
TRAP
It is non maskable edge and level triggered interrupt. TRAP has the highest priority
and vectores interrupt. Edge and level triggered means that the TRAP must go high
and remain high until it is acknowledged. In case of sudden power failure, it
executes a ISR and send the data from main memory to backup memory.
As we know that TRAP can not be masked but it can be delayed using HOLD signal.
This interrupt transfers the microprocessor's control to location 0024H.
TRAP interrupts can only be masked by reseting the microprocessor. There is no
other way to mask it.

RST7.5
It has the second highest priority. It is maskable and edge level triggered interrupt.
The vector address of this interrupt is 003CH. Edge sensitive means input goes high
and no need to maintain high state until it is recognized.
It can also be reset or masked by reseting microprocessor. It can also be resetted by
DI instruction.
RST6.5 and RST5.5
These are level triggered and maskable interrupts. When RST6.5 pin is at logic 1,
INTE flip-flop is set. RST 6.5 has third highest priority and RST 5.5 has fourth highest
priority.
It can be masked by giving DI and SIM instructions or by reseting microprocessor.
INTR
It is level triggered and maskable interrupt. The following sequence of events occurs
when INTR signal goes high:
1. The 8085 checks the status of INTR signal during execution of each
instruction.
2. If INTR signal is high, then 8085 complete its current instruction and sends
active low interrupt acknowledge signal, if the interrupt is enabled.
3. On receiving the instruction, the 8085 save the address of next instruction on
stack and execute received instruction.
It has the lowest priority. It can be disabled by reseting the microprocessor or by DI
and SIM instruction.
Instruction Set 8085

1. Control
2. Logical
3. Branching
4. Arithmetic
5. Data Transfer
Control Instructions
Opco
de
Operand
Explanation of
Instruction
Description
NOP
none
No operation
No
operation
is
performed.
The
instruction is fetched and decoded.
However
no
operation
is
executed.Example: NOP
HLT
none
Halt and enter wait The CPU finishes executing the current
state
instruction
and
halts
any
further
execution. An interrupt or reset is
necessary
to exit from the halt
state.Example: HLT
DI
none
Disable interrupts The interrupt enable flip-flop is reset and

all the interrupts except the TRAP are
disabled. No flags are affected.Example:
DI
EI
none
Enable interrupts The interrupt enable flip-flop is set and all

interrupts are enabled. No flags are
affected. After a system reset or the
acknowledgement of an interrupt, the
interrupt enable flipflop is reset, thus
disabling the interrupts. This instruction
necessary to reenable the interrupts
(except TRAP).Example: EI
RIM
none
Read interrupt mas This is a multipurpose instruction used to

read the status of interrupts 7.5, 6.5, 5.5
and read serial data input bit. The
instruction loads eight bits in the
accumulator
with
the
following
interpretations.Example: RIM
SIM
none
Set interrupt mask This is a multipurpose instruction and

used to implement the 8085 interrupts
7.5, 6.5, 5.5, and serial data output. The
instruction interprets the accumulator
contents as follows.Example: SIM
LOGICAL INSTRUCTIONS
Opco
de
CMP
CPI
ANA
Operand Explanation of
Instruction
Description
R
M
Compare
register or
memory with
accumulator
The contents of the operand (register or

memory) are M compared with the
contents of the accumulator. Both
contents are preserved . The result of the
comparison is shown by setting the flags
of the PSW as follows:
if (A) < (reg/mem): carry flag is set
if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags
are reset Example: CMP B or CMP M
8-bit
data
Compare
The second byte (8-bit data) is compared
immediate with with the contents of the accumulator.
accumulator
The values being compared remain
unchanged. The result of the comparison
is shown by setting the flags of the PSW
as follows:
if (A) < data: carry flag is set
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are
reset
Example: CPI 89H
R
M
Logical AND
register or
memory with
accumulator
The contents of the accumulator are

logically ANDed with M the contents of
the operand (register or memory), and
the result is placed in the accumulator. If
the operand is a memory location, its
address is specified by the contents of HL
registers. S, Z, P are modified to reflect
the result of the operation. CY is reset.

AC is set.
Example: ANA B or ANA M
ANI
8-bit
data
Logical AND
immediate with logically
ANDed
with
the
accumulator
8-bit data (operand) and the result is
placed
in
the
accumulator. S, Z, P are modified to
reflect
the
result
of
the
operation. CY is reset. AC is set.
Example: ANI 86H
XRA
R
M
Exclusive OR
register or
memory with
accumulator
XRI
8-bit
data
Exclusive OR
immediate with Exclusive ORed with the 8-bit data
accumulator
(operand) and the result is placed in the
reflect the result of the operation. CY and
AC are reset.Example: XRI 86H
ORA
R
M
Logical OR
register or
memory with
accumulator
ORI
8-bit
data
Logical OR
immediate with logically ORed with the 8-bit data
accumulator
(operand) and the result is placed in the
reflect the result of the operation. CY and
AC are reset.Example: ORI 86H
RLC
none
Rotate
Each binary bit of the accumulator is
accumulator left rotated left by one position. Bit D7 is

Exclusive ORed with M the contents of
the operand (register or memory), and
the result is placed in the accumulator. If
the operand is a memory location, its
the result of the operation. CY and AC are
reset.
Example: XRA B or XRA M

logically ORed with M the contents of the
operand (register or memory), and the
result is placed in the accumulator. If the
operand is a memory location, its
the result of the operation. CY and AC are
reset.Example: ORA B or ORA M
placed in the position of D0 as well as in

the Carry flag. CY is modified according
to bit D7. S, Z, P, AC are not
affected.Example: RLC
RRC
none
RAL
RAR
none

rotated right by one position. Bit D0 is
placed in the position of D7 as well as in
the Carry flag. CY is modified according
to bit D0. S, Z, P, AC are not
affected.Example: RRC
Rotate
accumulator left rotated left by one position through the
through carry
Carry flag. Bit D7 is placed in the Carry
flag, and the Carry flag is placed in the
least significant position D0. CY is
modified according to bit D7. S, Z, P, AC
are not affected.Example: RAL
Rotate
accumulator
right through
carry

rotated right by one position through the
Carry flag. Bit D0 is placed in the Carry
flag, and the Carry flag is placed in the
most significant position D7. CY is
modified according to bit D0. S, Z, P, AC
are not affected.Example: RAR
none
Complement
accumulator

complemented.
No
flags
are
affected.Example: CMA
CMC
none
Complement
carry
The Carry flag is complemented. No

other flags are affected.Example: CMC
STC
none
Set Carry
Set Carry
CMA
none
Rotate
accumulator
right
Example: STC
BRANCHING INSTRUCTIONS
Opcode
Instruction
JMP
16-bit
address
Jump
unconditionally
Description
The
program
sequence
is
transferred to the memory location
specified by the 16-bit address
given in the operand.Example: JMP
2034H or JMP XYZ
16-bit
Flag
Opcod Descriptio
Statu address
e
n
s
JC
Jump on
Carry
JNC
Jump on CY =
no Carry 0
JP
Jump on
positive
S=0
JM
Jump on
minus
S=1
JZ
Jump on
zero
Z=1
JNZ
Jump on
no zero
Z=0
JPE
Jump on
parity
even
P=1
JPO
Jump on
parity
odd
P=0
Jump
conditionally
The
program
sequence
is
given in the operand based on the
specified flag of the PSW as
described below.
Example: JZ 2034H or JZ XYZ
Unconditional
subroutine call
The
program
sequence
is
given in the operand. Before the
transfer, the address of the next
instruction after CALL (the contents
of the program counter) is pushed
onto the stack.
Example: CALL 2034H or CALL XYZ
CY =
1
16-bit
Flag
Opcod Descriptio
Statu address
e
n
s
CC
Call on
Carry
CY =
1
CNC
Call on
CY =
no Carry 0
CP
Call on
positive
S=0
CM
Call on
minus
S=1
CZ
Call on
zero
Z=1
CNZ
Call on
no zero
Z=0
CPE
Call on
parity
even
P=1
CPO
Call on
parity
odd
P=0
RET
none
Flag none
Opcod Descriptio
Statu
e
n
s
RC
Return
CY =
on Carry 1
RNC
Return o
CY =
n no
0
Carry
RP
Return o
S=0
n positive
RM
Return o
S=1
n minus
RZ
Return o
Z=1
n zero
RNZ
Return o
Z=0
n no zero
RPE
Return o
n parity P = 1
even
RPO
Return o
n parity P = 0
odd
PCHL
none
Return from
subroutine
unconditionally
The
program
sequence
is
transferred from the subroutine to
the calling program. The two bytes
from the top of the stack are copied
into the program counter,and
program execution begins at the
new address.
Example: RET
Return from
subroutine
conditionally
The
program
sequence
is
transferred from the subroutine to
the calling program based on the
specified flag of the PSW as
described below. The two bytes
from the top of the stack are copied
into the program counter, and
program execution begins at the
new address.
Example: RZ
Load program
The contents of registers H and L
counter with HL are copied into the program
contents
counter. The contents of H are
placed as the high-order byte and
the contents of L as the low-order
byte.
Example: PCHL
RST
0-7
Restart
The RST instruction is equivalent to

a 1-byte call instruction to one of
eight memory locations depending
upon the number. The instructions
are generally used in conjunction
with interrupts and inserted using
external hardware. However these
can
be
used
as
software
instructions in a program to transfer
program execution to one of the
eight locations. The addresses are:
Instructio Restart
n
Address
RST 0
0000H
RST1
0008H
RST 2
0010H
RST 3
0018H
RST 4
0020H
RST 5
0028H
RST 6
0030H
RST 7
0038H
The 8085 has four additional
interrupts and these interrupts
generate RST instructions internally
and thus do not require any
external
hardware.
These
instructions
and
their
Restart
addresses are:
Interrup Restart
t
Address
Arithmetic Instructions
TRAP
0024H
RST
5.5
002CH
RST
6.5
0034H
RST
7.5
003CH
Opco
de
ADD
Instruction
Description
R
M
Add register or The contents of the operand (register or

memory, to
memory) are added to the contents of the
accumulator
accumulator and the result is stored in the
accumulator. If the operand is a memory
location, its location is specified by the
contents of the HL registers. All flags are
modified to reflect the result of the
addition.Example: ADD B or ADD M
ADC
R
M
Add register to The contents of the operand (register or

accumulator
memory) and M the Carry flag are added to
with carry
the contents of the accumulator and the result
is stored in the accumulator. If the operand is
a memory location, its location is specified by
the contents of the HL registers. All flags are
addition.Example: ADC B or ADC M
ADI
8-bit
data
Add immediate The 8-bit data (operand) is added to the

to accumulator contents of the accumulator and the result is
stored in the accumulator. All flags are
addition.Example: ADI 45H
ACI
8-bit data Add immediate The 8-bit data (operand) and the Carry flag are
to accumulator added to the contents of the accumulator and
with carry
the result is stored in the accumulator. All
flags are modified to reflect the result of the
addition.
Example: ACI 45H
LXI
Reg. pair, Load register

The instruction loads 16-bit data in the
16-bit
pair immediate register pair designated in the operand.
data
Example: LXI H, 2034H or LXI H, XYZ
DAD
SUB
Reg. pair Add register

The 16-bit contents of the specified register
pair to H and L pair are added to the contents of the HL
registers
register and the sum is stored in the HL
register. The contents of the source register
pair are not altered. If the result is larger than
16 bits, the CY flag is set. No other flags are
affected.Example: DAD H
R
M
Subtract
register or
memory from
accumulator

memory ) are subtracted from the contents of
the accumulator, and the result is stored in
the accumulator. If the operand is a memory

subtraction.Example: SUB B or SUB M
SBB
R
M
Subtract source
and borrow
from
accumulator
SUI
8-bit
data
Subtract
The 8-bit data (operand) is subtracted from
immediate from the contents of the accumulator and the result
accumulator
is stored in the accumulator. All flags are
subtraction.Example: SUI 45H
8-bit
data
Subtract
The contents of register H are exchanged with
immediate from the contents of register D, and the contents of
accumulator
register L are exchanged with the contents of
with borrow
register E.
Example: XCHG
R
M
Increment
register or
memory by 1
SBI
INR
INX
DCR
DCX
R
M

memory ) and M the Borrow flag are
subtracted from the contents of the
accumulator and the result is placed in the
accumulator. If the operand is a memory
subtraction.Example: SBB B or SBB M
The contents of the designated register or

memory) are incremented by 1 and the result
is stored in the same place. If the operand is a
memory location, its location is specified by
the contents of the HL registers.Example: INR
B or INR M
Increment
The contents of the designated register pair
register pair by are incremented by 1 and the result is stored
1
in the same place.Example: INX H
Decrement
register or
memory by 1
The contents of the designated register or

memory are M decremented by 1 and the
result is stored in the same place. If the
operand is a memory location, its location is
specified by the contents of the HL
registers.Example: DCR B or DCR M
Decrement
The contents of the designated register pair
register pair by are decremented by 1 and the result is stored
1
in the same place.
Example: DCX H
DAA
none
Decimal adjust The contents of the accumulator are changed

accumulator
from a binary value to two 4-bit binary coded
decimal (BCD) digits. This is the only
instruction that uses the auxiliary flag to
perform the binary to BCD conversion, and the
conversion procedure is described below. S, Z,
AC, P, CY flags are altered to reflect the results
of the operation.
If the value of the low-order 4-bits in the
accumulator is greater than 9 or if AC flag is
set, the instruction adds 6 to the low-order
four bits.
If the value of the high-order 4-bits in the
accumulator is greater than 9 or if the Carry
flag is set, the instruction adds 6 to the highorder four bits.
Example: DAA
Data Transfer Instructions
Opco
de
MOV
Instruction
Rd, Rs
M, Rs
Rd, M
Description
Copy from source(Rs) This instruction copies the contents

to destination(Rd)
of the source register into the
destination register; the contents of
the source register are not altered. If
one of the operands is a memory
location, its location is specified by
the
contents
of
the
HL
registers.Example: MOV B, C or MOV
B, M
MVI
Rd, data Move immediate 8-bit The 8-bit data is stored in the
M, data
destination register or memory. If the
operand is a memory location, its
location is specified by the contents
of the HL registers.
Example: MVI B, 57H or MVI M, 57H
LDA
16-bit
address
Load accumulator
The contents of a memory location,

specified by a 16-bit address in the
operand,
are
copied
to
the
accumulator. The contents of the
source are not altered.Example: LDA
2034H
LDAX
B/D Reg. Load accumulator

pair
indirect
The contents of the designated

register pair point to a memory
location. This instruction copies the
contents of that memory location
into the accumulator. The contents of
either the register pair or the
memory location are not altered.
Example: LDAX B
LXI
Reg.
pair, 16bit data
Load register pair

immediate
The instruction loads 16-bit data in

the register pair designated in the
operand.
Example: LXI H, 2034H or LXI H, XYZ
LHLD
16-bit
address
Load H and L
registers direct
The instruction copies the contents

of the memory location pointed out
by the 16-bit address into register L
and copies the contents of the next
memory location into register H. The

contents of source memory locations
are not altered.
Example: LHLD 2040H
STA
STAX
SHLD
XCHG
SPHL
16-bit
address
16-bit address
Reg. pair Store accumulator

indirect
16-bit
address
none
none

copied into the memory location
specified by the operand. This is a 3byte instruction, the second byte
specifies the low-order address and
the third byte specifies the highorder address.
Example: STA 4350H
copied into the memory location
specified by the contents of the
operand (register pair). The contents
of the accumulator are not altered.
Example: STAX B
Store H and L
registers direct
The contents of register L are stored

into the memory location specified
by the 16-bit address in the operand
and the contents of H register are
stored into the next memory location
by incrementing the operand. The
contents of registers HL are not
altered. This is a 3-byte instruction,
the second byte specifies the loworder address and the third byte
specifies the high-order address.
Example: SHLD 2470H
Exchange H and L
with D and E
The contents of register H are

exchanged with the contents of
register D, and the contents of
register L are exchanged with the
contents of register E.
Example: XCHG
Copy H and L
The instruction loads the contents of
registers to the stack the
H
and
L
registers
into
pointer
the stack pointer register, the
contents of the H register provide
the high-order address and the
contents of the L register provide the
low-order address. The contents of
the
H
and L registers are not altered.
Example: SPHL
XTHL
none
Exchange H and L
with top of stack
The contents of the L register are

exchanged with the stack location
pointed out by the contents of the
stack pointer register. The contents
of the H register are exchanged with
the next stack location (SP+1);
however, the contents of the stack
pointer register are not altered.
Example: XTHL
PUSH
Reg. pair Push register pair

onto stack
The contents of the register pair

designated in the operand are copied
onto the stack in the following
sequence. The stack pointer register
is decremented and the contents of
the highorder register (B, D, H, A) are
copied into that location. The stack
pointer register is decremented
again and the contents of the loworder register (C, E, L, flags) are
copied to that location.
Example: PUSH B or PUSH A
POP
Reg. pair Pop off stack to

register pair
The contents of the memory location

pointed out by the stack pointer
register are copied to the low-order
register (C, E, L, status flags) of the
operand. The stack pointer is
incremented by 1 and the contents
of that memory location are copied
to the high-order register (B, D, H, A)
of the operand. The stack pointer
register is again incremented by 1.
Example: POP H or POP A
OUT
8-bit
port
address
Output data from

accumulator to a port copied into the I/O port specified by
with 8-bit address
the operand.
Example: OUT F8H
IN
8-bit
port
address
Input data to
accumulator from a
port with 8-bit
address
The contents of the input port

designated in the operand are read
and loaded into the accumulator.
Example: IN 8CH
Programs Level 1
1. Store 8-bit data in memory
2. Exchange the contents of memory locations
3. Add two 8-bit numbers
4. Subtract two 8-bit numbers
5. Add two 16-bit numbers
6. Add contents of two memory locations
7. Subtract two 16-bit numbers
8. Finding ones complement of a number
9. Finding Twos complement of a number
10.Pack the unpacked BCD numbers
11.Unpack a BCD number
12.Execution format of instructions
13.Right shift, bit of data( 8 bit and 16 bit)
14.Left Shifting of a 16-bit data
15.Alter the contents of flag register in 8085
Store 8-bit data in memory
1.
2.
Program 1:
MVI A, 52H : "Store 32H in the accumulator"
3.
STA 4000H : "Copy accumulator contents at address 4000H"
4.
HLT
: "Terminate program execution"
1.
Program 2:
2.
LXI H : "Load HL with 4000H"
3.
MVI M : "Store 32H in memory location pointed by HL register pair (4000H)"
4.
HLT
Note: The result of both programs will be the same. In program 1 direct addressing
instruction is used, whereas in program 2 indirect addressing instruction is used.
Exchange the contents of memory locations
Statement: Exchange the contents of memory locations 2000H and 4000H.

1.
2.
Program 1:
LDA 2000H : "Get the contents of memory location 2000H into accumulator"
3.
MOV B, A
4.
LDA 4000H : "Get the contents of memory location 4000Hinto accumulator"
5.
STA 2000H : "Store the contents of accumulator at address 2000H"
6.
MOV A, B
7.
STA 4000H : "Store the contents of accumulator at address 4000H"
1.
Program 2:
: "Save the contents into B register"
: "Get the saved contents back into A register"
2.
LXI H 2000H : "Initialize HL register pair as a pointer to memory location

2000H."
3.
LXI D 4000H : "Initialize DE register pair as a pointer to memory location

4000H."
4.
MOV B, M
5.
LDAX D
6.
MOV M, A
: "Get the contents of memory location 2000H into B register."

: "Get the contents of memory location 4000H into A register."
: "Store the contents of A register into memory location 2000H."
7.
MOV A, B
8.
STAX D
9.
HLT
: "Copy the contents of B register into accumulator."

: "Store the contents of A register into memory location 4000H."
: "Terminate program execution."
Note: In Program 1, direct addressing instructions are used, whereas in Program 2,

indirect addressing instructions are used.
Add two 8-bit numbers
Statement: Add the contents of memory locations 4000H and 4001H and place the
result in memory location 4002H.
1.
2.
Sample problem
(4000H) = 14H
3.
(4001H) = 89H
4.
Result
= 14H + 89H = 9DH
5.
6.
Source program
7.
LXI H 4000H : "HL points 4000H"
8.
MOV A, M
9.
INX H
10.
ADD M
11.
INX H
12.
MOV M, A
13.
HLT
: "Get first operand"

: "HL points 4001H"
: "Add second operand"
: "HL points 4002H"
: "Store result at 4002H"
Subtract two 8-bit numbers
Statement: Subtract the contents of memory location 4001H from the memory
location 2000H and place the result in memory location 4002H.
1.
2.
Program : Subtract two 8-bit numbers

Sample problem:
3.
(4000H) = 51H
4.
(4001H) = 19H
5.
Result
= 51H 19H = 38H
6.
7.
Source program:
8.
LXI H, 4000H : "HL points 4000H"
9.
MOV A, M
10.
INX H
11.
SUB M
12.
INX H
13.
MOV M, A
14.
HLT

: "HL points 4001H"
: "Subtract second operand"
: "HL points 4002H"
: "Store result at 4002H"
Add two 16-bit numbers
Statement: Add the 16-bit number in memory locations 4000H and 4001H to the 16bit number in memory locations 4002H and 4003H. The most significant eight bits
of the two numbers to be added are in memory locations 4001H and 4003H. Store
the result in memory locations 4004H and 4005H with the most significant byte in
memory location 4005H.
1.
2.
Sample problem:
(4000H) = 15H
3.
(4001H) = 1CH
4.
(4002H) = B7H
5.
(4003H) = 5AH
6.
Result = 1C15 + 5AB7H = 76CCH
7.
(4004H) = CCH
8.
(4005H) = 76H
9.
10.
Source Program 1:
11.
LHLD 4000H : "Get first I6-bit number in HL"
12.
XCHG
13.
LHLD 4002H : "Get second I6-bit number in HL"
14.
MOV A, E
15.
ADD L
16.
MOV L, A
: "Store result in L register"
17.
MOV A, D
: "Get higher byte of the first number"
18.
ADC H
19.
MOV H, A
20.
SHLD 4004H : "Store I6-bit result in memory locations 4004H and 4005H"
21.
HLT
1.
Source program 2:
2.
LHLD 4000H : Get first I6-bit number
3.
XCHG : Save first I6-bit number in DE
4.
LHLD 4002H : Get second I6-bit number in HL
5.
DAD D : Add DE and HL
6.
SHLD 4004H : Store I6-bit result in memory locations 4004H and 4005H.
: "Save first I6-bit number in DE"
: "Get lower byte of the first number"

: "Add lower byte of the second number"
: "Add higher byte of the second number with CARRY"

: "Store result in H register"
7.
HLT : Terminate program execution

NOTE: In program 1, eight bit addition instructions are used (ADD and ADC) and
addition is performed in two steps. First lower byte addition using ADD instruction
and then higher byte addition using ADC instruction.In program 2, 16-bit addition
instruction (DAD) is used.
Add contents of two memory locations
Statement: Add the contents of memory locations 40001H and 4001H and place the
result in the memory locations 4002Hand 4003H.
1.
2.
Sample problem:
(4000H) = 7FH
3.
(400lH) = 89H
4.
Result
= 7FH + 89H = lO8H
5.
(4002H) = 08H
6.
(4003H) = 0lH
7.
Source program:
8.
LXI H, 4000H : "HL Points 4000H"
9.
MOV A, M
10.
INX H
11.
ADD M
12.
INX H
13.
MOV M, A
14.
MVIA, 00
15.
ADC A
16.
INX H
17.
MOV M, A

: "HL Points 4001H"
: "Add second operand"
: "HL Points 4002H"
: "Store the lower byte of result at 4002H"
: "Initialize higher byte result with 00H"
: "Add carry in the high byte result"
: "HL Points 4003H"
: "Store the higher byte of result at 4003H"
18.
HLT
Subtract two 16-bit numbers
Statement: Subtract the 16-bit number in memory locations 4002H and 4003H from
the 16-bit number in memory locations 4000H and 4001H. The most significant
eight bits of the two numbers are in memory locations 4001H and 4003H. Store the
result in memory locations 4004H and 4005H with the most significant byte in
memory location 4005H.
1.
2.
Sample problem:
(4000H) = 19H
3.
(400IH) = 6AH
4.
(4004H) = I5H (4003H) = 5CH
5.
Result
6.
(4004H) = 04H
7.
(4005H) = OEH
8.
Source program:
9.
LHLD 4000H : "Get first 16-bit number in HL"
10.
XCHG
11.
LHLD 4002H : "Get second 16-bit number in HL"
12.
MOV A, E
13.
SUB L
14.
MOV L, A
: "Store the result in L register"
15.
MOV A, D
: "Get higher byte of the first number"
16.
SBB H
17.
MOV H, A
= 6A19H 5C15H = OE04H
: "Save first 16-bit number in DE"
: "Get lower byte of the first number"

: "Subtract lower byte of the second number"
: "Subtract higher byte of second number with borrow"

: "Store l6-bit result in memory locations 4004H and 4005H"
18.
SHLD 4004H : "Store l6-bit result in memory locations 4004H and 4005H"
19.
HLT
Finding ones complement of a number
Statement: Find the ls complement of the number stored at memory location

4400H and store the complemented number at memory location 4300H.
1.
2.
Sample problem:
(4400H) = 55H
3.
Result = (4300B) = AAB
4.
Source program:
5.
LDA 4400B : "Get the number"
6.
CMA
7.
STA 4300H : "Store the result"
8.
HLT
: "Complement number"
Finding Twos complement of a number
Statement: Find the 2s complement of the number stored at memory location

4200H and store the complemented number at memory location 4300H
1.
2.
Sample problem:
(4200H) = 55H
3.
Result = (4300H) = AAH + 1 = ABH
4.
Source program:
5.
LDA 4200H : "Get the number"
6.
CMA
7.
ADI, 01 H : "Add one in the number"
8.
9.
HLT
: "Complement the number"
Pack the unpacked BCD numbers
Statement: Pack the two unpacked BCD numbers stored in memory locations 4200H
and 4201H and store result in memory location 4300H. Assume the least significant
digit is stored at 4200H.
1.
2.
Sample problem:
(4200H) = 04
3.
(4201H) = 09
4.
Result = (4300H) = 94
5.
Source program:
6.
LDA 4201H : "Get the Most significant BCD digit"
7.
RLC
8.
RLC
9.
RLC
10.
RLC
11.
ANI FOH
: "Make least significant BCD digit zero"
12.
MOV C, A
: "store the partial result"
: "Adjust the position of the second digit (09 is changed to 90)"
13.
LDA 4200H : "Get the lower BCD digit"
14.
ADD C
15.
16.
HLT
: "Add lower BCD digit"
Unpack a BCD number
Statement: Two digit BCD number is stored in memory location 4200H. Unpack the
BCD number and store the two digits in memory locations 4300H and 4301H such
that memory location 4300H will have lower BCD digit.
1.
2.
Sample problem:
(4200H) = 58
3.
Result = (4300H) = 08 and
4.
(4301H) = 05
5.
Source program:
6.
LDA 4200H : "Get the packed BCD number"
7.
ANI FOH
8.
RRC
9.
RRC
10.
RRC
11.
RRC
12.
STA 4301H : "Store the partial result"
13.
LDA 4200H : "Get the original BCD number"
14.
ANI OFH
15.
: "Mask lower nibble"
: "Adjust higher BCD digit as a lower digit"
: "Mask higher nibble"
16.
HLT
Execution format of instructions
Statement: Read the program given below and state the contents of all registers
after the execution of each instruction in sequence.
1.
2.
Main program:
4000H
LXI SP, 27FFH
3.
4003H
LXI H, 2000H
4.
4006H
LXI B, 1020H
5.
4009H
CALL SUB
6.
400CH
HLT
7.
Subroutine program:
8.
4100H
SUB: PUSH B
9.
4101H
PUSH H
10.
4102H
LXI B, 4080H
11.
4105H
LXI H, 4090H
12.
4108H
SHLD 2200H
13.
4109H
DAD B
14.
410CH
POP H
15.
410DH
POP B
16.
410EH
RET
Right shift, bit of data( 8 bit and 16 bit)
Statement: Write a program to shift an eight bit data four bits right. Assume data is
in register C.
1.
2.
Sample problem:
(4200H) = 58
3.
Result = (4300H) = 08 and
4.
(4301H) = 05
5.
6.
Source program 1:
7.
MOV A, C
8.
RAR
9.
RAR
10.
RAR
11.
RAR
12.
MOV C, A
13.
HLT
Statement: Write a program to shift a 16 bit data, 1 bit right. Assume that data is in
BC register pair.
1.
2.
Source program 2
MOV A, B
3.
RAR
4.
MOV B, A
5.
MOV A, C
6.
RAR
7.
MOV C, A
8.
HLT
Left Shifting of a 16-bit data
Statement: Program to shift a 16-bit data 1 bit left. Assume data is in the HL register
1.
2.
HL = 1025 = 0001 0000 0010 0101
3.
HL = 0001 0000 0010 0101
4.
+ HL = 0001 0000 0010 0101
5.
----------------------------
6.
Result = 0010 0000 0100 1010
Alter the contents of flag register in 8085
Statement: Write a set of instructions to alter the contents of flag register in 8085.
1.
2.
PUSH PSW : "Save flags on stack"

POP H
: "Retrieve flags in L"
3.
MOV A, L : "Flags in accumulator"
4.
CMA
5.
MOV L, A : "Accumulator in L"
6.
PUSH H
7.
POP PSW : "Back to flag register"
8.
HLT
: "Complement accumulator"
: "Save on stack"
Programs For 8085 Microprocessor Level 2
Count number of ones in a number
Statement: Write a program to count number of ls in the contents of D register and

store the count in the B register.
Sample problem
(2200H) = 04
(2201H) = 34H
(2202H) = A9H
(2203H) = 78H
(2204H) = 56H
Result = (2202H) = A9H
1.
2.
3.
4.
5.
6.
7.
8.
9.
MVI B, 00H
MVI C, 08H
MOV A, D
BACK: RAR
JNC SKIP
INR B
SKIP: DCR C
JNZ BACK
HLT
Arrange in ascending order
Statement: Write a program to sort given 10 numbers from memory location 2200H
in the ascending order.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
MVI B, 09
:"Initialize counter"
START
:"LXI H, 2200H: Initialize memory pointer"
MVI C, 09H
:"Initialize counter 2"
BACK: MOV A, M :"Get the number"
INX H
:"Increment memory pointer"
CMP M
:"Compare number with next number"
JC SKIP
:"If less, dont interchange"
JZ SKIP
:"If equal, dont interchange"
MOV D, M
MOV M, A
DCX H
MOV M, D
INX H
:"Interchange two numbers"
SKIP:DCR C
:"Decrement counter 2"
JNZ BACK
:"If not zero, repeat"
DCR B
:"Decrement counter 1"
JNZ START
HLT
:"Terminate program execution"
Calculate the sum of series of even numbers
Statement: Calculate the sum of series of even numbers from the list of numbers.
The length of the list is in memory location 2200H and the series itself begins from
memory location 2201H. Assume the sum to be 8 bit number so you can ignore
carries and store the sum at memory location 2210H.
Sample problem
2200H= 4H
2201H= 20H
2202H= l5H
2203H= l3H
2204H= 22H
Result 22l0H= 20 + 22 = 42H
= 42H
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
LDA 2200H
MOV C, A
MVI B, 00H
:"sum = 0"
LXI H, 2201H :"Initialize pointer"
ANI 0lH
:"Mask Bit l to Bit7"
JNZ SKIP
:"Dont add if number is ODD"
MOV A, B
:"Get the sum"
ADD M
:"SUM = SUM + data"
MOV B, A
:"Store result in B register"
SKIP: INX H
:"increment pointer"
DCR C
:"Decrement counter"
JNZ BACK
:"if counter 0 repeat"
STA 2210H
:"store sum"
HLT
Calculate the sum of series of odd numbers
Statement: Calculate the sum of series of odd numbers from the list of numbers.
The length of the list is in memory location 2200H and the series itself begins from
memory location 2201H. Assume the sum to be 16-bit. Store the sum at memory
locations 2300H and 2301H.
Sample problem
2200H = 4H
2201H= 9AH
2202H= 52H
2203H= 89H
2204H= 3FH
Result = 89H + 3FH = C8H
2300H= H Lower byte
2301H = H Higher byte

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
Source program :
LDA 2200H
MOV C, A
LXI H, 2201H :"Initialize pointer"
MVI E, 00
:"Sum low = 0"
MOV D, E
:"Sum high = 0"
ANI 0lH
:"Mask Bit 1 to Bit7"
JZ SKIP
:"Dont add if number is even"
MOV A, E
:"Get the lower byte of sum"
ADD M
:"Sum = sum + data"
MOV E, A
:"Store result in E register"
JNC SKIP
INR D
:"Add carry to MSB of SUM"
SKIP: INX H
:"Increment pointer"
Find the square of given number
Statement: Find the square of the given numbers from memory location 6100H and
store the result from memory location 7000H.
Sample problem
2200H = 4H
2201H= 9AH
2202H= 52H
2203H= 89H
2204H= 3FH
Result = 89H + 3FH = C8H
2300H= H Lower byte
2301H = H Higher byte
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
LXI H, 6200H :"Initialize lookup table pointer"

LXI D, 6100H :"Initialize source memory pointer"
LXI B, 7000H :"Initialize destination memory pointer"
BACK: LDAX D :"Get the number"
MOV L, A
:"A point to the square"
MOV A, M
:"Get the square"
STAX B
:"Store the result at destination memory location"
INX D
:"Increment source memory pointer"
INX B
:"Increment destination memory pointer"
MOV A, C
CPI 05H
:"Check for last number"
JNZ BACK
:"If not repeat"
HLT
Search a byte in a given number
Statement: Search the given byte in the list of 50 numbers stored in the consecutive
memory locations and store the address of memory location in the memory
locations 2200H and 2201H. Assume byte is in the C register and starting address of
the list is 2000H. If byte is not found store 00 at 2200H and 2201H.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
LX I H, 2000H
:"Initialize memory pointer 52H"
MVI B, 52H
CMP C
:"Compare with the given byte"
JZ LAST
:"Go last if match occurs"
INX H
:"Increment memory pointer"
DCR B
JNZ B
LXI H, 0000H
SHLD 2200H
JMP END
:"Store 00 at 2200H and 2201H"
LAST: SHLD 2200H :"Store memory address"
END: HLT
:"Stop"
Add two decimal numbers of 6 digit each
Statement: Two decimal numbers six digits each, are stored in BCD package form.
Each number occupies a sequence of byte in the memory. The starting address of
first number is 6000H Write an assembly language program that adds these two
numbers and stores the sum in the same format starting from memory location
6200H.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
LXI H, 6000H :"Initialize pointer l to first number"

LXI D, 6l00H :"Initialize pointer2 to second number"
LXI B, 6200H :"Initialize pointer3 to result"
STC
CMC
:"Carry = 0"
BACK: LDAX D :"Get the digit"
ADD M
:"Add two digits"
DAA
:"Adjust for decimal"
STAX.B
:"Store the result"
INX H
:"Increment pointer 1"
INX D
:"Increment pointer2"
INX B
:"Increment result pointer"
MOV A, L
CPI 06H
:"Check for last digit"
JNZ BACK
:"If not last digit repeat"
HLT
Separate even numbers from given numbers
Statement: Write an assembly language program to separate even numbers from

the given list of 50 numbers and store them in the another list starting from 2300H.
Assume starting address of 50 number list is 2200H.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
LXI H, 2200H
:"Initialize memory pointer l"
LXI D, 2300H
:"Initialize memory pointer2"
MVI C, 32H
BACK:MOV A, M :"Get the number"
ANI 0lH
:"Check for even number"
JNZ SKIP
:"If ODD, dont store"
MOV A, M
:"Get the number"
STAX D
:"Store the number in result list"
INX D
:"Increment pointer 2"
SKIP: INX H
:"Increment pointer l"
DCR C
JNZ BACK
HLT
:"Stop
Transfer contents to overlapping memory blocks
Statement: Write assembly language program with proper comments for the
following:
A block of data consisting of 256 bytes is stored in memory starting at 3000H. This
block is to be shifted (relocated) in memory from 3050H onwards. Do not shift the
block or part of the block anywhere else in the memory.
Two blocks (3000 30FF and 3050 314F) are overlapping. Therefore it is necessary
to transfer last byte first and first byte last.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
MVI C, FFH
LX I H, 30FFH :"Initialize source memory pointer 3l4FH"
LXI D, 314FH :"Initialize destination memory pointer"
BACK: MOV A, M :"Get byte from source memory block"
STAX D
:"Store byte in the destination memory block"
DCX H
:"Decrement source memory pointer"
DCX
:"Decrement destination memory pointer"
DCR C
JNZ BACK
:"If counter 0 repeat"
HLT
:"Stop execution"

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Architechture of 8085:

synchronizes all the data transfers.

Pin Diagram and Pin description of 8085

Power supply and clock signals

1. Power supply and Clock frequency signals:

2. Address Bus:A8 - A15: (output; 3-state)

4. Control and Status signals:

It is an output signal used to give information of AD0-AD7 contents.

It is a positive going pulse generated when a new operation is started by uP.

When it is low it indicates that the contents are data.

RD (output 3-state, active low)

WR (output 3-state, active low)

5. Status Signals:S1: S2:

6. Interrupts and Externally initiated operations:

This signal is used to reset the microprocessor.

Addressing Modes in 8085:

Register Addressing Mode

Direct Addressing Mode

Indirect Addressing Mode

Implied Addressing Mode

Bus Structure in 8085

vectored address of particular interrupt is stored in program counter. The processor

Vector address table for the software interrupts:

other way to mask it.

Instruction Set 8085

Disable interrupts The interrupt enable flip-flop is reset and

Enable interrupts The interrupt enable flip-flop is set and all

Read interrupt mas This is a multipurpose instruction used to

Set interrupt mask This is a multipurpose instruction and

The contents of the operand (register or

The contents of the accumulator are

the result of the operation. CY is reset.

The contents of the accumulator are

The contents of the accumulator are

placed in the position of D0 as well as in

Each binary bit of the accumulator is

Each binary bit of the accumulator is

The contents of the accumulator are

The Carry flag is complemented. No

The RST instruction is equivalent to

Add register or The contents of the operand (register or

Add register to The contents of the operand (register or

Add immediate The 8-bit data (operand) is added to the

Reg. pair, Load register

Reg. pair Add register

The contents of the operand (register or

location, its location is specified by the

The contents of the operand (register or

The contents of the designated register or

The contents of the designated register or

Decimal adjust The contents of the accumulator are changed

Data Transfer Instructions

Copy from source(Rs) This instruction copies the contents

The contents of a memory location,

B/D Reg. Load accumulator

The contents of the designated

Load register pair

The instruction loads 16-bit data in

The instruction copies the contents