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    L4: Interfacing Devices

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    Mohammad Samheel
    This document discusses encoders, priority encoders, and latches. It explains that encoders provide an output code for their inputs and that priority encoders are needed when multiple inputs are active at once to prioritize the inputs. It provides an example of the 74LS148 8-to-3 priority encoder and describes how priority encoders are commonly used with keyboards. It also describes latches as types of flip-flops that are used to interface with output devices by holding address/data for a longer time period and separating address and data on multiplexed buses.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    L4: Interfacing Devices

    Uploaded by

    Mohammad Samheel
    19 views4 pages
    This document discusses encoders, priority encoders, and latches. It explains that encoders provide an output code for their inputs and that priority encoders are needed when multiple inputs are active at once to prioritize the inputs. It provides an example of the 74LS148 8-to-3 priority encoder and describes how priority encoders are commonly used with keyboards. It also describes latches as types of flip-flops that are used to interface with output devices by holding address/data for a longer time period and separating address and data on multiplexed buses.

    Original Description:

    Microprocessor

    Original Title

    L4_MP

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    This document discusses encoders, priority encoders, and latches. It explains that encoders provide an output code for their inputs and that priority encoders are needed when multiple inputs are active at once to prioritize the inputs. It provides an example of the 74LS148 8-to-3 priority encoder and describes how priority encoders are commonly used with keyboards. It also describes latches as types of flip-flops that are used to interface with output devices by holding address/data for a longer time period and separating address and data on multiplexed buses.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    19 views4 pages

    L4: Interfacing Devices

    Uploaded by

    Mohammad Samheel
    This document discusses encoders, priority encoders, and latches. It explains that encoders provide an output code for their inputs and that priority encoders are needed when multiple inputs are active at once to prioritize the inputs. It provides an example of the 74LS148 8-to-3 priority encoder and describes how priority encoders are commonly used with keyboards. It also describes latches as types of flip-flops that are used to interface with output devices by holding address/data for a longer time period and separating address and data on multiplexed buses.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 4

    L4: Interfacing Devices

    Encoder
    *
    *

    Logic circuit that provides the appropriate code (o/p) Binary, BCD etc.
    Reverse process of decoding.

    What if more than one inputs active at a time?


    *
    *
    *

    If two or more inputs are activated simultaneously encoder will not provide appropriate
    output.
    Prioritizing the inputs can solve the problem.
    Example for priority encoder: 74LS148, an 8-to-3 priority encoder.

    Priority Encoder - 74LS148

    Microprocessors (BME 307)

    Page 1

    Function Table

    Applications
    *
    *

    Commonly used with keyboards.


    For each key pressed, the corresponding binary code is placed on the data bus.

    Latch
    *
    *

    A D flip-flop
    Two types - A transparent latch
    - A positive-edge-triggered latch

    Microprocessors (BME 307)

    Page 2

    Output Waveforms

    Latch 74LS373, an 8-bit transparent latch

    Microprocessors (BME 307)

    Page 3

    Function Table

    Applications
    *
    *

    Used to interface output devices to hold address / data for longer time acts as a storage.
    To separate (de-multiplex) address and data information on the multiplexed ( time shared)
    bus.

    Microprocessors (BME 307)

    Page 4

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