TL 7705 A

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028I APRIL 1983 REVISED JULY 2009
D Power-On Reset Generator

D Automatic Reset Generation After Voltage
D
D
D
D
D
Drop
Wide Supply-Voltage Range
Precision Voltage Sensor
Temperature-Compensated Voltage
Reference
True and Complement Reset Outputs
Externally Adjustable Pulse Duration
TL7702A, TL7709A, TL7712A, TL7715A . . . D OR P PACKAGE

TL7705A . . . D, P, OR PS PACKAGE,
(TOP VIEW)
REF
RESIN
CT
GND
VCC
SENSE
RESET
RESET
description/ordering information
ORDERING INFORMATION{
PACKAGE}
TA
PDIP (P)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Tube of 50
TL7702ACP
Tube of 75
TL7702ACD
Reel of 2500
TL7702ACDR
Tube of 50
TL7705ACP
Tube of 75
TL7705ACD
Reel of 2500
TL7705ACDR
SOP (PS)
Reel of 2000
TL7705ACPSR
T7705A
PDIP (P)
Tube of 50
TL7709ACP
TL7709ACP
Tube of 75
TL7709ACD
Reel of 2500
TL7709ACDR
Tube of 50
TL7712ACP
Tube of 75
TL7712ACD
Reel of 2500
TL7712ACDR
PDIP (P)
Tube of 50
TL7715ACP
TL7715ACP
SOIC (D)
Tube of 75
TL7715ACD
7715AC
PDIP (P)
Tube of 50
TL7702AIP
TL7702AIP
Tube of 75
TL7702AID
Reel of 2500
TL7702AIDR
Tube of 50
TL7705AIP
Tube of 75
TL7705AID
Reel of 2500
TL7705AIDR
Reel of 2500
TL7712AIDR
SOIC (D)
PDIP (P)
SOIC (D)
0C to 70C
0 C 70 C
SOIC (D)
PDIP (P)
SOIC (D)
SOIC (D)
40C to 85C
40 C 85 C
PDIP (P)
SOIC (D)
SOIC (D)
TL7702ACP
7702AC
TL7705ACP
7705AC
7709AC
TL7709ACP
7712AC
7702AI
TL7705AIP
7705AI
7712AI
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2009, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265

description/ordering information (continued)

The TL77xxA family of integrated-circuit supply-voltage supervisors is designed specifically for use as reset
controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply
for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low)
when VCC attains a value approaching 3.6 V. At this point (assuming that SENSE is above VIT+), the delay timer
function activates a time delay, after which outputs RESET and RESET go inactive (high and low, respectively).
When an undervoltage condition occurs during normal operation, RESET and RESET go active. To ensure that
a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input
exceeds the positive-going threshold value. The time delay is determined by the value of the external capacitor
CT : td = 1.3 104 CT, where CT is in farads (F) and td is in seconds (s).
During power down and when SENSE is below VIT, the outputs remain active until VCC falls below 2 V. After
this, the outputs are undefined.
An external capacitor (typically 0.1 F) must be connected to REF to reduce the influence of fast transients in
the supply voltage.
functional block diagram

The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.
VCC
Reference
Voltage
CT
SENSE
100 A
6
3
7
RESET
RESET
R1
(see Note A)
R2
(see Note A)
2
RESIN
1
GND
NOTES: A. TL7702A: R1 = 0 , R2 = open

TL7705A: R1 = 7.8 k, R2 = 10 k
TL7709A: R1 = 19.7 k, R2 = 10 k
TL7712A: R1 = 32.7 k, R2 = 10 k
TL7715A: R1 = 43.4 k, R2 = 10 k
B. Resistor values shown are nominal.
DALLAS, TEXAS 75265
REF

timing diagram
VCC and SENSE
Threshold Voltage
VCC 3.6 V
VCC 2 V
RESET
td
Output
Undefined
td
Output
Undefined
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
Input voltage range, VI, RESIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 20 V
Input voltage range, VI, SENSE: TL7702A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 6 V
TL7705A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 20 V
TL7709A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 20 V
TL7712A, TL7715A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 20 V
High-level output current, IOH, RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Low-level output current, IOL, RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Package thermal impedance, JA (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC 1 V or 6 V, whichever
is less.
3. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) TA)/JA. Operating at the absolute maximum TJ of 150C can affect reliability.
4. The package thermal impedance is calculated in accordance with JESD 51-7.
DALLAS, TEXAS 75265

recommended operating conditions

MIN
Supply voltage
VIH
18
High-level input voltage at RESIN
VIL
MAX
3.5
VCC
Low-level input voltage at RESIN
V
0.6
TL7702A
0
0
10
TL7709A
15
TL7712A
20
TL7715A
Input voltage, SENSE

p
g
See Note 2
TL7705A
VI
UNIT
20
IOH
High-level output current, RESET
16
mA
IOL
Low-level output current, RESET
16
mA
TA
Operating free air temperature range

free-air
TL77xxAC
70
40
TL77xxAI
85
NOTE 2: For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC 1 V or 6 V, whichever is less.
electrical characteristics over recommended operating conditions (unless otherwise noted)

TL77xxAC
TL77xxAI
TEST CONDITIONS
PARAMETER
MIN
VOH
High-level output voltage, RESET
IOH = 16 mA
VOL
Low-level output voltage, RESET
IOL = 16 mA
Vref
Reference voltage
TA = 25C
TYP
UNIT
MAX
VCC1.5
V
0.4
2.48
2.53
2.58
2.48
2.53
2.58
4.5
4.55
4.6
7.5
7.6
7.7
TL7712A
10.6
10.8
11
TL7715A
13.2
13.5
13.8
TL7702A
TL7705A
VIT
Negative-going i
N
ti
i input th h ld voltage,
t threshold lt
SENSE
TL7709A
TA = 25 C
25C
TL7702A
Vhys
10
TL7705A
15
TL7709A
Hysteresis, SENSE (VIT+ VIT)
TA = 25 C
25C
TL7712A
II
Vref < VI < VCC 1.5 V
IOH
All inputs and outputs open
0.5
All electrical characteristics are measured with 0.1-F capacitors connected at REF, CT, and VCC to GND.
DALLAS, TEXAS 75265
2
50
1.8
50
VO = 0
Supply current
100
VO = 18 V
Low-level output current, RESET
ICC
High-level output current, RESET
IOL
20
VI = 0.4 V
TL7702A
mV
45
VI = 2.4 V to VCC
RESIN
SENSE
20
35
TL7715A
Input current
mA

switching characteristics over recommended operating conditions (unless otherwise noted)

TL77xxAC
TL77xxAI
TEST CONDITIONS
PARAMETER
UNIT
MIN
MAX
0.65
CT = 0.1 F
Output pulse duration
TYP
1.2
2.6
msec
0.4
tw(S)
Pulse duration
at SENSE input to switch outputs
VIH = VIT + 200 mV,
tpd
Propagation delay time, RESIN to RESET

Rise time
tf
Fall time
VCC = 5 V
tr
Input pulse duration at RESIN

VIL = VIT 200 mV
1
0.2
RESET
VCC = 5 V,
V
VCC = 5 V,
V
RESET
See Note 5
See Note 5
3.5
3.5
RESET
RESET
0.2
s
s
s
s
s
All switching characteristics are measured with 0.1-F capacitors connected at REF and VCC to GND.
NOTE 5: The rise and fall times are measured with a 4.7-k load resistor at RESET and RESET.
PARAMETER MEASUREMENT INFORMATION

Voltage
Drop
tw(S)
SENSE
VIT+
VIT
VIT+
0V
VIH
RESIN
Undefined
2V
0.7 V
tf
tr
VIL
tpd
90%
90%
90%
RESET
VOH(RESET)
50%
10%
td
td
tf
90%
RESET
50%
10%
10%
10%
td
10%
VOL(RESET)
tr
Figure 1. Voltage Waveforms
DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS
DEASSERTION TIME
vs
LOAD RESISTANCE
ASSERTION TIME
vs
LOAD RESISTANCE
7
42
VCC = 5 V
CT = 0.1 F
CL = 10 pF
TA = 25C
6
t Deassertion Time s
t Assertion Time ns
38
34
30
VCC = 5 V
CT = 0.1 F
CL = 10 pF
TA = 25C
RESET tr
26
5
4
RESET tf
3
2
RESET tr
22
RESET tf
1
0
18
0
8
4
6
RL Load Resistance k
10
4
6
8
RL Load Resistance k
Figure 2
Figure 3
DEASSERTION TIME
vs
LOAD CAPACITANCE
ASSERTION TIME
vs
LOAD CAPACITANCE
3.6
44
VCC = 5 V
CT = 0.1 F
RL = 4.7 k
TA = 25C
36
RESET tr
32
28
RESET tf
24
VCC = 5 V
CT = 0.1 F
RL = 4.7 k
TA = 25C
3.2
t Deassertion Time s
t Assertion Time ns
40
2.8
RESET tf
2.4
2
RESET tr
1.6
1.2
0.8
20
0
25
50
75
100 125 150
CL Load Capacitance pF
175
200
25
50
75
100
125
150
175
200
CL Load Capacitance pF
Figure 4
10
Figure 5
For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.
DALLAS, TEXAS 75265

APPLICATION INFORMATION
5V
12 V
8
TL7712A
3
CT
RESIN
RESET
System Reset
TL7705A
3
6
RESET
1
REF
CT
10 k
GND
10 k
VCC
SENSE
10 k
REF
CT
RESET
22 k
VCC
7
SENSE
2
5
RESET
RESIN
GND
0.1 F
10 k
CT
0.1 F
GND
8
7
2
C T(F) +
VCC
SENSE
RESET
RESIN
t d(s)
1.3
10 4
TL7712A
6
RESET
3
1
REF
CT
10 k
GND
4
CT
0.1 F
12 V
Figure 6. Multiple Power-Supply System Reset Generation
5V
8
VCC
7
SENSE
2
RESIN
RESET
C T(F) +
t d(s)
1.3
10 k
5
VCC
RESET
TMS7000
TL7705A
6
RESET
3
1
CT
REF
10 4
CT
GND
4
10 k
VSS
0.1 F
GND
Figure 7. Reset Controller for TMS7000 System
DALLAS, TEXAS 75265

APPLICATION INFORMATION
5V
A7805
INPUT
4.7 k
OUTPUT
VCC
7 SENSE
Input
System RESET
5
RESET
TL7705A
6
RESET
1
3
CT
REF
COMMON
CI
CO
25 k
GND
4
4.7 k
CT
Q1
2N3994
D
0.1 F
Figure 8. Eliminating Undefined States Using a P-Channel JFET
VCC
10 k
750
Q1
2N4036
8
SENSE Input
2.7 k
VCC
7
5
RESET
SENSE
System RESET
TL77xxA
2
3
RESET
RESIN
CT
REF
6
1
10 k
1 k
GND
CT
0.1 F
Figure 9. Eliminating Undefined States Using a pnp Transistor
DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package

Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
TL7702ACD
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7702AC
TL7702ACDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7702AC
TL7702ACDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7702AC
TL7702ACDRE4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7702AC
TL7702ACDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7702AC
TL7702ACP
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7702ACP
TL7702AID
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7702AI
TL7702AIDE4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7702AI
TL7702AIDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7702AI
TL7702AIDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7702AI
TL7702AIDRE4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7702AI
TL7702AIDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7702AI
TL7702AIP
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
TL7702AIP
TL7702AIPE4
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
TL7702AIP
TL7702AMFKB
OBSOLETE
LCCC
FK
20
TBD
Call TI
Call TI
-55 to 125
TL7702AMJG
OBSOLETE
CDIP
JG
TBD
Call TI
Call TI
-55 to 125
TL7702AMJGB
OBSOLETE
CDIP
JG
TBD
Call TI
Call TI
-55 to 125
TL7705ACD
ACTIVE
SOIC
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75
Addendum-Page 1
7705AC
Samples
www.ti.com
10-Jun-2014
Orderable Device
Status
(1)

Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
TL7705ACDE4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7705AC
TL7705ACDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7705AC
TL7705ACDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7705AC
TL7705ACDRE4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7705AC
TL7705ACDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7705AC
TL7705ACP
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7705ACP
TL7705ACPE4
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7705ACP
TL7705ACPSLE
OBSOLETE
SO
PS
TBD
Call TI
Call TI
0 to 70
TL7705ACPSR
ACTIVE
SO
PS
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
T7705A
TL7705AID
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7705AI
TL7705AIDE4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7705AI
TL7705AIDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7705AI
TL7705AIDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7705AI
TL7705AIDRE4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7705AI
TL7705AIDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
7705AI
TL7705AIP
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
TL7705AIP
TL7705AIPE4
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
TL7705AIP
TL7709ACD
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
Addendum-Page 2
7709AC
Samples
www.ti.com
10-Jun-2014
Orderable Device
Status
(1)

Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
TL7709ACDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7709AC
TL7709ACDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7709AC
TL7709ACP
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7709ACP
TL7709ACPE4
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7709ACP
TL7709AID
OBSOLETE
SOIC
TBD
Call TI
Call TI
-40 to 85
TL7709AIP
OBSOLETE
PDIP
TBD
Call TI
Call TI
-40 to 85
TL7712ACD
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7712AC
TL7712ACDE4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7712AC
TL7712ACDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7712AC
TL7712ACDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7712AC
TL7712ACDRE4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7712AC
TL7712ACDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7712AC
TL7712ACP
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7712ACP
TL7712ACPE4
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7712ACP
TBD
Call TI
Call TI
-40 to 85
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TBD
Call TI
Call TI
-40 to 85
TL7712AID
OBSOLETE
SOIC
TL7712AIDR
ACTIVE
SOIC
TL7712AIP
OBSOLETE
PDIP
TL7715ACD
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7715AC
TL7715ACDE4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7715AC
TL7715ACDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
7715AC
Addendum-Page 3
7712AI
Samples
www.ti.com
10-Jun-2014
Orderable Device
Status
(1)

Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
TL7715ACP
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7715ACP
TL7715ACPE4
ACTIVE
PDIP
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
TL7715ACP
TL7715AID
OBSOLETE
SOIC
TBD
Call TI
Call TI
-40 to 85
TL7715AIP
OBSOLETE
PDIP
TBD
Call TI
Call TI
-40 to 85
(1)
The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 4
Samples
www.ti.com
10-Jun-2014
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 5
PACKAGE MATERIALS INFORMATION

www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins

Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TL7702ACDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL7702ACDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL7702AIDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL7705ACDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL7705ACPSR
SO
PS
2000
330.0
16.4
8.2
6.6
2.5
12.0
16.0
Q1
TL7705AIDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL7709ACDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL7712ACDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL7712AIDR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TL7702ACDR
SOIC
2500
340.5
338.1
20.6
TL7702ACDR
SOIC
2500
367.0
367.0
35.0
TL7702AIDR
SOIC
2500
340.5
338.1
20.6
TL7705ACDR
SOIC
2500
340.5
338.1
20.6
TL7705ACPSR
SO
PS
2000
367.0
367.0
38.0
TL7705AIDR
SOIC
2500
340.5
338.1
20.6
TL7709ACDR
SOIC
2500
340.5
338.1
20.6
TL7712ACDR
SOIC
2500
340.5
338.1
20.6
TL7712AIDR
SOIC
2500
340.5
338.1
20.6
Pack Materials-Page 2
MECHANICAL DATA
MCER001A JANUARY 1995 REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
0.280 (7,11)
0.245 (6,22)
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX

Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
015
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).

This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as components) are sold subject to TIs terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TIs terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
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Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TIs goal is to
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requirements. Nonetheless, such components are subject to these terms.
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non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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Copyright 2014, Texas Instruments Incorporated

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TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

D Power-On Reset Generator

TL7702A, TL7709A, TL7712A, TL7715A . . . D OR P PACKAGE

PRODUCTION DATA information is current as of publication date.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

description/ordering information (continued)

functional block diagram

NOTES: A. TL7702A: R1 = 0 , R2 = open

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

recommended operating conditions

High-level input voltage at RESIN

Low-level input voltage at RESIN

Input voltage, SENSE

High-level output current, RESET

Low-level output current, RESET

Operating free air temperature range

electrical characteristics over recommended operating conditions (unless otherwise noted)

High-level output voltage, RESET

Low-level output voltage, RESET

Hysteresis, SENSE (VIT+ VIT)

Vref < VI < VCC 1.5 V

All inputs and outputs open

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

Low-level output current, RESET

High-level output current, RESET

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

switching characteristics over recommended operating conditions (unless otherwise noted)

Output pulse duration

VIH = VIT + 200 mV,

Propagation delay time, RESIN to RESET

Input pulse duration at RESIN

PARAMETER MEASUREMENT INFORMATION

Figure 1. Voltage Waveforms

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

Figure 6. Multiple Power-Supply System Reset Generation

Figure 7. Reset Controller for TMS7000 System

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

Figure 8. Eliminating Undefined States Using a P-Channel JFET

Figure 9. Eliminating Undefined States Using a pnp Transistor

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

Package Type Package Pins Package

MSL Peak Temp