Small-signal z-domain analysis of digitally controlled converters

2004 35th Annual IEEE Power Electronics Specialists Conference Aachen, Germany, 2004 Small-Signal z-Domain Analysis of Digitally Controlled Converters David M. Van de Sype∗ , Koen DePSfrag Gussemé, Alex P. Van den Bossche, and Jan A. Melkebeek replacements Electrical Energy Laboratory Department of Electrical Energy, Systems and Automation, Ghent University St-Pietersnieuwstraat 41, B-9000 Gent, Belgium ∗ Email: [email protected] Abstract— As the performance of digital signal processors has increased rapidly during the last decade, there is a growing interest to replace the analog controllers in low power switching converters by more complicated and flexible digital control algorithms. Compared to high power converters, the control loop bandwidths for converters in the lower power range are generally much higher. Because of this, the dynamic properties of the uniformly-sampled pulse-width modulators used in low power applications become an important restriction to the maximum achievable bandwidth of control loops. Though frequency- and Laplace-domain models for uniformly-sampled pulse-width modulators are very valuable as they improve the general perception of the dynamic behavior of these modulators, the direct discrete design of the digital compensator requires a zdomain model for the combination modulator and converter. For this purpose a new exact small-signal z-domain model is derived. In accordance with the zero-order-hold equivalent commonly used for ‘regular’ digital control systems, this z-domain model gives rise to the development of a uniformly-sampled pulse-widthmodulator equivalent of the converter. This z-domain model is characterized by its capability to quantify the different dynamics of the converter for different modulators, its ease of use and its ability to predict the values of the control variables at the true sampling instants of the real system. I. I NTRODUCTION For reasons of price, control circuits for low power switching power supplies (< 3 kW) are almost always implemented using analog circuits. As the price/performance ratio of digital signal processors has decreased rapidly during the last decade, the interest for digital control of switching power supplies in the low power range has grown [1], [2]. When applying digital control to a switching power supply, the different switches in the supply are often controlled by a digital or uniformlysampled pulse-width modulator. Consequently, the dynamics of a digitally controlled switching power supply are influenced by two nonlinear effects: quantization effects and modulation effects. As the effects of quantization in digital control of switching power supplies have been addressed before [3], [4], this study focuses on modulation effects. Frequencyand Laplace-domain models of the modulators [5] provide insight in the fundamental dynamic behavior of uniformlysampled pulse-width modulators. However, the design of the compensator must be performed in the Laplace-domain. This Laplace transfer function is afterwards translated into a discrete equivalent by approximation methods such as the trapezoidal-rule, pole-zero mapping, etc. To avoid this indirect design method for the discrete compensator, a z-domain model for the combination converter-modulator is required. Discretetime models have already been reported [6] but their use in control is limited because of the presence of matrix exponentials and other highly nonlinear vector functions. Though 0-7803-8399-0/04/$20.00 ©2004 IEEE. u us Ts Fig. 1. ZOH uH y vc A general uniformly-sampled pulse-width modulator approximations of this bilinear discrete-time model such as [7] provide a good solution to this problem, the usability of these models is further restrained because they are only derived for an end-of-on-time modulator and because they describe the behavior of the control variable values at the beginning of the switching cycle instead of at the sampling instants of the real digital control system. After all, the sampling instants in a real digital control system can be positioned anywhere in the switching cycle. To overcome these problems a new exact small-signal zdomain model is derived based on the Laplace-domain analysis presented in [5]. In accordance with the zero-order-hold equivalent commonly used for ‘regular’ digital control systems, this z-domain model gives rise to the development of a uniformlysampled pulse-width-modulator equivalent of the converter. This z-domain model is characterized by its capability to quantify the different dynamics of the converter for different modulators, its ease of use as this approach uses only the modified z-transform rather than complex functions, and its ability to predict the values of the control variables at the true sampling instants of the real system. The method is validated and demonstrated on a digitally controlled buck converter by comparing the samples predicted by the model with the simulated waveforms retrieved from a Simulink model. II. U NIFORMLY-S AMPLED P ULSE -W IDTH M ODULATORS The pulse-width modulators embedded in modern digital signal processors (e.g. TMS320C2XX of Texas Instruments, ADSP2199X of Analog Devices, DSP568XX of Motorola, etc.) operate all in a similar fashion. If we disregard quantization effects, a model for the uniformly-sampled pulsewidth modulator is shown in Fig. 1. The input u(t), a continuous function of time, is sampled with a frequency ωs synchronously to the pulse-width modulation (Fig. 1). For the derivation of the z-domain model only modulators with a switching frequency equal to the sampling frequency ωs (single-update-mode) are considered. The sampled input us (t) is sent to a zero-order-hold circuit (ZOH). Finally, the PWM waveform is generated by comparing the output of the ZOH uH (t) to the value of the carrier waveform vc (t), a triangular waveform. Depending on the shape of the carrier waveform 4299 2004 35th Annual IEEE Power Electronics Specialists Conference PSfrag replacements Aachen, Germany, 2004 PSfrag replacements u ↓ u ↓ ← us ← vc uH  y on t t off U ←y off U t PSfrag replacements (a) (a) u ↓ ← us ← vc uH  y on t t off U ← us ← vc uH ↓ on ←y t t ←y off U t t t on t u ↓ ← vc uH ↓ ←y PSfrag replacements ← us t (b) (b) Fig. 2. The single-update-mode sawtooth-carrier modulators. (a): end-of-ontime, (b): begin-of-on-time Fig. 3. The single-update-mode triangular-carrier modulators. (a): symmetricon-time, (b): symmetric-off-time vc (t) different types of uniformly-sampled pulse-width modulators can be obtained. In commercial digital controllers two possibilities are commonly offered: the carrier waveform is either a sawtooth-carrier Fig. 2 or an isosceles-triangular-carrier Fig. 3. When the carrier vc is a sawtooth carrier the commonly available types are the end-of-on-time modulator Fig. 2(a) and the begin-of-on-time modulator Fig. 2(b). For modulators with an isosceles-triangular-carrier waveform, two modulators can be identified: the symmetric-on-time modulator Fig. 3(a) and the symmetric-off-time modulator Fig. 3(b). transfer function for the modulator G∗PWM (s) is in accordance with the model commonly employed for a regular control system with zero-order-hold (G∗ZOH (s) = (1 − e−sTs )/s). If a hypothetical sampler with sampling period ωs is introduced on the output of the converter q(t), the sampled output q ∗ (t) is obtained. By using the z-transform, the sampled output q ∗ (t) can be expressed as a function of the commanded output ∗ qw (t):  G(z)Z e−s(τd +τp ) G∗PWM (s)P (s) Q(z)  = , Qw (z) 1 + G(z)Z e−s(τd +τp +τm ) G∗PWM (s)P (s)H(s) (1) ∗ with Q(z) and Qw (z) the z-transforms of q ∗ (t) and qw (t), respectively. Equation (1) clearly shows that the problem of calculating the sampled output of a converter with a digital control loop can be reduced to the problem of finding the z-transform of  Gtot (z) = Z e−sT∆ G∗PWM (s)R(s) (2) III. Z -D OMAIN A NALYSIS If we assume that the response of the output of the converter q(t) to a change in the output of the uniformly-sampled pulsewidth modulator can be described by the Laplace transfer function P (s)e−sτp , the schematic of the control loop can be represented as in Fig. 4. The controlled output of the converter q(t) is converted by a measurement with transfer function H(s)e−sτm into the measured output qm (t). The latter is sampled by the analog-to-digital converter of the microcontroller; ∗ the output of the sampler is qm (t). Comparing this measured ∗ value to its desired value qw (t) yields the sampled error e∗ (t). The digital compensator with pulse-transfer function G(z) derives the control output c∗ (t) from this error. To account for the duration of the control calculations (calculations for the output of G(z)) in the processor, a calculation delay τd is introduced. The delayed control signal u∗ (t) is the sampled input of the modulator. The latter transforms the sampled input u∗ (t) into the switching function y(t), a continuous function of time. If the pulse-width modulator can be modelled by a pulseto-continuous transfer function G∗PWM (s) describing in the Laplace domain the change of the modulator output y(t) as a function of the sampled input u∗ (t), the model of Fig. 4 can be simplified to that of Fig. 5. Note that this pulse-to-continuous or the calculation of the z-transform of the characteristic system as depicted in Fig. 6. Before the z-transform for the characteristic system can be calculated, the pulse-tocontinuous transfer function of a uniformly-sampled pulsewidth modulator must be derived. The derivation of the pulse-to-continuous transfer function G∗PWM (s) of the digital pulse-width modulator is based upon the small-signal Laplace-domain analysis presented in [5]. This Laplace-domain analysis uses the waveforms of the general single-update-mode modulator (Fig. 7). This modulator has a triangular waveshape as carrier waveform vc (t) determined by the period Tc and the ratio α. The ratio α is the duration of the falling edge of the triangle relative to the period Tc = Ts (Fig. 7). Choosing α equal to 0, 1/2 and 1 allows to obtain the waveforms for the end-of-on-time 4300 2004 35th Annual IEEE Power Electronics Specialists Conference ∗ qw (t) Σ e∗(t) G(z) c∗(t) e−sτd u∗(t) Aachen, Germany, 2004 ZOH uH(t) y(t) vc (t) P (s)e−sτp q(t) PSfrag replacements pulse-width modulator ∗ qm (t) qm(t) H(s)e−sτm Ts Fig. 4. A model for the control loop of a digitally controlled converter with the pulse-width modulator modelled by a pulse-to-continuous transfer function NOH uH(t) vc (t) q ∗(t) Ts ∗ qw (t) Σ e∗(t) Sfrag replacements G(z) c∗(t) e−sτd qm(t) ∗ qm (t) G∗PWM(s) y(t) P (s)e−sτp q(t) H(s)e−sτm Ts Fig. 5. replacements u∗(t) A model for the control loop of a digitally controlled converter with the pulse-width modulator modelled by a pulse-to-continuous transfer function w∗(t) e−sT∆ G∗PWM(s) x∗(t) x(t) R(s) state u b(t), or Ts Fig. 6. The characteristic system consisting of a linear system, a transportation delay and the uniformly sampled pulse-width modulator u   y U T1 t ← vc uH  y 0 t with T0 , T1 and α defined in Fig. 7. In accordance with the analysis used for a zero-order-hold in a ‘regular’ digital control system [8], a pulse-to-continuous Laplace transfer function can be derived from the equation above   Yb (s) = Ts αe−sT0 + (1 − α)e−s(Ts −T1 ) . G∗PWM (s) = b ∗ (s) U (6) If (6) is substituted in (2), the z-domain model for the characteristic system can be calculated. 1 ←Y ← y 0 t 1 αTs 0 Ts = Tc nTs ← yb (n+1)Ts t −1 Fig. 7. (4) By using the Laplace-domain analysis of [5], the small-signal output yb(t) of the modulator can be expressed as a function of the sampled version u b∗ (t) of the small-signal input u b(t) of the modulator (see [5])   b ∗ (s), Yb (s) = Ts αe−sT0 + (1 − α)e−s(Ts −T1 ) U (5) ← us T0 DTc (3) The resulting output of the modulator y(t) can also be separated into a steady-state portion Y (t) (the response to U ) and a small excursion to the steady-state yb(t), or y(t) = Y (t) + yb(t). 1 U u(t) = U + u b(t). The key waveforms for a general single-update-mode modulator modulator, the symmetric-on-time modulator and the beginof-on-time modulator respectively. Hence, three out of four different single-update-mode modulators can be analyzed in a unified way. The input of the modulator u(t) is separated into a steadystate part U (a constant) and a small excursion to this steady- A. The UPWM-equivalent for the end-of-on-time modulator As an example the z-domain model of the characteristic system is derived for an end-of-on-time modulator. For this modulator the following applies: α = 0 and T1 = (1 − D)Ts , with D (= U ) the average duty-ratio. With these parameter values, substitution of (6) in (2) yields n o Gtot (z) = Ts Z e−sT∆ R(s)e−sDTs n o = Ts Z e−s(ζ+D)Ts R(s) , (7) 4301 2004 35th Annual IEEE Power Electronics Specialists Conference Aachen, Germany, 2004 TABLE I T HE UPWM- EQUIVALENT OF THE CHARACTERISTIC SYSTEM : (a) THE END - OF - ON - TIME MODULATOR , (b) THE BEGIN - OF - ON - TIME MODULATOR (a) (b) case condition Gtot (z) case condition Gtot (z) 1 0 < ζ < (1 − D) Ts R(z, 1−D−ζ) 1 0<ζ <D Ts R(z, D−ζ) 2 D<ζ <1 Ts z −1 R(z, 1+D−ζ) 2 (1 − D) < ζ < 1 Ts z −1 R(z, 2−D−ζ) TABLE II T HE UPWM- EQUIVALENT OF THE CHARACTERISTIC SYSTEM : (a) THE SYMMETRIC - ON - TIME MODULATOR , (b) THE SYMMETRIC - OFF - TIME MODULATOR (a) case condition 1 0 < ζ < 12 (1−D) 2 1 1 2 (1−D) < ζ < 2 (1+D) 3 1 2 (1+D) < ζ < 1 Ts 2 h Gtot (z)

i R z, 12 (1 + D) − ζ + R z, 12 (1 − D) − ζ

i R z, 12 (1 + D) − ζ + z −1 R z, 1 + 12 (1 − D) − ζ h

i Ts −1 R z, 1 + 12 (1 + D) − ζ + R z, 1 + 12 (1 − D) − ζ 2 z Ts 2 h (b) case condition Ts 2 0<ζ < D 2 1 2 D 2 < ζ < 12 (2 − D) 3 1 2 (2 − D) < ζ < 1 h Gtot (z)

i R z, 12 (2 − D) − ζ + R z, 12 D − ζ

i R z, 12 (2 − D) − ζ + z −1 R z, 1 + 12 D − ζ h

i Ts −1 R z, 1 + 12 (2 − D) − ζ + R z, 1 + 21 D − ζ 2 z Ts 2 h with ζTs = T∆ . As in most cases the total delay T∆ is smaller than the sampling period Ts , ζ is comprised between 0 and 1 and two cases can be distinguished  n o  Gtot (z) = Ts Z e−s(ζ+D)Ts R(s) for ζ +D < 1 . n o  Gtot (z) = Ts z −1 Z e−s(ζ+D−1)Ts R(s) for ζ +D > 1 (8) If the modified z-transform of R(s) is defined as n o R(z, m) = Zm{R(s)} = Z e−s(1−m)Ts R(s) , (9) equation (8) can be transformed into   Gtot (z) = Ts R(z, 1 − D − ζ) for ζ +D < 1 . (10)  Gtot (z) = Ts z −1 R(z, 2 − D − ζ) for ζ +D > 1 This model Gtot (z) is the uniformly-sampled pulse-widthmodulator equivalent or UPWM-equivalent for an end-ofon-time modulator of the transfer function R(s)e−sT∆ . A summary of the z-domain models of the characteristic system for an end-of-on-time modulator with their corresponding conditions is shown in Table I(a). The UPWM-equivalent for the begin-of-on-time modulator, the other sawtooth-carrier modulator, can be derived in a similar way. Though the calculation is omitted, the results are tabulated in Table I(b). Note that the z-domain models for the begin-of-on-time modulator can be deduced from the z-domain models for the end-of-on-time modulator by substituting the average duty ratio D in the latter with the complement of the average duty-ratio 1−D, and vice-versa (compare Tables I(a) and I(b)). B. The UPWM-equivalent for the symmetric-on-time modulator As another example the UPWM-equivalent of the characteristic system for a triangular-carrier modulator, the symmetric-on-time modulator, is derived. The waveforms of the symmetric-on-time modulator can be obtained by choosing α = 1/2 in Fig. 7. For this modulator the parameters T0 and T1 are defined as T0 = T1 = T2s (1−D). By using T∆ = ζTs the UPWM-equivalent of the characteristic system can be expressed as Gtot (z) = Ts n −s(ζ+ 1−D 2 )Ts Z e 2  o 1+D + e−s(ζ+ 2 )Ts R(s) . (11) Depending on whether the different delays in (11) are larger than the sampling period Ts or not, and taking into account that ζ is almost always smaller than 1, three different cases can be distinghuised. In the first case, defined by 0 < ζ < 12 (1−D), equation (11) can be rewritten by using the definition for the 4302 2004 35th Annual IEEE Power Electronics Specialists Conference Aachen, Germany, 2004 PSfrag replacements replacements 
  S2 Vin vs R vo Fig. 9.
Ts  R z, 12 (1 + D) − ζ 2
 + R z, 12 (1 − D) − ζ . (12) If the following applies 12 (1−D) < ζ < 12 (1+D), the second transportation delay in (11) becomes larger than the sampling period Ts . Consequently, the UPWM-equivalent of the characteristic system becomes Gtot (z) =
Ts  R z, 12 (1 + D) − ζ 2
 + z −1 R z, 1 + 12 (1 − D) − ζ . (13) In the last case were ζ is comprised between 12 (1+D) and 1, both delays in (11) are larger than the sampling period. Hence, the UPWM-equivalent of the characteristic system can be expressed as Gtot (z) =
Ts −1  z R z, 1 + 21 (1 + D) − ζ 2
 + R z, 1 + 12 (1 − D) − ζ . (14) The z-domain models of the characteristic system for the symmetric-on-time modulator (12)–(14) with their corresponding conditions are recapitulated in Table II(a). Similar calculations are performed to derive the z-domain models of the characteristic system for a symmetric-off-time modulator. Though the derivation of these models is not explicitly repeated, the results are summarized in Table II(b). Similar to sawtooth-carrier modulators, the UPWM-equivalents for the symmetric-off-time modulator can be obtained by replacing D with its complement 1−D in the UPWM-equivalents for the symmetric-on-time modulator, and vice-versa (compare Tables II(a) and II(b)). IV. M ODEL VALIDATION To show the validity of the approach, the discrete UPWMequivalent is deduced for the buck converter of Fig. 8 with a first order output filter. If the input voltage Vin of the converter is a constant, the Laplace transfer function of its output can be written as (see also Figs. 4 and 5) P (s) =      
  Vin Vin = . 1 + sL/R 1 + sτ (15) Under the assumption that the transfer function of the measurement is given by H(s)e−sτm = 1, Block diagram for the digitally controlled buck converter the pulse-transfer function of the closed loop system can be written as A buck converter with a first order filter Vo (z) Q(z) = Qw (z) Vo,w (z)  G(z)Z e−s(τd +τp ) G∗PWM (s)P (s)  . = 1 + G(z)Z e−s(τd +τp ) G∗PWM (s)P (s) modified z-transform of (9) Gtot (z) =
 L S1 Fig. 8.  (17) To calculate this transfer function, the delay τd +τp and the type of modulator used must be known. Assume that during normal operation the average duty ratio D of the converter is between 0.5 and 1, and that the following condition applies for the delay τd + τp = ζTs ≥ 0.35Ts , (18) than the type of modulator and its corresponding UPWMequivalent can be chosen. If the different cases for the z-domain models in Tables I and II are compared, it is clear that “case 1” guarantees the fastest dynamics of the system. After all, in the other cases an extra pole appears in the origin, indicating an extra delay of a sampling period. Hence, the fastest response of the closed loop system is achievable with a modulator for which the “case 1” condition can be met. Keeping in mind the required duty-ratio range and condition (18), the beginof-on-time modulator (Table I(b), case 1) is the best choice. If only triangular-carrier modulators are considered (Table II), the “case 1” condition can never be met. Hence, for these type of modulators the best solution is to look for a modulator for which the “case 2” condition is fulfilled. Consequently, the fastest usable triangular-carrier modulator is the symmetricon-time modulator (Table II(a), case 2). For both the beginof-on-time modulator and the symmetric-on-time modulator the discrete UPWM-equivalent of the buck converter with a first order filter is derived and simulated in this section. A. The begin-of-on-time modulator To calculate the UPWM-equivalent of the buck converter of Fig. 8, an expression for the modified pulse transfer function of the first order system (15) is required: n o P (z, m) = Z P (s)e−s(1−m)Ts 1 mTs 1 = Vin e− τ Ts . τ z − e− τ (19) Hence, the discrete UPWM-equivalent of the buck converter with a first order filter and with a begin-of-on-time modulator becomes (Table I(b), case 1) (16) 4303 Gtot (z) = Vin Ts − (D−ζ)Ts 1 τ e Ts . τ z − e− τ (20) 2004 35th Annual IEEE Power Electronics Specialists Conference Aachen, Germany, 2004 Im(z) Im(z) Re(z) Re(z) z =a 1PSfrag replacements replacements Fig. 12. The root locus for a buck converter with a first order filter, a symmetric-on-time modulator and a discrete controller · [V] · [V] I I Fig. 10. The root locus for a buck converter with a first order filter, a begin-of-on-time modulator and a discrete controller 1 ag replacements PSfrag replacements vo (t), sim. ∗ vo,w (t) vo∗ (t), z-mod. t [ ms ] vo (t), sim. ∗ vo,w (t) vo∗ (t), z-mod. t [ ms ] I I Fig. 11. The closed-loop response of the buck converter with a first order filter and a begin-of-on-time modulator to a step in the commanded output ∗ (t)): the simulated model (v (t), sim.) and the z-domain model voltage (vo,w o (vo∗ (t), z-mod.) Fig. 13. The closed-loop response of the buck converter with a first order filter and a symmetric-on-time modulator to a step in the commanded output ∗ (t)): the simulated model (v (t), sim.) and the z-domain model voltage (vo,w o (vo∗ (t), z-mod.) With this pulse transfer function and with (16) the control circuit of Fig. 5 can be simplified to the block diagram represented in Fig. 9. If the steady-state error of the control loop of Fig. 9 must be zero, the controller G(z) requires a pole at z = 1. Furthermore, a zero of the controller can be used to compensate for the pole Ts of the process (20) at z = e− τ . The resulting controller is gain will increase or decrease (20). As a result the position of the closed-loop pole in the origin will alter depending on the average value of the duty ratio. Nevertheless, with a dutyratio range of 0.5 up to 1 and with a design value for the average duty-ratio of Do = 0.75 this effect only results in a slight change in closed-loop response. To verify the theoretical results the closed loop step response of the buck converter is simulated with Simulink. The simulated waveforms are compared to the results obtained with the z-domain model. For the simulation the following parameters were used    Vin = 400 V, Ts = 20 µs, (23) L = 1 mH, R = 32 Ω,    ζ = 0.375, Do = 0.75. Ts z − e− τ . (21) z−1 The root locus of the closed loop system for a variable gain K Ts is depicted in Fig. 10. Apart from the hidden mode at z = e− τ there remains only one closed loop pole that can be placed in the origin by choosing the gain of the controller as follows G(z) = K 1 Ts (Do −ζ) Ts τ , e (22) Vin τ with Do the design value for the average duty ratio. Consequently the closed-loop system will behave as a delay of one sampling period or, the response is a dead-beat response. If the average duty-ratio D differs from its design value Do , the loop K= The result is depicted in Fig. 11 (D = Do ). A comparison between the waveforms obtained with the Simulink model (the solid lines) and the step response of the z-domain model (crosses) shows that the z-domain model accurately predicts the closed-loop behavior of the digitally controlled buck 4304 2004 35th Annual IEEE Power Electronics Specialists Conference converter. Moreover, the step response is clearly a dead-beat response. B. The symmetric-on-time modulator If a triangular-carrier modulator is to be used, the best choice is the symmetric-on-time modulator. The discrete UPWM-equivalent for the buck converter with a first order filter and a symmetric-on-time modulator can be calculated with (19) and Table II(a), case 2 (keeping in mind condition (18)): Ts Gtot = Vin Ts −( 21 (1+D)−ζ ) Tτs z + e−(1−D) τ . e ·  Ts 2τ z z − e− τ (24) This pulse transfer function does not only contain the same pole as the system of (20), but it also contains an extra pole in the origin and an extra zero. A dead-beat controller for this system is of the following form   Ts z z − e− τ G(z) = K , (25) (z − 1)(z − a) with a = −e−(1−Do ) Ts τ . (26) However, due to important changes in the position of the Ts system zero at z = −e−(1−D) τ caused by the various values the average value of the duty ratio D may adopt (24), the closed-loop behavior may change drastically. To avoid this, it is better to choose a somewhat slower controller with a settling time of 2 sampling periods. To achieve this the closed-loop system should have a double pole in the origin, or the root locus should have a breakpoint in the origin. A root locus has a breakpoint in the origin if (for D = Do ) d (G(z)Gtot (z)) = 0. dz z=0 (27) This equation yields a value for a a=− e−(1−Do ) Ts τ 1 + e−(1−Do ) Ts τ . (28) The root locus of the closed loop poles with this value for a Ts is depicted in Fig. 12. Besides the hidden mode at z = e− τ , the two closed-loop poles of the system coincide in the origin for (1 + a) 2τ ( 12 (1+Do )−ζ ) Tτs K= · e . (29) Vin Ts The simulation is performed for ζ = 0.5, while the other parameters are chosen according to (23). The closed-loop step response for the buck converter is shown in Fig. 13 (for D = Do ). The comparison between the simulation results (solid line) and the results predicted by the z-domain model Aachen, Germany, 2004 reveals the good agreement. As indicated above the settling time for a step response is equal to 2 sampling periods. V. C ONCLUSION As the performance of digital signal processors has increased rapidly during the last decade, there is a growing interest to replace the analog controllers in low power switching converters by more complicated and flexible digital control algorithms. Compared to high power converters, the control loop bandwidths for converters in the lower power range are generally much higher. Because of this, the dynamic properties of the uniformly-sampled pulse-width modulators used in low power applications become an important restriction to the maximum achievable bandwidth of control loops. Though frequency- and Laplace-domain models for uniformly-sampled pulse-width modulators are very valuable as they improve the general perception of the dynamic behavior of these modulators, the direct discrete design of the digital compensator requires a z-domain model for the combination modulator and converter. For this purpose a new exact small-signal zdomain model is derived. In accordance with the zero-orderhold equivalent commonly used for ‘regular’ digital control systems, this z-domain model gives rise to the development of a uniformly-sampled pulse-width-modulator equivalent of the converter. This z-domain model is characterized by its capability to quantify the different dynamics of the converter for different modulators, its ease of use and its ability to predict the values of the control variables at the true sampling instants of the real system. The obtained z-domain models are compared with the results retrieved from simulation models of a buck converter with a first order filter. R EFERENCES [1] — , “Power supply ‘Digital Control’-Real or Virtual,” RAP session, 18th Ann. Appl. Power Electron. Conf. and Exp. (APEC2003), Miami Beach, USA, Feb. 9-13, 2003. [2] — , “Special issue on digital control in power electronics,” IEEE Trans. Power Electron., Vol. 18, No. 1, Part II of Two Parts, Jan. 2003. [3] D.A. Grant, M. Stevens, and J.A. Houldsworth, “The effect of word length on the harmonic content of microprocessor-based PWM waveform generators,” IEEE Trans. Ind. Applic., Vol. 21, No. 1, Jan./Feb. 1985, pp. 218–225. [4] A.V. Peterchev, S.R. Sanders, and J.A. Houldsworth, “Quantization resolution and limit cycling in digitally controlled PWM converters,” Proceedings IEEE 32nd Annual Power Electr. Spec. Conf., Vancouver, Canada, 2001, on cd-rom. [5] D.M. Van de Sype, K. De Gussemé, A.P. Van den Bossche, J.A. Melkebeek, “Small-signal Laplace-domain analysis of uniformly-sampled pulsewidth modulators,” Proc. of the 35th Ann. Power Electron. Spec. Conf., Aachen, Germany, 2004, on cd-rom. [6] G.C. Verghese, M.E. Elbuluk, and J.G. Kassakian, “ A general approach to sampled-data modeling for power electronic circuits,” IEEE Trans. Power Electron., Vol. 1, Apr. 1986, pp. 76–89. [7] V. Rajasekaran, J. Sun, and B.S. Heck, “Bilinear discrete-time modeling for enhanced stability prediction and digital control design,” Trans. Power Electron., Vol. 18, No. 1, Jan. 2003, pp. 381–389. [8] G.F. Franklin, J.D. Powell, and M. Workman, “Digital control of dynamic systems,” Addison Wesley Longman, California, USA, 3rd edition, 1998. 4305 View publication stats