A Parallel turbo encoder-decoder scheme

A Parallel turbo encoder-decoder scheme Spyridon K. Chronopoulos, Giorgos Tatsis, Vasilis Raptis, Panos Kostarakis Physics Department, University of Ioannina Ioannina, Greece [email protected], {gtatsis, vraptis}@grads.uoi.gr, [email protected] Abstract — The field of forward error correction was greatly influenced by the discovery of turbo codes. This invention led to a great improvement in terms of Bit-Error-Rate (BER). Various schemes have been proposed and are based either on parallel or serial designs of concatenated decoders. These decoders are iterative using SOVA (soft output viterbi) or MAP (maximum a posteriori) algorithms. They introduce superior recovery functions of data which have been transmitted through noisy environments. Actually, these turbo schemes compared to convolutional codes achieve better data recovery with the increase of the constraint length. Considering all previous principles, we designed a new parallel turbo encoder-decoder system. This system was compared to already existing serial and parallel turbo coding schemes and to a convolutional encoder. Performance level was verified through simulations including Additive White Guassian noise. BER analysis exhibited better results compared to all other designs for various numbers of iterations. Keywords - Turbo codes, Convolutional Concatenated Convolutional Codes, Parallel Convolutional Codes, Random interleavers, Probability decoder, Iterative decoding, Puncturing, Noise variance I. codes, Serial Concatenated A Posteriori Scaling factor, INTRODUCTION Theoretical bounds of Shannon’s capacity can be reached in terms of performance for the case of Turbo codes. Iterative procedure, as a part of a Turbo decoder system, offers excellent detection of information streams. These streams are transmitted through Gaussian channels. Consequently, the invention of Turbo codes is considered to be a major breakthrough [1]. Their applications are numerous and include OFDM [2], MIMO [3,4], UWB [5,6], Wireless Lan [7], 3rd Generation Partnership Project (3GPP), 3G mobile telephony standards and others. Also, Turbo codes have been adopted by European Space Agency and NASA missions such as SMART-1 and Mars Reconnaissance Orbiter respectively [8]. Turbo codes can be categorized into two schemes. These schemes are SCCC (Serially concatenated convolutional codes) and PCCC (Parallel concatenated convolutional codes). The previous topologies can be easily discriminated by the strategy of the block connections. These connections refer to the joining of convolutional encoders in a serial or in a parallel manner. In each case various interleavers must be present. For the decoders’ section the designs are more complicated and they will be mentioned later. The idea of iterative function is coming from the operation of a car’s turbo charger. The fuel is enhanced through a feedback connection and the car’s performance increases. In accordance to the previous idea, a Turbo decoder uses feedback loop in order to reevaluate data and finally to produce a better estimation [9]. This estimation of received data is superior compared to other systems which are utilizing Viterbi decoders. The iterative function can be constituted of APP (A Posteriori Probability) decoders with two inputs and two outputs. These decoders provide a very efficient estimation of the value of the incoming information but they cannot conclude to a decision which bits are 1’s or 0’s. This decision is taken by the Hard Decision section. Also, two of the previous decoders can constitute a typical iterative decoding system. This system can be considered as a block with two inputs and two outputs. The two inputs correspond to the incoming streams from the iterative connection and from the primary receiving route. The two outputs produce the data for reevaluation (for feedback loop) and the speculated sequences (for Hard Decision). A similar idea to the previous strategy of encoding and decoding has been adopted in order to design a new PCCC system. This system is presented in section II. The main differences to standard architectures include three convolutional encoders in the encoder’s section, along with the appropriate number of interleavers. In the decoder’s section, the incoming data stream is demultiplexed and then each produced data stream is fed to the appropriate APP decoders. These decoders are three instead of two but they still form an iterative function for estimating the received data. Moreover, in this estimation is taken into consideration the use of an additional parameter which is a scaling factor [10]. This paper has four sections. The second section is dedicated to the discussion of the various Turbo designs which were simulated and compared. These simulations and their results are shown in the third section. In the fourth section conclusions are presented involving this research along with very promising future scopes. II. PARALLEL AND SERIAL TURBO SCHEMES Systems which are needed to have a robust endurance against noise must definitely utilize Turbo codes and consequently iterative techniques in the decoders’ parts. These parts will be discussed in this section but firstly the encoders must be presented. These encoders form two types of concatenated codes which the two of them use parallel 2nd Pan-Hellenic Conference on Electronics and Telecommunications - PACET΄12, March 16-18, 2012, Thessaloniki, Greece combinations of convolutional codes while the other one uses serial formation. Also, all the designs contain interleavers. These interleavers have the ability of decorrelating data streams especially when their serial or parallel concatenation must be conducted. Interleavers which exhibit excellent performance are Random Interleavers [11]. Two convolutional encoders which are connected in serial, with a presence of a random interleaver between them, constitute an SCCC encoder in Fig. 1. The convolutional codes are adjusted to two types of rates (outer - 1/2 and inner - 2/3). The outer has a constraint length of three and the inner a constraint length of six. The previous constraint lengths result in an overall length of seven with one input and six registers, while the total rate equals to 1/3. The SCCC decoder in Fig. 2 contains two APP decoders named as inner and outer. The inner is the first encoder which accepts the primary received data and the data coming from the feedback loop. Then, the inner is connected with a random deinterleaver and in turn this deinterleaver connects to the outer encoder. In turn, this produces two output signals. One data stream will pass through the feedback connection and the other one is the input of the Hard Decision block. PCCC systems are usually constituted of two convolutional encoders connected in parallel mode [12]. In this section a new PCCC scheme will be presented which contains three encoders [13]. A binary generator produces the random signal which passes through a convolutional encoder. This encoder outputs the systematic and the recursive stream of the primary data using a puncturing technique. In Fig. 1 puncturing is accomplished with the insertion of a deinterlacer. Similarly, the other remaining encoders accept interleaved versions of the primary data and produce only the recursive streams again with the method of puncturing. Finally, all encoders’ outputs are concatenated in parallel with the help of four functions. These functions are horizontal concatenation, transposing, reshaping and frame conversion. Typical Turbo encoders containing two encoding blocks have a rate of 1/3. The encoder of the proposed Turbo system contains three convolutional coding blocks and works with a rate of 1/4. Moreover, it must not be omitted the fact that no puncturing was applied after the block of concatenation. Generally this puncturing procedure gives the capability of producing various rates. This was not applied here because it would result in performance degradation as the Turbo coded punctured data would have to pass through an AWGN channel [14]. After the AWGN channel follows the decoding process. This process can be completed into two stages. The first stage’s front end is constituted of a Unipolar to Bipolar and a Gain block (gain = 2/s, where s is the noise variance). Then these are followed by the Zero Order Hold procedure along with the appropriate puncturing [15]. The last is conducted in order to retrieve the recursive and systematic versions from the primary incoming information stream. Then these signals are interlaced in order to pass through the appropriate APP decoders. The proposed system differs from a typical PCCC system by the number of random interleavers, interlacers and the presence of a gain block which has a value of 1/2 (after puncture block 1). All the previous are presented in Fig. 3. It must be noted also that the Zero Order Hold adjusts the number of iterations. Figure 1. Turbo encoders (Typical PCCC design contains only white blocks. The proposed PCCC is accomplished using additional grey blocks. The typical SCCC design corresponds to the block sequence of 1Æ2Æ3Æ4 while the block 2 is named outer encoder and block 4 is named inner encoder) Figure 2. Serial Turbo Decoder Figure 3. First stage of PCCC decoding (Gain after puncture block 1 appears as “G”. Proposed first stage is accomplished using additional grey blocks) The second stage of the PCCC system contains APP decoders which participate in a connection topology for constituting an iterative function [16]. Each output of the first stage is connected to the corresponding input of the APP decoder at the second stage. Each output is the updated version of its input. Various random interleavers have been inserted in the design for the purpose of decorrelating data streams for the best possible result. Also, puncturing is used in order redundant data to be rejected [7]. Only then the remaining information will pass through a block named Hard Decision. This happens as it is important to alter the data type to 1’s and 0’s. Finally, the new stream will be compared to the original information for acquiring the BER performance. The new parallel Turbo decoder contains three APP decoders which are shown in Fig. 4. The input (IN1) connects to the output (OUT1) of the first stage. This data stream is inserted into the first APP decoder which outputs a better speculated sequence. The updated sequence is interleaved and passes through the second APP decoder. Again, its updated output connects to the third encoder. Then, two choices are possible. One connection leads to the Hard Decision block while the other follows the iterative path in order to reach the input of the first APP decoder. This procedure increases the performance of the overall process. The decoding system shown in Fig. 4 contains also a very critical part for our design which is a scaling factor. This factor can be added as a gain block. This block is known from the literature to enhance decoding performance as long as the proper value is selected. This value is suggested to be equal to 0.7 [10,17,18]. Various simulations were conducted in order to verify that this value can also be applied in our coding system. Fig. 4 presents the second decoding stage of two PCCCs. The typical PCCC design is constituted from all grey and black colored blocks including the dashed routes 1 and 2. Our new decoder is constituted from all white and grey blocks without the presence of routes 1 and 2. new Turbo scheme even without scaling factor is superior to all others (e.g. for BER of 10- 4 and block size of 256 the coding gain is almost 0.2 dB compared to SCCC and over 0.5 dB compared to a typical PCCC). In Fig. 5b all techniques are compared with the proposed one (which utilizes scaling factor) for 5 iterations. Fig. 5c presents the diversity in the behavior of the new system (with SF) for 5 iterations and for various frame sizes (Blue, red, black and green curves correspond to frame sizes of 64, 128, 256 and 512). This plot exhibits the enhanced performance of the new system when the SF of 0.7 is applied. For example, BER of 10-4 can be achieved with block size 512. The coding gain is almost 0.3 dB with the presence of the SF. In Fig. 5b, the superiority of the new PCCC design with SF is easily noticeable (e.g. new scheme with block size of 256 shows an improved performance over 0.3 dB compared to a typical PCCC with block size of 512 and for BER of 10 - 4). IV. Figure 4. Second stage of PCCC decoding (Scaling factor corresponds to the block labelled as “G”) III. SIMULATION RESULTS All the Turbo codes’ designs were simulated and compared in terms of BER. They contained convolutional encoders sustaining two types of rates. All the encoders had a rate of 1/2 except from the inner encoder in SCCC scheme which had a rate of 2/3. The decoders’ part constituted of APP decoders as already mentioned in the previous section. These decoders were adjusted to work with Max* option. True A Posteriori Probability needs more memory and decreases the speed of the decoding process. Also, Max* compared to Max is more complicated but it boosts BER performance [19,20]. These two options differ only by a correction term. This term is present inside Max*. The last option is also known as log-MAP algorithm and is analyzed thoroughly in [21]: max ( x, y ) = ln(e + e ) = max( x, y ) + log(1 + e * x y − y−x ). (1) All simulated scenarios included an AWGN channel. Every transmitted symbol is constituted of a fixed number of bits [22]. This number depends on the modulation type. In this paper all simulated scenarios employed QPSK modulation (Gray constellation, M=4). Rm and Rc correspond to log2M and code rate. The noise variance is presented in (2). All previous facts are mentioned in detail in [13]. ES 2 . (2) σ = 2 R mR c ( Eb / Ν0 ) The coding schemes of PCCC, SCCC, new PCCC with or without scaling factor, and convolutional coding with Viterbi decoder were simulated with various frame sizes of 64, 128, 256 and 512. In Fig. 5 are presented all BER plots. In Fig. 5a are compared all schemes for 5 iterations (new PCCC with SF only for block size 512). In this plot is clearly shown that the CONCLUSIONS – FUTURE SCOPES A new PCCC design utilizing a scaling factor of 0.7 was compared to other existing schemes. This new technique is superior compared to all others even with the absence of the SF. Also, the total number of iterations of the decoding procedure was set to number five, because by increasing the number of iterations more latency is produced [7]. Future scopes of this research include the integration of the new coding system (in simulation level) to OFDM systems [2], with enhanced characteristics [23,24], along with its implementation in a DSP [25]. ACKNOWLEDGMENTS This research has been co-financed by the European Union (European Social Fund – ESF) and Greek national funds through the Operational Program "Education and Lifelong Learning" of the National Strategic Reference Framework (NSRF) - Research Funding Program: Heracleitus II. Investing in knowledge society through the European Social Fund. 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