Design & Analysis of Multi-Input DC-DC Converter

IJSTE - International Journal of Science Technology & Engineering | Volume 2 | Issue 11 | May 2016 ISSN (online): 2349-784X Design & Analysis of Multi-Input DC-DC Converter Akash Gupta Department of Electrical Engineering Maharana Pratap Collage of Technology, Gwalior Rajive Gandhi Proudyogiki Vishwavidyalaya, Bhopal, India Mohit Paprikar Department of Electrical Engineering Maharana Pratap Collage of Technology, Gwalior Rajive Gandhi Proudyogiki Vishwavidyalaya, Bhopal, India Abstract A new two-input Boost-SEPIC DC-DC converter suitable to draw power from two different dc sources feeding a common dc-bus is presented in this paper. This is a two-switch converter belongs to fifth-order family and performs boosting operation. The salient feature of the proposed converter is that both the sources are simultaneously supplying power to the downstream load at reduced ripple current. This feature is particularly attractive for dc grid application. A 48 V, 177 Watt converter performance is analyzed and compared with the simulation observations. Keywords: DC-DC converter, PCSC, SEPIC converter ________________________________________________________________________________________________________ I. INTRODUCTION The technological development of power electronics definitely brought back dc system in power utilization reliability, accuracy and better load regulation are main issues of modern power supply Today power electronics system are highly developed so demand of Switch-mode power converter is increasing day by day in various application such as hybrid vehicles and telecommunication power supply. In order to utilize maximum energy from more than one energy source such as fuel cell, battery, solar array and wind energy various multi input converter has been proposed in the recent year. Depending upon the applications one could select a feasible topology by considering many features like reliability, cost and flexibility. It is more advantageous to use multi-input converter rather than several independent single source converters as it results in less number of components, more stability in modern power electronics system several power sources such as battery ultra-capacitor, fuel cells are used, therefore utilization of multi-input converters is inevitable. Multi input converter has advantage of higher system efficiency, high power density, light weight and small size. The objective of this paper is to generate a two input topology by using pulsating source cell derived from six non-isolated converter such as buck, boost buck-boost, Cuk, SEPIC and Zeta. In this paper one boost pulsating source current cell (PCSC) and one SEPIC prime PWM converter are combined to transfer power from source to load [1] .The basic idea of this paper is to insert the PCSC into the energy buffer portion of the prime SEPIC converter such that both power source can transfer power to the load simultaneously. Basically any converter (except buck and boost) can be divided in to three section namely input portion IP, energy storing buffer portion EBP, and output portion OP. During one moment of switching cycle input portion will transfer power to the buffer portion and during next moment of switching cycle energy buffer portion will transfer the stored energy to the output portion without consuming any energy. This energy buffer portion may be a voltage or current buffer. There are certain rules to connect PCSC are PVSC with prime PWM converter [1]. To address some the issues various type of multi-input converter with different topology has been already reported in literature. In this paper boost PCSC and SEPIC converter based multi-input converter is proposed and then digital controller have been design to ensure load bus voltage regulation together with distribution of power by appropriate control of input dc power sources. The proposed converter has a unique feature of boosting action which is important from dc grid application point of view. Several controller design approaches have been reported in literature .However depending upon the interaction between the control loops control structure has to be chosen. If the interaction is very small then decentralized control technique will be a feasible option. All rights reserved by www.ijste.org 814 Design & Analysis of Multi-Input DC-DC Converter (IJSTE/ Volume 2 / Issue 11 / 139) iL1 L1, r1 D1 S1 C1, rc1 L2, r2 vc1 S2 Vg2 D2 i0 iL3 L3, r3 iL2 vc2 C2,rc2 Vg1 R v0 Fig. 1: Two-input dc-dc converter circuit diagram. iL1 L1, r1 D1 S1 C1, rc1 L2, r2 vc1 S2 Vg2 D2 i0 iL3 L3, r3 iL2 C2,rc2 Vg1 vc2 R v0 R v0 Fig. 2: Mode 1 iL1 L1, r1 D1 S1 Vg1 C1, rc1 vc1 S2 Vg2 i0 iL3 C2,rc2 L2, r2 D2 L3, r3 iL2 vc2 Fig. 3: Mode 2 L1, r1 D1 S1 C1, rc1 iL2 L2, r2 vc1 S2 Vg2 D2 i0 iL3 vc2 C2,rc2 Vg1 L3, r3 iL1 R v0 Fig. 4: Mode 3 All rights reserved by www.ijste.org 815 Design & Analysis of Multi-Input DC-DC Converter (IJSTE/ Volume 2 / Issue 11 / 139) II. MODELLING OF TWO-INPUT DC-DC CONVERTER The proposed two-input dc-dc converter, shown in Fig. 1, has two different power sources and two switching devices with five energy storage elements and hence it forms a fifth order system. The proposed two input Boost SEPIC converter can perform bucking as well as boosting operation with respect to both the sources. The proposed converter can work in both continuous and discontinuous inductor current mode but in view of higher load power requirement this converter is analyzed for continuous inductor current mode of operation. Different modes of operation depend upon the magnitude of duty ratios. Depending upon the duty ratio three different schemes are possible. Scheme 1:d 1>d2 Scheme 2: d1<d2 and Scheme 3: d1=d2. In first scheme (d1>d2) The circuit is going to operate under four different modes in one switching cycle .In this paper scheme 2(d 1<d2) is considered in which circuit exhibits three mode operation and for scheme 3 (d 1=d2) only two modes are possible in a switching cycle. For scheme 2 (d2>d1) assuming switches and diodes are ideal then converter exhibits three mode of operation in a switching cycle .(a) mode-1:S1,S2 both are ON and diode D1,D2 are OFF.(b) mode-2:S2,D1 are ON and S1,D2 are OFF.(c) mode-3:S1,S2 both are OFF and D1,D2 both are ON. During mode-1 inductor L1 and L2 are linearly charging by their respective source voltages V g1 and Vg2 and capacitor C1 charges inductor L3 during this mode load voltage is obtained from capacitor C2. In mode-2 inductor L2 charges linearly but inductor L1 current will decrease linearly. During this mode of operation energy stored in inductor L 1 will transferred to buffer capacitor C1 .Buffer capacitor will play a very important role in power processing. Depending upon the magnitude of voltage across buffer capacitor direction of power flow will be decided. In mode-3 both switches are in OFF state so both sources will transfer power to the load simultaneously. Depending on the load demand and available power with each dc source three different cases will arise, which are: (i) d 1  d 2 , (ii) d 1  d 2 , (iii) d 1  d 2 . State space modeling of the converter is required to obtain mathematical model of the physical converter system. For the design of digital control system discrete time modeling is required. In this paper the d 1  d 2 case is analyzed for the trailing-edge off time synchronized switching signals. If the system is linear and time invariant then for each mode of operation the power stage dynamics can easily be described by a set of state equations in matrix form given by: x  A K x  B K u where  x   iL1 iL 2 iL 3 v c1 vc 2  , T y  C k x  Fk u u   V g 1  Vg 2   (1) T and k=1,2,3 for mode-1, mode-2 and 3, respectively. Applying volt-sec balance to all the inductors mode by mode in a switching cycle gives the voltage across all three inductor and solving equation voltage conversion ratio of this converter can be derived given by equation .2. Vg 2 V g1 (2) Vo   (1  d 2 ) (1  d 1) From equation 2. it is clear that the load voltage is dependent on the both input dc sources as well as both switch duty ratio and converter is going to perform boosting operation with respect to both the power source due to this feature this converter is best suited for dc grid application and both input source can be utilize to fulfill load demand. Table – 1 Converter Circuit Element Design Equations The design equation of the circuit element can be obtained from time domain analysis. L1  V g 1 d1 L2  V g 2 d1 f s  iL1 f s  iL 2 L3  C1  C2  iL 3 d1 f s  v c1 I 0 ( d 2  d1 ) V 0 (1  d 1 ) f s  vc 2 f s  iL 3 For the proposed converter assuming inductor current ripple to be 10% of current and capacitor voltage ripple to be 5% of output voltage. From Table I. L1=312 µH, L2=513 µH, L3=702 µH C1=27 µF, C2=60 µF. From equation 1 system matrices in the corresponding mode can be written as, All rights reserved by www.ijste.org 816 Design & Analysis of Multi-Input DC-DC Converter (IJSTE/ Volume 2 / Issue 11 / 139) A  1  r  L   0    0    0    0  1 0 0  r 2 L 2  0  E 1  0  0   r 1  rc1     L 1    0   rc1   L3  1  C1   0   A3  Where, R  e R  R Rr m c2 1 Rr c2 c1 L 0 0 0 r  r 0 0 0 0 3 3  1 0 L 0  0 0 0 0 1 0 0 R  R  r c 2  0  0    0 C (r 2 c2  (3a) (3b) (3c) 1 0 0 0 0  0  rc1 T (3e)   0  L2 0 1 0 L1 L1 0 0 r2 L2 0 0  0 rc1  r 3 1 L3 L3  0 1 0 0 C1 0 0 1              R)  (3d)  1  L 1     0   0 1 0 0 3 1 C B1  B 2  B 3  E 2  0  0  F1  F2  F3  [0]   0 1 P1  P2  P3   0 A2 0 1 0    0 R      R  rc 2     r 1  r c1     L1     r c1   L2   0   1   C1   0     L2 L3  0 Rp R e rc 2 C 2 ( rc 2  R ) (3f) (3g)  r c1     L1   1                1 1 L3 R e rc 2 r L2 3  R e rc 2 0   1 1 L2 0 0 C1 Re Re C2 C2  R p  r 2  r c 1  R e rc 2 E 3   0  Rr c 2 ( R  rc 2) 0 L1 0 Rr c 2 ( R  rc 2)  Re  Re L2 L3 0  R  m  C2 0                  ( R  rc 2)  R (3j) All rights reserved by www.ijste.org 817 Design & Analysis of Multi-Input DC-DC Converter (IJSTE/ Volume 2 / Issue 11 / 139) xˆ  n    xˆ  n  1   1 dˆ1  n  1   2 dˆ 2  n  1 The small-signal discrete-time model [4] can be written as: (4) yˆ  n   E i xˆ  n  . The output state-space equation can be written as follows: (5) In dc-dc converters discrete time modeling can be easily established for trailing edge and leading edge modulation In this paper, trailing-edge OFF-time sampling with a sampling frequency fs(=1/Ts), as shown in Fig. 5, is implemented. In trialling edge off time sampling the signal is sensed during off time, and the PWM pulses are aligned at the beginning of the pulse. The mathematical analysis is discussed in the following paragraphs. From Fig. 2 in interval-1,  n-1 Ts <t<   n-1 Ts  t d  d1Ts  the system state equation can easily be written as x  A3 x (6) Assuming the source voltage is almost constant during each mode of operation of the switching cycle, the discrete-time model with state ‘x[(n-1)Ts]’ at the beginning [4] and duty ratio ‘d’ can easily be defined by A t  d T  (7) x   n-1 Ts  t d  d 1Ts   e x   n  1  Ts  3 d 1 s Along similar lines, the discrete-time models for the remaining time intervals are established as Iinterval-2:   n-1 Ts  t d  d 1Ts  <t<   n-1  Ts  t d  x   n-1 Ts  t d   e A1  d1Ts  e A3  t d  d1Ts  x   n  1  Ts  t d  d 1Ts  (8) Interval-3:   n-1 Ts  t d  <t<   n-1  Ts  t d   d 2Ts  d 1Ts   x   n-1  Ts  td   d 2 T s  d 1T s   e A2  d 2 Ts  d1Ts  x  nT s   e e A1 d 1Ts e A3  t d  d 1T s  x   n  1  Ts   K 1T s e e  K 2Ts e dˆ1  n-1  (9) Interval 4:   n-1 Ts  t d   d 2 Ts  d 1Ts   <t<  nTs  A3  T s  d 2 T s  t d  d 1T s  A3  t d  d 1T s  A2 T s  d 2  d 1   K 1T s e A2 Ts  d 2  d 1  e A3  T s  d 2 T s  t d  d 1T s  A2 T s  d 2  d 1  e A3  T s  d 2 T s  t d  d 1T s  e A1 d 1T s dˆ1  n  1  x   n  1  T s  (10) dˆ 2  n  1  The small-signal discrete-time model in standard form for the converter under discussion can be written as: (11) xˆ  nTs    xˆ   n  1 Ts    2 dˆ 2   n  1 Ts    1 dˆ1   n  1  Ts  Comparing eqns. (10) & (11), it is easy to obtain  e  2  K 2 Ts e ATs ,  1  K 1Ts e A3 Ts  d 2 Ts  t d  d1Ts  A3 Ts  d 2 Ts  t d  d1Ts  e A2 Ts  d 2  d1  K 1    A1  A2  x   B1  B 2  U  K 2    A2  A3  x   B 2  B3  U  . x  z    zI      1 d 1  z    2 d 2  z   Taking the z-transform of eqn. (11), 1 (12) Taking the z-transform of equation (8) results in y ( z )  Ei x ( z ) (13) y ( z )  E i  zI     2 d 2  z   E i  zI     1 d 1  z  . Combining eqns. (9) and (10) results in 1 1 (14) All rights reserved by www.ijste.org 818 Design & Analysis of Multi-Input DC-DC Converter (IJSTE/ Volume 2 / Issue 11 / 139) iL1 iL2 iL3 P W M 1 P W M 2 d1 d2 -d1 d2 td M1 M2 1-d2 M3 Ts M4 X[nTs] X[(n-1)Ts] Fig. 5: PWM gating signals and Off-Time sampling process. III. APPLICATION OF RGA THEORY TO CONVERTER To design the controller for two input converter we need to know the degree of interaction between the control loops. The most popular method of interaction analysis is Relative Gain Array RGA .From this analysis we can decide the best suited control signal to control output voltage and source current.RGA is the ratio of open loop gain to closed loop gain. For the proposed converter interaction is less so decentralized controller is preferred. Expression of RGA may be defined as. 1 T (15)  ( G )  G (0) .* ( G (0) ) 4 Off-diagonal paring 3 R G 2 A N 1 Diagonal pairing 0 frequency 10 -1 104 105 Fig. 6: RGAN v/s frequency plot  1.0004 RGA     0.0004  0.0004   1.0004  Simulation Studies and Experimental Results To study the salient features of proposed two input DC-DC converter and to verify the dc bus regulation together with the load distribution capability a 48 V, 177 Watts converter is considered. In this converter DC source-1 is a low voltage source and DC source -2 is considered as high voltage source. The parameters of the converter element is shown in Table-I. For the parameters given by Table 1 transfer functions of this converter are. G 11 ( z )   1.05 z  4.829 z  8.173 z  6.08 z  1.685 4 3 2 den All rights reserved by www.ijste.org 819 Design & Analysis of Multi-Input DC-DC Converter (IJSTE/ Volume 2 / Issue 11 / 139) G 12 ( z )  G 21 ( z )  0.3685 z  1.24 z  1.528 z  0.8085 z  0.1522 4 3 2 den  0.02209 z  0.07044 z  0.08246 z  0.04166 z  0.007567 4 3 2 den G 22 ( z )  2.393 z  9.236 z  13.4 z  8.657 z  2.103 4 3 den  z  4.883 z  9.567 z  9.403 z  4.636 z  0.9172 (16) 5 4 3 2 den 2 For this converter PSIM is used for simulation purpose steady state voltage and inductor current waveform are shown in figure 8 and 9 respectively .Load shared by each source is show in figure 10. Pole-Zero Map 1 Imaginary Axis 0.5 0 -0.5 -1 -1 -0.5 0 0.5 Real Axis 1 1.5 2 Fig. 7: Polee zero plot of the transfer function (G) Fig. 8: steady state waveform of load voltage All rights reserved by www.ijste.org 820 Design & Analysis of Multi-Input DC-DC Converter (IJSTE/ Volume 2 / Issue 11 / 139) Fig. 9: steady state waveform of inductor and load current Fig. 10: Load power distribution IV. CONCLUSION A new two input boosting DC-DC converter for dc grid application is proposed in this paper. State space and discrete time modeling have been performed for different mode of operation, Simulation results were in agreement with theoretical studies. REFERENCES [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] Y.C.Liu and Y.M.Chen, “A systemic approach to synthesizing multi-input dc-dc converter “ IEEE Tran.Power Electron.vol,24,no.1,pp.116-127,Jan.2009. M. Veerachary, “Two-loop controlled buck-SEPIC converter for input source power management,” IEEE Trans. On Industrial Electronics, Vol. 59(11), pp. 4075-4087, 2012. D. Maksimovic and R. Zane, “Small-Signal Discrete Time Modeling of Digitally Controlled PWM Converters”, IEEE Trans. on Power Electronics, vol. 22, no. 6, pp. 2552-2556, Jun. 2007. Veerachary. Mummadi, Ramakanth Naidu Gowra, and Dileep Ganta. "Discrete-time modeling of multi-state DC-DC converters."Proc. of IEEE conference on Power Electronics, Drives and Energy Systems (PEDES) & Power India, 2010, pp. 1-6. K. P. Yalamanchili, M. Ferdowsi, Keith Corzine, “New Double input dc-dc converters for automotive applications", IEEE Applied Power Electronics Conference (APEC), 2006, CD-ROM proceedings. Y.-M. Chen, Y.-C. Liu and S.-H. Lin, “Double-input PWM dc/dc converter for high/low voltage sources,” in Proc. INTELEC, 2003, pp. 27–32. A. Khaligh, J. Cao, and Y. J. Lee, “A multiple-input DC–DC converter topology,” IEEE Trans. Power Electron., vol. 24, no. 3, pp. 862–868,Mar. 2009. MATLAB user manual, 2009. PSIM, user manual, 2007. M. Veerachary, "Robust stabilizing Digital Controller for Soft-Switching zero voltage turn-on H- bridge Boost Converter," IEEE Trans. Ind. Electron., vol. 58, no.7, 2011, pp.2883- 2897. G. Hua, F.C. Lee, "A new class of zero voltage- switched PWM converters," High frequency Power Conversion Conf Proc., 1994, pp. 637-643. G. Hua, Yiming Jiang, F.C. Lee, "Analysis, design, and experiments of ZVT-PWM boost converter," published in Virginia Power Electronic Center (WEC) Seminar, 1992, pp. 213-219. M. Veerachary, “Two input DC-DC Converter for DC grid applications”, IEEE Power India Conference , 2012, pp. 21-26. R.W.Erickson and D.Maksimovic, “Fundamentals of Power Electronics,” second edition, Springer International Edition, 2006. All rights reserved by www.ijste.org 821