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Alex
  • Member for 12 years, 4 months
  • Last seen more than a month ago
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Top posts
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question
60
Does it make any sense to use the LFENCE instruction on x86/x86_64 processors?
Dec 1, 2013
answer
56
When are x86 LFENCE, SFENCE and MFENCE instructions required?
Dec 24, 2014
question
49
Can I use broadcast or multicast for TCP?
Jan 21, 2014
question
43
Why rotation-invariant neural networks are not used in winners of the popular competitions?
Dec 9, 2016
question
38
Physical or virtual addressing is used in processors x86/x86_64 for caching in the L1, L2 and L3?
Sep 26, 2013
question
33
How do I make to some of the files that I have changed is not offered in the commit?
May 27, 2013
question
31
Are there in x86 any instructions to accelerate SHA (SHA1/2/256/512) encoding?
Dec 19, 2013
question
25
Can Boost ASIO be used to build low-latency applications?
Jun 8, 2017
question
23
Why do we need to use boost::asio::io_service::work?
Jun 17, 2013
question
21
Does standard C++11 guarantee that `volatile atomic<T>` has both semantics (volatile + atomic)?
Nov 1, 2016
Top network posts
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41
How to calculate mAP for detection task for the PASCAL VOC Challenge?
8
What is the different between Fine-tuning and Transfer-learning?
5
What is the fully-convolutional model?
5
Is the prediction algorithm absolutely the same for all linear classifiers?
5
How can I change the distribution of Cores across NUMA-nodes?