All Questions
13 questions
1
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357
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Problems in linux kernel porting, stuck in paging_init function
reference board : i.mx6q sabresd, kernel version : 4.9.17
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.9.17-04736-ga88711e-dirty (mrigendra....
- 1,556
10
votes
2
answers
5k
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Who performs the TLB shootdown?
I read this SO question describing what a TLB shootdown is. I'm trying to understand if this is an operation performed by the kernel or by the processor or both?
My questions are :-
Does a TLB ...
- 988
0
votes
1
answer
923
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Is there any way to know the physical address of attached shared memory?
I want to know the "physical" address of a newly attached shared memory on Linux kernel.
As far as I know, do_shmat() returns the "virtual" address of shared memory.
So I tried to translate the ...
- 1
3
votes
1
answer
350
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How does the kernel translate virtual addresses when it's not found in the page table?
How does the kernel translate virtual addresses when it's not found in the page table? The page is located on the disk, but how exactly does the kernel know where? (the specific address in the disk)
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- 375
2
votes
1
answer
773
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Can kernel manages Process id written on TLB entry?
I've found that TLB contains PID of each process for performance reason, which means by leaving each process's VA to PA mappings in TLB for saving context-switching cost. So, my question is can kernel ...
- 1,469
1
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0
answers
151
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Why don't I need to use invlpg on QEMU after changing paging structure?
Im writing a kernel from scratch and am curious... why is it that when I change something in my page directory QEMU immediately recognizes the change without having to flush the TLB? Here is my code:
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- 493
2
votes
1
answer
2k
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how many entries in my Translation Lookaside Buffer (TLB)
I want to know how many entries my TLB has. Based on that, I could find out the total amount of memory can be referred by my TLB. I am using CentOS 7 and Intel core i7 processor.
- 1,235
1
vote
1
answer
3k
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Kernel space and user space layout in page table
Assume that we have the CPU that has MMU, which works as follows:
for memory management is used only paging
every process has own page table
virtual address of every process is split into user space ...
- 589
1
vote
0
answers
677
views
Will "cpsie" arm instruction case TLB miss?
When I profiled my program, I found that "_raw_spin_unlock_irq" system call causes a lot of iTLB miss on the ARM Cortex A15 Board. After I carefully checked the assembly code, I found that "cpsie" ...
- 11
1
vote
1
answer
3k
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ARM Kernel Oops when interrupts are enabled in page fault handler or with preemptive scheduling
Can you enable interrupts in page fault handler? Is there an ARM kernel contention with preemptive scheduling?
I got an ARM kernel oops in UDP receiving code with CONFIG_PREEMPT, or when interrupt ...
- 6,541
2
votes
1
answer
1k
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why does kernel send a tlb invalidate interrupt to all other processors,when the page table modified is personal to the process running
when a a page table entry of one process, the kernel thread issues tlb shootdown interrupt to all other processors to invalidate the tlbs on other processors? But, is it not that, the page table is ...
- 71
9
votes
2
answers
6k
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Kernel memory (virtual address entries) in TLB?
Linux is the OS and ARM is the processor referred in this context.
Does the TLB contain both kernel and user space virtual addresses?
Kernel memory starts at 0xc000_0000 and goes to 0xFFFF_FFFF
where ...
- 2,570
16
votes
3
answers
17k
views
Can a TLB hit lead to page fault in memory?
In UC Berkley Video lectures on OS by John Kubiatowicz (Prof. Kuby) available on web, he mentioned that TLB hit doesn't mean that corresponding page is in main memory. Page fault can still occur.
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