All Questions
5 questions
0
votes
0
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39
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Free running program captures wrong exception address
I'm using an ARM Cortex-A9 processor ZYNQ 7000. The processor raises an data abort exception if invalid address is accessed. The exception handler captures the data abort address, but if the program ...
- 299
3
votes
1
answer
848
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Zynq 7000: Minimum asm code to init cpu1 from cpu0
I'm trying to figure out the minimum requirements to initialize cpu1 from cpu0 in an amp configuration on a zynq-7000.
I have a given FSBL that hands over to u-boot with which I copy both programs (...
- 744
0
votes
1
answer
613
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Stuck in API XAxiDma_BdRingFromHw, why doesn't the S2MM Block descriptor's Completed bit Set?
I am working on Zynq 7z030 and i am trying to receive data on the DDR from the PL side. I am using the AXI DMA SG poll code provided as example by xilinx on SDK. (xaxidma_example_sg_poll.c)
After ...
- 21
2
votes
0
answers
638
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ARM Cortex-A9 Preload and Lock Code in L2 Cache
I've been studying and experimenting with the caches on an ARM Cortex-A9, namely a Zynq SoC, for the past week with the main objective of loading and locking part of my code to L2 (PL310). The steps I ...
- 475
-5
votes
1
answer
548
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number of cores in the ARM Cortex A9
I'm using Zedboard with Zynq Chip. I want to know the number of cores per CPU (in the board there is two, CPU0 and CPU1, but there is no indication of the number of cores!). Thanks.
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