Analog FastSPICE Platform
Foundry-certified, the AFS Platform delivers nm SPICE accuracy, 5x faster than traditional SPICE and >2x faster than parallel SPICE simulators. Offering the fastest nm circuit verification platform for analog, RF, mixed-signal, and custom digital circuits. Now includes new eXTreme technology. For large post-layout circuits, the new AFS eXTreme technology delivers over 100M-element capacity and is 3x faster than post-layout simulators. Supports all leading digital solvers. Best-in-class usability, allowing maximum reuse of verification infrastructure. Advanced verification and debug capabilities to improve verification coverage. Improved design quality, and time-to-market. SPICE accurate, high-sigma verification. 1000x faster than brute-force simulation. Easy to use, and deploy. AFS eXTreme technology is available at no additional cost.
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Ansys Electronics Desktop (AEDT)
The use of Ansys Electronics solution suite minimizes testing costs, ensures regulatory compliance, improves reliability, and drastically reduces your product development time. All this while helping you build the best-in-class and cutting-edge products. Leverage the simulation capability from Ansys to solve the most critical aspects of your designs. With our solutions, we help you solve the most critical aspects of your product designs through simulation. If you work with antenna, RF, microwave, PCB, package, IC design, or even an electromechanical device, we provide you with the industry gold standard simulators. These solutions help you solve any electromagnetic, temperature, SI, PI, parasitic, cabling, and vibration challenges in your designs. We build on this with complete product simulation, allowing you to achieve first-pass success designing an airplane, car, cellphone, laptop, wireless charger, or any other system.
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SiLogy
Our next-generation web platform empowers chip developers and verification engineers to design and debug 10x faster. Build and run thousands of tests in parallel at the push of a button with Verilator. Seamlessly share test results and waveforms with anyone in your organization, tag coworkers directly on signals, track test and regression failures. We use Verilator to compile Dockerized simulation binaries and distribute test runs across our compute cluster. Then we collect the results and log files and optionally rerun failing tests to generate waveforms. With Docker, we can ensure that test runs are consistent and reproducible. SiLogy makes chip developers more productive by enabling faster design and debug times. Before SiLogy, the state-of-the-art for debugging a failing test involved copying lines from log files, debugging from waveforms on a local machine, or rerunning a simulation that might have taken days to run.
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