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Seyong Lee

Oak Ridge National Laboratory, Computer Science and Mathematics Division, Computer Scientist

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Seyong Lee is a Computer Scientist in the Computer Science and Mathematics Division at Oak Ridge National Laboratory. His research interests include parallel programming and performance optimisation in heterogeneous computing environments, program analysis, and optimizing compilers. He received his PhD in Electrical and Computer Engineering from Purdue University, USA.He is a member of the OpenACC Technical Committee and the NVIDIA PathForward Working Group of the Exascale Computing Project PathForward Program.He served as a program committee/guest editor/external reviewer for various conferences, journals, and research proposals.His paper on SC10 won the best student paper award, and his paper on PPoPP09 was selected as the most cited paper among all papers published in PPoPP between 2009 and 2014.He received the IEEE Computer Society TCHPC Award for Excellence for Early Career Researchers in High Performance Computing at SC16.

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Papers by Seyong Lee

Multiple carcinoid tumors of the small intestine preoperatively diagnosed by double-balloon endoscopy

Medical Science Monitor, 2012

Background: Multiple carcinoid tumors of the small intestine are rare and are very difficult to d... more

Understanding Portability of a High-level Programming Model on Contemporary Heterogeneous Architectures

by Amit Sabne, Putt Sakdhnagool, and Seyong Lee

IEEE Micro, 2015

Moving Heterogeneous GPU Computing into the Mainstream with Directive-Based, High-Level Programming Models

ABSTRACT

COMPASS: A Framework for Automated Performance Modeling and Prediction

ABSTRACT

Toward compiler-driven adaptive execution and its application to GPU architectures

OpenARC: Open Accelerator Research Compiler for Directive-Based, Heterogeneous Computing

ABSTRACT

PMAS: A Unified Programming Model for Multi-Accelerator Systems

This poster proposes PMAS, a unified programming model for multi-accelerator systems. PMAS provid... more This poster proposes PMAS, a unified programming model for multi-accelerator systems. PMAS provides an easy, efficient, and uniform way for programmers to program heterogeneous systems with multiple accelerators, in both single and multi-node configurations. PMAS expresses several levels of parallelism, from vector-level parallelism to node-level parallelism. We have built a prototype implementation of PMAS and evaluated its performance with two GPU-based supercomputers, Keeneland and Titan.

OpenARC: Extensible OpenACC Compiler Framework for Directive-Based Accelerator Programming Study

2014 First Workshop on Accelerator Programming using Directives, 2014

ABSTRACT

Evaluating Performance Portability of OpenACC

Lecture Notes in Computer Science, 2015

Evaluating the Viability of Application-Driven Cooperative CPU/GPU Fault Detection

Lecture Notes in Computer Science, 2014

Early evaluation of directive-based GPU programming models for productive exascale computing

2012 International Conference for High Performance Computing, Networking, Storage and Analysis, 2012

Graphics Processing Unit (GPU)-based parallel computer architectures have shown increased popular... more Graphics Processing Unit (GPU)-based parallel computer architectures have shown increased popularity as a building block for high performance computing, and possibly for future Exascale computing. However, their programming complexity remains as a major hurdle for their widespread adoption. To provide better abstractions for programming GPU architectures, researchers and vendors have proposed several directive-based GPU programming models. These directive-based models provide different levels of abstraction, and required different levels of programming effort to port and optimize applications. Understanding these differences among these new models provides valuable insights on their applicability and performance potential. In this paper, we evaluate existing directive-based models by porting thirteen application kernels from various scientific domains to use CUDA GPUs, which, in turn, allows us to identify important issues in the functionality, scalability, tunability, and debuggability of the existing models. Our evaluation shows that directive-based models can achieve reasonable performance, compared to hand-written GPU codes.

Interactive Program Debugging and Optimization for Directive-Based, Efficient GPU Computing

2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Directive-based GPU programming models are gaining momentum, since they transparently relieve pro... more Directive-based GPU programming models are gaining momentum, since they transparently relieve programmers from dealing with complexity of low-level GPU programming, which often reflects the underlying architecture. However, too much abstraction in directive models puts a significant burden on programmers for debugging applications and tuning performance. In this paper, we propose a directivebased, interactive program debugging and optimization system. This system enables intuitive and synergistic interaction among programmers, compilers, and runtimes for more productive and efficient GPU computing. We have designed and implemented a series of prototype tools within our new open source compiler framework, called Open Accelerator Research Compiler (OpenARC); OpenARC supports the full feature set of OpenACC V1.0. Our evaluation on twelve OpenACC benchmarks demonstrates that our prototype debugging and optimization system can detect a variety of translation errors. Additionally, the optimization provided by our prototype minimizes memory transfers, when compared to a fully manual memory management scheme.

OpenARC: open accelerator research compiler for directive-based, efficient heterogeneous computing

ABSTRACT

OpenMP to GPGPU

ACM SIGPLAN Notices, 2009

GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. ... more GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from NVIDIA offers improved programmability for general computing, programming GPGPUs is still complex and error-prone. This paper presents a compiler framework for automatic source-to-source translation of standard OpenMP applications into CUDA-based GPGPU applications. The goal of this translation is to further improve programmability and make existing OpenMP applications amenable to execution on GPGPUs. In this paper, we have identified several key transformation techniques, which enable efficient GPU global memory access, to achieve high performance. Experimental results from two important kernels (JACOBI and SPMUL) and two NAS OpenMP Parallel Benchmarks (EP and CG) show that the described translator and compile-time optimizations work well on both regular and irregular applications, leading to performance improvements of up to 50X over the unoptimized translation (up to 328X over serial on a CPU).

Puma: Purdue mapreduce benchmarks suite

Quantifying Architectural Requirements of Contemporary Extreme-Scale Scientific Applications

Lecture Notes in Computer Science, 2014

ABSTRACT As detailed in recent reports, HPC architectures will continue to change over the next d... more ABSTRACT As detailed in recent reports, HPC architectures will continue to change over the next decade in an effort to improve energy efficiency, reliability, and performance. At this time of significant disruption, it is critically important to understand specific application requirements, so that these architectural changes can include features that satisfy the requirements of contemporary extreme-scale scientific applications. To address this need, we have developed a methodology supported by a toolkit that allows us to investigate detailed computation, memory, and communication behaviors of applications at varying levels of resolution. Using this methodology, we performed a broad-based, detailed characterization of 12 contemporary scalable scientific applications and benchmarks. Our analysis reveals numerous behaviors that sometimes contradict conventional wisdom about scientific applications. For example, the results reveal that only one of our applications executes more floating-point instructions than other types of instructions. In another example, we found that communication topologies are very regular, even for applications that, at first glance, should be highly irregular. These observations emphasize the necessity of measurement-driven analysis of real applications, and help prioritize features that should be included in future architectures.

Toward compiler-driven adaptive execution and its application to GPU architectures

A major shift in technology from maximizing single-core performance to integrating multiple cores... more A major shift in technology from maximizing single-core performance to integrating multiple cores has introduced a new, heterogeneous arena to high-performance computing communities. Among several new parallel platforms, hardware accelerators, such as General-Purpose Graphics Processing Units (GPGPUs), have emerged as promising alternatives for high-performance computing. While a GPGPU provides an inexpensive, highly parallel system to application developers, its programming complexity poses significant challenges for developers. This dissertation explores compile-time and runtime techniques to improve programmability and to enable adaptive execution of programs in such architectures.^ First, this dissertation examines the possibility of exploiting OpenMP shared memory programming model on stream architectures such as GPGPUs. This dissertation presents a compiler framework for automatic translation and optimization of standard OpenMP applications for executing on GPGPUs.^ Second, th...

OpenMPC: extended OpenMP for efficient programming and tuning on GPUs

International Journal of Computational Science and Engineering, 2013

General-purpose graphics processing units (GPGPUs) provide inexpensive, high performance platform... more General-purpose graphics processing units (GPGPUs) provide inexpensive, high performance platforms for compute-intensive applications. However, their programming complexity poses a significant challenge to developers. Even though the compute unified device architecture (CUDA) programming model offers better abstraction, developing efficient GPGPU code is still complex and error-prone. This paper proposes a directive-based, high-level programming model, called OpenMPC, which addresses both programmability and tunability issues on GPGPUs. We have developed a fully automatic compilation and user-assisted tuning system supporting OpenMPC. In addition to a range of compiler transformations and optimisations, the system includes tuning capabilities for generating, pruning, and navigating the search space of compilation variants. Evaluation using 14 applications shows that our system achieves 75% of the performance of the hand-coded CUDA programmes (92% if excluding one exceptional case).

Enhanced expression of bovine growth hormone gene by different culture conditions in Escherichia coli

Biotechnology letters, 1997

Moving Heterogeneous GPU Computing into the Mainstream with Directive-Based, High-Level Programming Models (Position Paper)

ABSTRACT

Multiple carcinoid tumors of the small intestine preoperatively diagnosed by double-balloon endoscopy

Medical Science Monitor, 2012

Background: Multiple carcinoid tumors of the small intestine are rare and are very difficult to d... more

Understanding Portability of a High-level Programming Model on Contemporary Heterogeneous Architectures

by Amit Sabne, Putt Sakdhnagool, and Seyong Lee

IEEE Micro, 2015

Moving Heterogeneous GPU Computing into the Mainstream with Directive-Based, High-Level Programming Models

ABSTRACT

COMPASS: A Framework for Automated Performance Modeling and Prediction

ABSTRACT

Toward compiler-driven adaptive execution and its application to GPU architectures

OpenARC: Open Accelerator Research Compiler for Directive-Based, Heterogeneous Computing

ABSTRACT

PMAS: A Unified Programming Model for Multi-Accelerator Systems

This poster proposes PMAS, a unified programming model for multi-accelerator systems. PMAS provid... more This poster proposes PMAS, a unified programming model for multi-accelerator systems. PMAS provides an easy, efficient, and uniform way for programmers to program heterogeneous systems with multiple accelerators, in both single and multi-node configurations. PMAS expresses several levels of parallelism, from vector-level parallelism to node-level parallelism. We have built a prototype implementation of PMAS and evaluated its performance with two GPU-based supercomputers, Keeneland and Titan.

OpenARC: Extensible OpenACC Compiler Framework for Directive-Based Accelerator Programming Study

2014 First Workshop on Accelerator Programming using Directives, 2014

ABSTRACT

Evaluating Performance Portability of OpenACC

Lecture Notes in Computer Science, 2015

Evaluating the Viability of Application-Driven Cooperative CPU/GPU Fault Detection

Lecture Notes in Computer Science, 2014

Early evaluation of directive-based GPU programming models for productive exascale computing

2012 International Conference for High Performance Computing, Networking, Storage and Analysis, 2012

Graphics Processing Unit (GPU)-based parallel computer architectures have shown increased popular... more Graphics Processing Unit (GPU)-based parallel computer architectures have shown increased popularity as a building block for high performance computing, and possibly for future Exascale computing. However, their programming complexity remains as a major hurdle for their widespread adoption. To provide better abstractions for programming GPU architectures, researchers and vendors have proposed several directive-based GPU programming models. These directive-based models provide different levels of abstraction, and required different levels of programming effort to port and optimize applications. Understanding these differences among these new models provides valuable insights on their applicability and performance potential. In this paper, we evaluate existing directive-based models by porting thirteen application kernels from various scientific domains to use CUDA GPUs, which, in turn, allows us to identify important issues in the functionality, scalability, tunability, and debuggability of the existing models. Our evaluation shows that directive-based models can achieve reasonable performance, compared to hand-written GPU codes.

Interactive Program Debugging and Optimization for Directive-Based, Efficient GPU Computing

2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Directive-based GPU programming models are gaining momentum, since they transparently relieve pro... more Directive-based GPU programming models are gaining momentum, since they transparently relieve programmers from dealing with complexity of low-level GPU programming, which often reflects the underlying architecture. However, too much abstraction in directive models puts a significant burden on programmers for debugging applications and tuning performance. In this paper, we propose a directivebased, interactive program debugging and optimization system. This system enables intuitive and synergistic interaction among programmers, compilers, and runtimes for more productive and efficient GPU computing. We have designed and implemented a series of prototype tools within our new open source compiler framework, called Open Accelerator Research Compiler (OpenARC); OpenARC supports the full feature set of OpenACC V1.0. Our evaluation on twelve OpenACC benchmarks demonstrates that our prototype debugging and optimization system can detect a variety of translation errors. Additionally, the optimization provided by our prototype minimizes memory transfers, when compared to a fully manual memory management scheme.

OpenARC: open accelerator research compiler for directive-based, efficient heterogeneous computing

ABSTRACT

OpenMP to GPGPU

ACM SIGPLAN Notices, 2009

GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. ... more GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from NVIDIA offers improved programmability for general computing, programming GPGPUs is still complex and error-prone. This paper presents a compiler framework for automatic source-to-source translation of standard OpenMP applications into CUDA-based GPGPU applications. The goal of this translation is to further improve programmability and make existing OpenMP applications amenable to execution on GPGPUs. In this paper, we have identified several key transformation techniques, which enable efficient GPU global memory access, to achieve high performance. Experimental results from two important kernels (JACOBI and SPMUL) and two NAS OpenMP Parallel Benchmarks (EP and CG) show that the described translator and compile-time optimizations work well on both regular and irregular applications, leading to performance improvements of up to 50X over the unoptimized translation (up to 328X over serial on a CPU).

Puma: Purdue mapreduce benchmarks suite

Quantifying Architectural Requirements of Contemporary Extreme-Scale Scientific Applications

Lecture Notes in Computer Science, 2014

ABSTRACT As detailed in recent reports, HPC architectures will continue to change over the next d... more ABSTRACT As detailed in recent reports, HPC architectures will continue to change over the next decade in an effort to improve energy efficiency, reliability, and performance. At this time of significant disruption, it is critically important to understand specific application requirements, so that these architectural changes can include features that satisfy the requirements of contemporary extreme-scale scientific applications. To address this need, we have developed a methodology supported by a toolkit that allows us to investigate detailed computation, memory, and communication behaviors of applications at varying levels of resolution. Using this methodology, we performed a broad-based, detailed characterization of 12 contemporary scalable scientific applications and benchmarks. Our analysis reveals numerous behaviors that sometimes contradict conventional wisdom about scientific applications. For example, the results reveal that only one of our applications executes more floating-point instructions than other types of instructions. In another example, we found that communication topologies are very regular, even for applications that, at first glance, should be highly irregular. These observations emphasize the necessity of measurement-driven analysis of real applications, and help prioritize features that should be included in future architectures.

Toward compiler-driven adaptive execution and its application to GPU architectures

A major shift in technology from maximizing single-core performance to integrating multiple cores... more A major shift in technology from maximizing single-core performance to integrating multiple cores has introduced a new, heterogeneous arena to high-performance computing communities. Among several new parallel platforms, hardware accelerators, such as General-Purpose Graphics Processing Units (GPGPUs), have emerged as promising alternatives for high-performance computing. While a GPGPU provides an inexpensive, highly parallel system to application developers, its programming complexity poses significant challenges for developers. This dissertation explores compile-time and runtime techniques to improve programmability and to enable adaptive execution of programs in such architectures.^ First, this dissertation examines the possibility of exploiting OpenMP shared memory programming model on stream architectures such as GPGPUs. This dissertation presents a compiler framework for automatic translation and optimization of standard OpenMP applications for executing on GPGPUs.^ Second, th...

OpenMPC: extended OpenMP for efficient programming and tuning on GPUs

International Journal of Computational Science and Engineering, 2013

General-purpose graphics processing units (GPGPUs) provide inexpensive, high performance platform... more General-purpose graphics processing units (GPGPUs) provide inexpensive, high performance platforms for compute-intensive applications. However, their programming complexity poses a significant challenge to developers. Even though the compute unified device architecture (CUDA) programming model offers better abstraction, developing efficient GPGPU code is still complex and error-prone. This paper proposes a directive-based, high-level programming model, called OpenMPC, which addresses both programmability and tunability issues on GPGPUs. We have developed a fully automatic compilation and user-assisted tuning system supporting OpenMPC. In addition to a range of compiler transformations and optimisations, the system includes tuning capabilities for generating, pruning, and navigating the search space of compilation variants. Evaluation using 14 applications shows that our system achieves 75% of the performance of the hand-coded CUDA programmes (92% if excluding one exceptional case).

Enhanced expression of bovine growth hormone gene by different culture conditions in Escherichia coli

Biotechnology letters, 1997

Moving Heterogeneous GPU Computing into the Mainstream with Directive-Based, High-Level Programming Models (Position Paper)

ABSTRACT