Papers by Piotr Dziurzanski
Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation Methods and Tools - RAPIDO '16, 2016
International Workshop on Logic & Synthesis, 2002
The Word-level Decision Diagram,(WDD) technique has not been much,investigated upon condition of ... more The Word-level Decision Diagram,(WDD) technique has not been much,investigated upon condition of linear- ity. We study the boundary case of the WDD, Linear WDD (LDD) and show,that an arbitraryl-level combinational network can be represented byl LDDs planar by their na- ture. We contribute to the understanding,of WDD models that so far have been shown to be linear just for
In this paper, there is a preliminary description of a system under development for translating c... more In this paper, there is a preliminary description of a system under development for translating codes written in ANSI C into behavioral SystemC codes. The limitation of the translable structures of ANSI C are described and implementation details are stressed.
Lecture Notes in Computer Science, 2003
We propose a novel approach to transform an arbitrary Mealy machine, which is a kind of Finite St... more We propose a novel approach to transform an arbitrary Mealy machine, which is a kind of Finite State Machine (FSM) with outputs, into so-called Linear Binary Moment Diagrams (LBMDs). We stress the attractive features of this approach, and demonstrate the results of experiments on benchmarks in comparison with a state-of-the art Reduced Ordered Binary Decision Diagrams technique.
Linearization and planarization of the circuit models is pivotal to the submicron technologies. O... more Linearization and planarization of the circuit models is pivotal to the submicron technologies. On the other hand, the characteristics of the VLSI circuits can be sometimes improved by using the multivalued components. It was shown that any -level circuit based on the multivalued components is representable as an algebraic model based on linear arithmetic polynomials mapped correspondingly into decision diagrams that are linear and planar by nature. Complexity of representing a circuit as the linear decision diagram was estimated as O(G) with G for the number of multivalued components in the circuit. The results of testing the LinearDesignMV algorithm on circuits of more than 8000
Proceedings 31st IEEE International Symposium on Multiple-Valued Logic, 2001
We propose an approach to exact detection of symmetries in multiple-valued logic (MVL) functions ... more We propose an approach to exact detection of symmetries in multiple-valued logic (MVL) functions based on two-stage strategy. First, we reduce the search space by using information measures and then apply an exact method to find symmetry. The efficiency of the approach is evaluated by experimental study.
2006 IEEE Design and Diagnostics of Electronic Circuits and systems, 2000
In this paper, we describe a system for transforming a code given in ANSI C into an equivalent Sy... more In this paper, we describe a system for transforming a code given in ANSI C into an equivalent SystemC description. In order to synthesize parallel C codes into hardware, we applied the directives of OpenMP, a de-facto standard that specifies portable implementations of shared memory parallel programs. The proposed design flow utilizing this system is described and its implementation details are provided.
Lecture Notes in Computer Science, 2004
Possibilities of synthesizing parallel C/C++ codes into hardware are presented provided that the ... more Possibilities of synthesizing parallel C/C++ codes into hardware are presented provided that the code parallelism is represented by means of the directives of OpenMP, a de-facto standard that specifies portable implementation of shared memory parallel programs. The limitations of the hardware realizations of OpenMP directives are described and implementation details are stressed.
Proceedings of the 23rd International Conference on Real Time and Networks Systems - RTNS '15, 2015
2015 International Conference on High Performance Computing & Simulation (HPCS), 2015
2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015
Lecture Notes in Computer Science, 2009
An approach for lossless and near-lossless compression of still images together with its system-l... more An approach for lossless and near-lossless compression of still images together with its system-level multi-core hardware model utilizing blending-prediction-based technique is presented in this paper. We provide a mathematical background of the proposed approach and utilize a Network on Chip type of connection in the hardware model which benefits from a new multi-path routing algorithm and heuristic algorithms for core
Lecture Notes in Computer Science, 2008
A novel technique for balancing streams of data transferred in every cycle in the wormhole routin... more A novel technique for balancing streams of data transferred in every cycle in the wormhole routing dedicated for Networks on Chip architectures is presented in this work. The influence of the traditional and the proposed techniques over the total network flow is computed for popular multimedia stream-based algorithms. The experimental results confirming the proposed approach are provided.
Studies in Computational Intelligence, 2014
2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2014
ABSTRACT This paper presents early exploration of the feedback admission control for high-perform... more ABSTRACT This paper presents early exploration of the feedback admission control for high-performance computing clusters executing real-time tasks using controlled values to dynamic task allocation. A number of controller variants with different architectures and relying on various metrics have been proposed. Simulation models of both open- and closed-loop systems have been prepared and compared. The obtained experimental results show that the proposed approach leads to executing almost five times more tasks before their deadlines in case of periodic uniform workload, and about 16% more for bursty workloads with large computation time variance.
4th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services. TELSIKS'99 (Cat. No.99EX365), 1999
Lecture Notes in Computer Science, 2011
In this paper, a multi-path routing algorithm dedicated to Network on Chip (NoC) together with it... more In this paper, a multi-path routing algorithm dedicated to Network on Chip (NoC) together with its implementation are presented. The proposed algorithm is based on the Ford-Fulkerson method and is aimed at data-dominated streaming multimedia applications ...
XXII Annual Pacific Voice Conference (PVC), 2014
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Papers by Piotr Dziurzanski