2010 First IEEE Latin American Symposium on Circuits and Systems (LASCAS)
... Differential OTAs with SC-CMFB Carlos D. Bula and Manuel Jiménez Electrical and Computer Engi... more ... Differential OTAs with SC-CMFB Carlos D. Bula and Manuel Jiménez Electrical and Computer Engineering Department University of Puerto Rico, Mayagüez Campus Mayagüez, PR 00681 e-mail:{carlos.bula, mjimenez}@ece.uprm.edu ...
As a School Psychologist professor working in the Teacher Preparation Program (TPP) since the yea... more As a School Psychologist professor working in the Teacher Preparation Program (TPP) since the year 2000, Dr. Bellido has taught the following courses: Human Development, Educational Psychology, Learning Evaluation; Theory and Methodology in the Teaching of History and Social Sciences; and Student Teaching of Mathematics and of Social Studies in Secondary School among others. As a collaborator in the Psychology Department, she teaches Introduction courses to School Psychology, Fundamentals of Psychology, and the grad course of Learning and Cognition. As the Institutional Coordinator for the University of Puerto Rico at Mayagüez (UPRM) accreditation under the Council for the Accreditation of Educator Preparation (CAEP), she directs, coordinates, and work in various committees that must complete evaluation cycles to assess the quality of the unit, the programs, teacher candidates, and alumni impact of the TPP. These evaluation cycles require a diverse toolkit of instruments, educational materials, and protocols to collect and analyze usable and useful data for monitoring and improving the TPP. Efficient and effective collection, analysis, and presentation of results to stakeholders are important parts of the work done for the TPP evaluation cycles. As the UPRM Center for Professional Enrichment coordinator for 12 years, Dr. Bellido was in charge of organizing faculty professional development activities. This placed her in an advantageous position to disseminate vanguard information about education, evaluation theory, and practice which can be useful for both teaching and research faculty. As the UPRM Resource Center for Education Research and Services Center (CRUISE) coordinator since 2002, she has directed and or evaluated more than twenty educational research, professional development, and outreach projects from 2002 to 2020. These educational research and service projects include higher-education ecosystems for retention and graduation of STEM scholars, project-based learning instruction, classroom action research, professional and virtual learning communities, creating online educational materials, professional development and training for pre-service and in-service teachers, professional development for higher education faculty and a major Math and Science Partnership project. CRUISE has also worked with projects serving k-20 students directly. All these projects share common themes of the creation of curricular materials and applying the latest educational research to improve the teaching-learning dynamics giving Dr. Bellido extensive experience using evaluation to improve learning strategies from primary to graduate school.
2020 IEEE Frontiers in Education Conference (FIE), 2020
This Research to Practice Full Paper presents how modular design techniques aided by an Outcome-B... more This Research to Practice Full Paper presents how modular design techniques aided by an Outcome-Based educational framework, can be incorporated in an Embedded Systems Design laboratory to improve student learning. Teaching embedded systems design concepts and enhancing students’ skills in this area are important tasks for universities in order to provide an up to date education. To achieve this, the laboratory objective, content, pedagogical methods, and assessment activities were aligned using an Outcome-Based educational framework to ensure proper student learning. The modular approach was applied to pedagogical methods through the design of a set of progressive laboratory experiments and six electronic educational modules. Using this approach effective laboratory experiments that promoted better student learning, in the area of embedded systems design, were developed. As a result, the overall laboratory student performance was improved and therefore the proposed methodology was ...
His current teaching and research interests include design, characterization, and rapid prototypi... more His current teaching and research interests include design, characterization, and rapid prototyping of information processing systems, embedded cyber-physical systems, and engineering education. He is the lead author of the textbook Introduction to Embedded Systems: Using Microcontrollers and the MSP430 (Springer 2014). From 2013 to 2018 served as Associate Dean of engineering at UPRM. He currently directs the Engineering PEARLS program at UPRM, a College-wide NSF funded initiative, and coordinates the Rapid Systems Prototyping and the Electronic Testing and Characterization Laboratories at UPRM. He is a member of ASEE and IEEE.
Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)
A placement methodology for power optimizing macro block-based VLSI layouts is presented. This te... more A placement methodology for power optimizing macro block-based VLSI layouts is presented. This technique uses simulated annealing to target solutions with reduced switched capacitance. Its implementation is shown to be consistent and capable of producing competitive layouts whose quality is maintained when problem sizes are scaled up. The results obtained on a set of MCNC benchmarks indicate that power reductions
1998 Midwest Symposium on Circuits and Systems (Cat. No. 98CB36268)
Two heuristics are proposed for the rectilinear Steiner-minimum tree (SMT) problem arising when i... more Two heuristics are proposed for the rectilinear Steiner-minimum tree (SMT) problem arising when interconnecting multiple terminals in a layout with obstacles. Efficient algorithms are implemented to convert circuit layouts into graphs. A set of reduction techniques are implemented to remove unfeasible vertices. These techniques delete an average of over 90% of the m Steiner candidates in O(m/sup 2/) time. The proposed SMT heuristics grow trees biased by the terminal distances of the n vertices in a graph in O(n/sup 2/.log n) time. The results obtained highlight their suitability to be used as wire length estimators in a power optimizing placement tool.
2005 6th International Conference on Information Technology Based Higher Education and Training, 2005
Undergraduate research has long been recognized as one of the pillars of a well rounded education... more Undergraduate research has long been recognized as one of the pillars of a well rounded education in engineering disciplines. One factor that has however received little attention in undergraduate research is the increasingly supporting role played by information technology in the form of computer-aided design and modeling tools (CAD/CAM) in the overall experience of students. This paper analyzes the authors' experiences in engaging undergraduate students in CAD related research activities in the ECE Department of the UPRM, working in diverse projects spanning from fundamental to applied research. The analysis provides a framework for outlining successful and not so successful practices with undergraduates in these types of activities, including guidelines to increase the likelihood of providing students a meaningful experience through CAD related undergraduate research.
2003 46th Midwest Symposium on Circuits and Systems
Extensions allowing the Integer Pair Representation (IPR) format to work with multiple-output bin... more Extensions allowing the Integer Pair Representation (IPR) format to work with multiple-output binary valued expressions are presented. The structure and semantics of the new format, IPR-M, are discussed as well as algorithms to aid in using this format for the representation and minimization of Boolean functions.
48th Midwest Symposium on Circuits and Systems, 2005., 2005
Partitioning is an essential step in the implementation of algorithms to distributed hardware arc... more Partitioning is an essential step in the implementation of algorithms to distributed hardware architectures (DHAs) such as multi-FPGA boards. While numerous approaches working at the structural level have been reported, techniques targeted at higher levels are less common. Moreover, when dealing with discrete signal transforms (DSTs), formulation-level partitioners for DHAs have been largely neglected. In this paper, we introduce a first approach towards a functionally-aware methodology that could provide improved results for the high-level partitioning of DSTs to DHAs. Our methodology has been devised through the study of DST partitioning techniques for DHA-similar systems, as well as general DST formulation techniques. An assessment performed on discrete Fourier transforms has achieved as much as 35% in latency reduction when compared to other general, high-level partitioning schemes.
2015 16th Latin-American Test Symposium (LATS), 2015
Charge pumping techniques are used to characterize and quantify the interface state densities in ... more Charge pumping techniques are used to characterize and quantify the interface state densities in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET). When carried in a semiconductor production line, this technique needs to be time efficient, calling for automated testing environments. Moreover, the cost of the characterization equipment used in the test is always a factor of relevance for budget conscious operation. In this paper we present the design of an automated Virtual Instrumentation Environment (VIE) for performing charge pumping characterization using low cost, off-the-shelf instrumentation. A discussion is presented of tradeoffs and design considerations for obtaining a functional design without compromising test flexibility and accuracy.
2013 IEEE Frontiers in Education Conference (FIE), 2013
This paper describes a project experience in a microprocessor interfacing course, where computer ... more This paper describes a project experience in a microprocessor interfacing course, where computer engineering (CE) and electrical engineering (EE) students were joined to develop a project designing and implementing a Digital Controller for a Three Degree of Freedom Helicopter (3DOFH). This is a highly non-linear problem brought in by the EE students from the Process Instrumentation and Control Laboratory (PICL). Besides serving as the course project for the students, the motivation for taking such a project was to create a base platform using embedded microprocessors where control students could acquire signal conditioning and embedded software design skills in a more realistic platform than that provided by virtual instrument environments. This paper describes the course setting, design approach, and experience gained by the students, establishing a collaboration modality that could be emulated to bring multidisciplinary projects into traditional courses.
Proceedings of the Fifth IEEE International Caracas Conference on Devices, Circuits and Systems, 2004.
This paper presents the design of a low voltage, low dropout (LDO) regulator with two different o... more This paper presents the design of a low voltage, low dropout (LDO) regulator with two different output voltages (1V or 1.8V). The basic function of an LDO is to optimize the battery life of portable devices and to provide a constant output voltage to drive small sub-circuits. The proposed LDO was designed using 0.35μm CMOS technology. The design is able
2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), 2012
Accurate measurement of reverse recovery parameters (RRPs) in high-speed, high-power switches and... more Accurate measurement of reverse recovery parameters (RRPs) in high-speed, high-power switches and rectifiers is a fundamental task in their test and characterization process. Performing such tests at a wafer-level in laterally diffused MOSFETs (LDMOS) presents several challenges with respect to their test in packaged devices. The handling of prober parasitic impedances, current injection constraints, and automated signal synchronization top the list of issues that need to be addressed. Moreover, making the tests amenable for automated execution just adds more constraints to the problem. This paper proposes a solution for automatic characterization of wafer-level LDMOS RRPs that include reverse recovery time (trr), reverse recovery current (Irr), and storage charge (Qrr). Its implementation has enabled accurate automated parametric wafer-level LDMOS tests at currents as high as 15A and ∂I/∂t's of up to 173A/μs.
2007 37th annual frontiers in education conference - global engineering: knowledge without borders, opportunities without passports, 2007
Abstract The Accreditation Board for Engineering and Technology (ABET) defines a capstone design ... more Abstract The Accreditation Board for Engineering and Technology (ABET) defines a capstone design course as an integrating experience that draws together diverse elements of the curriculum and develops student competence by focusing both technical and non-...
The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002.
Abstract The design of a 1.8 V LVDS receiver operating at a maximum speed of 700Mbits/sec is pres... more Abstract The design of a 1.8 V LVDS receiver operating at a maximum speed of 700Mbits/sec is presented. The receiver is designed to accept LVDS signals from 3.3 V, 2.5 V, or 1.8 V systems and converts it to a 1.8 V digital data. The design was completed on a ...
Embedded systems interact with the outer real world processing information received from it and d... more Embedded systems interact with the outer real world processing information received from it and delivering back an output to modify the performance of a device or to provide information needed to make decisions. In this environment, most signals to be processed are analog. Temperature is not simply hot or cold, pressure high or low, light intensity bright or dark. They all fall within a wide range of possible values. Hence, it becomes necessary to interface this analog world with our digital embedded systems.
2010 First IEEE Latin American Symposium on Circuits and Systems (LASCAS)
... Differential OTAs with SC-CMFB Carlos D. Bula and Manuel Jiménez Electrical and Computer Engi... more ... Differential OTAs with SC-CMFB Carlos D. Bula and Manuel Jiménez Electrical and Computer Engineering Department University of Puerto Rico, Mayagüez Campus Mayagüez, PR 00681 e-mail:{carlos.bula, mjimenez}@ece.uprm.edu ...
As a School Psychologist professor working in the Teacher Preparation Program (TPP) since the yea... more As a School Psychologist professor working in the Teacher Preparation Program (TPP) since the year 2000, Dr. Bellido has taught the following courses: Human Development, Educational Psychology, Learning Evaluation; Theory and Methodology in the Teaching of History and Social Sciences; and Student Teaching of Mathematics and of Social Studies in Secondary School among others. As a collaborator in the Psychology Department, she teaches Introduction courses to School Psychology, Fundamentals of Psychology, and the grad course of Learning and Cognition. As the Institutional Coordinator for the University of Puerto Rico at Mayagüez (UPRM) accreditation under the Council for the Accreditation of Educator Preparation (CAEP), she directs, coordinates, and work in various committees that must complete evaluation cycles to assess the quality of the unit, the programs, teacher candidates, and alumni impact of the TPP. These evaluation cycles require a diverse toolkit of instruments, educational materials, and protocols to collect and analyze usable and useful data for monitoring and improving the TPP. Efficient and effective collection, analysis, and presentation of results to stakeholders are important parts of the work done for the TPP evaluation cycles. As the UPRM Center for Professional Enrichment coordinator for 12 years, Dr. Bellido was in charge of organizing faculty professional development activities. This placed her in an advantageous position to disseminate vanguard information about education, evaluation theory, and practice which can be useful for both teaching and research faculty. As the UPRM Resource Center for Education Research and Services Center (CRUISE) coordinator since 2002, she has directed and or evaluated more than twenty educational research, professional development, and outreach projects from 2002 to 2020. These educational research and service projects include higher-education ecosystems for retention and graduation of STEM scholars, project-based learning instruction, classroom action research, professional and virtual learning communities, creating online educational materials, professional development and training for pre-service and in-service teachers, professional development for higher education faculty and a major Math and Science Partnership project. CRUISE has also worked with projects serving k-20 students directly. All these projects share common themes of the creation of curricular materials and applying the latest educational research to improve the teaching-learning dynamics giving Dr. Bellido extensive experience using evaluation to improve learning strategies from primary to graduate school.
2020 IEEE Frontiers in Education Conference (FIE), 2020
This Research to Practice Full Paper presents how modular design techniques aided by an Outcome-B... more This Research to Practice Full Paper presents how modular design techniques aided by an Outcome-Based educational framework, can be incorporated in an Embedded Systems Design laboratory to improve student learning. Teaching embedded systems design concepts and enhancing students’ skills in this area are important tasks for universities in order to provide an up to date education. To achieve this, the laboratory objective, content, pedagogical methods, and assessment activities were aligned using an Outcome-Based educational framework to ensure proper student learning. The modular approach was applied to pedagogical methods through the design of a set of progressive laboratory experiments and six electronic educational modules. Using this approach effective laboratory experiments that promoted better student learning, in the area of embedded systems design, were developed. As a result, the overall laboratory student performance was improved and therefore the proposed methodology was ...
His current teaching and research interests include design, characterization, and rapid prototypi... more His current teaching and research interests include design, characterization, and rapid prototyping of information processing systems, embedded cyber-physical systems, and engineering education. He is the lead author of the textbook Introduction to Embedded Systems: Using Microcontrollers and the MSP430 (Springer 2014). From 2013 to 2018 served as Associate Dean of engineering at UPRM. He currently directs the Engineering PEARLS program at UPRM, a College-wide NSF funded initiative, and coordinates the Rapid Systems Prototyping and the Electronic Testing and Characterization Laboratories at UPRM. He is a member of ASEE and IEEE.
Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)
A placement methodology for power optimizing macro block-based VLSI layouts is presented. This te... more A placement methodology for power optimizing macro block-based VLSI layouts is presented. This technique uses simulated annealing to target solutions with reduced switched capacitance. Its implementation is shown to be consistent and capable of producing competitive layouts whose quality is maintained when problem sizes are scaled up. The results obtained on a set of MCNC benchmarks indicate that power reductions
1998 Midwest Symposium on Circuits and Systems (Cat. No. 98CB36268)
Two heuristics are proposed for the rectilinear Steiner-minimum tree (SMT) problem arising when i... more Two heuristics are proposed for the rectilinear Steiner-minimum tree (SMT) problem arising when interconnecting multiple terminals in a layout with obstacles. Efficient algorithms are implemented to convert circuit layouts into graphs. A set of reduction techniques are implemented to remove unfeasible vertices. These techniques delete an average of over 90% of the m Steiner candidates in O(m/sup 2/) time. The proposed SMT heuristics grow trees biased by the terminal distances of the n vertices in a graph in O(n/sup 2/.log n) time. The results obtained highlight their suitability to be used as wire length estimators in a power optimizing placement tool.
2005 6th International Conference on Information Technology Based Higher Education and Training, 2005
Undergraduate research has long been recognized as one of the pillars of a well rounded education... more Undergraduate research has long been recognized as one of the pillars of a well rounded education in engineering disciplines. One factor that has however received little attention in undergraduate research is the increasingly supporting role played by information technology in the form of computer-aided design and modeling tools (CAD/CAM) in the overall experience of students. This paper analyzes the authors' experiences in engaging undergraduate students in CAD related research activities in the ECE Department of the UPRM, working in diverse projects spanning from fundamental to applied research. The analysis provides a framework for outlining successful and not so successful practices with undergraduates in these types of activities, including guidelines to increase the likelihood of providing students a meaningful experience through CAD related undergraduate research.
2003 46th Midwest Symposium on Circuits and Systems
Extensions allowing the Integer Pair Representation (IPR) format to work with multiple-output bin... more Extensions allowing the Integer Pair Representation (IPR) format to work with multiple-output binary valued expressions are presented. The structure and semantics of the new format, IPR-M, are discussed as well as algorithms to aid in using this format for the representation and minimization of Boolean functions.
48th Midwest Symposium on Circuits and Systems, 2005., 2005
Partitioning is an essential step in the implementation of algorithms to distributed hardware arc... more Partitioning is an essential step in the implementation of algorithms to distributed hardware architectures (DHAs) such as multi-FPGA boards. While numerous approaches working at the structural level have been reported, techniques targeted at higher levels are less common. Moreover, when dealing with discrete signal transforms (DSTs), formulation-level partitioners for DHAs have been largely neglected. In this paper, we introduce a first approach towards a functionally-aware methodology that could provide improved results for the high-level partitioning of DSTs to DHAs. Our methodology has been devised through the study of DST partitioning techniques for DHA-similar systems, as well as general DST formulation techniques. An assessment performed on discrete Fourier transforms has achieved as much as 35% in latency reduction when compared to other general, high-level partitioning schemes.
2015 16th Latin-American Test Symposium (LATS), 2015
Charge pumping techniques are used to characterize and quantify the interface state densities in ... more Charge pumping techniques are used to characterize and quantify the interface state densities in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET). When carried in a semiconductor production line, this technique needs to be time efficient, calling for automated testing environments. Moreover, the cost of the characterization equipment used in the test is always a factor of relevance for budget conscious operation. In this paper we present the design of an automated Virtual Instrumentation Environment (VIE) for performing charge pumping characterization using low cost, off-the-shelf instrumentation. A discussion is presented of tradeoffs and design considerations for obtaining a functional design without compromising test flexibility and accuracy.
2013 IEEE Frontiers in Education Conference (FIE), 2013
This paper describes a project experience in a microprocessor interfacing course, where computer ... more This paper describes a project experience in a microprocessor interfacing course, where computer engineering (CE) and electrical engineering (EE) students were joined to develop a project designing and implementing a Digital Controller for a Three Degree of Freedom Helicopter (3DOFH). This is a highly non-linear problem brought in by the EE students from the Process Instrumentation and Control Laboratory (PICL). Besides serving as the course project for the students, the motivation for taking such a project was to create a base platform using embedded microprocessors where control students could acquire signal conditioning and embedded software design skills in a more realistic platform than that provided by virtual instrument environments. This paper describes the course setting, design approach, and experience gained by the students, establishing a collaboration modality that could be emulated to bring multidisciplinary projects into traditional courses.
Proceedings of the Fifth IEEE International Caracas Conference on Devices, Circuits and Systems, 2004.
This paper presents the design of a low voltage, low dropout (LDO) regulator with two different o... more This paper presents the design of a low voltage, low dropout (LDO) regulator with two different output voltages (1V or 1.8V). The basic function of an LDO is to optimize the battery life of portable devices and to provide a constant output voltage to drive small sub-circuits. The proposed LDO was designed using 0.35μm CMOS technology. The design is able
2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), 2012
Accurate measurement of reverse recovery parameters (RRPs) in high-speed, high-power switches and... more Accurate measurement of reverse recovery parameters (RRPs) in high-speed, high-power switches and rectifiers is a fundamental task in their test and characterization process. Performing such tests at a wafer-level in laterally diffused MOSFETs (LDMOS) presents several challenges with respect to their test in packaged devices. The handling of prober parasitic impedances, current injection constraints, and automated signal synchronization top the list of issues that need to be addressed. Moreover, making the tests amenable for automated execution just adds more constraints to the problem. This paper proposes a solution for automatic characterization of wafer-level LDMOS RRPs that include reverse recovery time (trr), reverse recovery current (Irr), and storage charge (Qrr). Its implementation has enabled accurate automated parametric wafer-level LDMOS tests at currents as high as 15A and ∂I/∂t's of up to 173A/μs.
2007 37th annual frontiers in education conference - global engineering: knowledge without borders, opportunities without passports, 2007
Abstract The Accreditation Board for Engineering and Technology (ABET) defines a capstone design ... more Abstract The Accreditation Board for Engineering and Technology (ABET) defines a capstone design course as an integrating experience that draws together diverse elements of the curriculum and develops student competence by focusing both technical and non-...
The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002.
Abstract The design of a 1.8 V LVDS receiver operating at a maximum speed of 700Mbits/sec is pres... more Abstract The design of a 1.8 V LVDS receiver operating at a maximum speed of 700Mbits/sec is presented. The receiver is designed to accept LVDS signals from 3.3 V, 2.5 V, or 1.8 V systems and converts it to a 1.8 V digital data. The design was completed on a ...
Embedded systems interact with the outer real world processing information received from it and d... more Embedded systems interact with the outer real world processing information received from it and delivering back an output to modify the performance of a device or to provide information needed to make decisions. In this environment, most signals to be processed are analog. Temperature is not simply hot or cold, pressure high or low, light intensity bright or dark. They all fall within a wide range of possible values. Hence, it becomes necessary to interface this analog world with our digital embedded systems.
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