rv32imc

Here are 4 public repositories matching this topic...

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

core riscv rtl ip verilog risc-v rv32i rv32e rv32imc rv32emc

KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi

asic cpu fpga processor llvm verification clang riscv rtl verilog computer-architecture pipeline-processor in-order risc-v coremark rv32imc teknofest openlane

Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice

fpga forth risc-v rv32i j1-cpu de10nano rv32 rv32im rv32imc ulx3s fomu

Implementation of the RISC-V 32 bit Integer and Compressed Instructions in Verilog.

cpu verilog risc hdl pipeline-processor verilog-hdl risc-v rv32i verilog-snippets pipeline-cpu risc-processor riscv32 riscv-simulator rv32imc verilog-code riscv32im

Add a description, image, and links to the rv32imc topic page so that developers can more easily learn about it.

To associate your repository with the rv32imc topic, visit your repo's landing page and select "manage topics."