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0 votes
3 answers
99 views

Doubts about the format of 4-layer PCB

I am currently working on improving and correcting the hardware design of two of my company's products. One is a small board measuring 55.499 x 31.369 mm, based on an ESP32-PICO D4() and an STM32G070, ...
DACAttack's user avatar
1 vote
1 answer
71 views

Can I trust Altium Designer Impedance Calculator over my PCB Fab?

Hello hardware people, I'm working on 6-layer boards with impedance control. I usually follow the standard stackup suggested by my PCB fabricator. I am creating impedance traces for LVDS of 100 Ohm. ...
Monesh Rathod's user avatar
0 votes
1 answer
55 views

What is a valid 4-layer stackup for a power mosfet driver board?

I'm creating a device intended to be used to test power circuit topologies without the need to create the auxiliary gate driver circuitry. This is accomplished by the mosfets gate being driven by a ...
MXVG's user avatar
  • 190
0 votes
3 answers
78 views

Multi-Layer PCB Stack-Up Order and LVDS Signal Routing

I'm working on a multi-layer PCB design that includes Top and Bottom layers, as well as internal layers for GND, VCCs, and signal routing. I'm uncertain about the proper stack-up order for these ...
Daniel's user avatar
  • 941
0 votes
0 answers
58 views

Tin "lagoon" on PCB - possible solder mask removal?

I was desoldering the PCB of a SATA connector and I got it off just fine. I happened to go over the solder and in some parts of the PCB, it looks like the solder mask has come off. There are no raised ...
condor12's user avatar
  • 145
9 votes
3 answers
966 views

Power line crossing data lines via the ground plane

Sorry if this is a stupid questions. I have searched this and have not found a direct answer. I am designing a Stm32 based board, mainly referencing this video: https://www.youtube.com/watch?v=...
Newbi_EE's user avatar
  • 115
1 vote
1 answer
88 views

Need recommendations on my PCB

I’m designing my first 4-layer PCB for a 2-cell battery monitoring system using the BQ40Z50 BMS chip. According to the datasheet, it’s recommended to create two separate grounds: one for the fuel ...
Shamurov's user avatar
  • 301
0 votes
1 answer
52 views

Connecting an IC Power Pin to the Power Plane via Vias

In my design, I have a dedicated power plane. I’m wondering whether I should connect the power pin of the IC directly to the power plane polygon or use thermal relief. Considering it is connected to ...
Andromeda's user avatar
  • 1,144
0 votes
1 answer
129 views

Please Review my PCB stackup

I am developing an AM6442 SOM. This is PCB layer stackup This my layer assignments: L1: Signals - Low Speed (UART, QEP, PWM, DeltaSigma ADC, GPIO, JTAG) L2: Ground Plane L3: Signals - HighSpeed ...
Bubu's user avatar
  • 509
1 vote
1 answer
89 views

Remove Unused Pad/ Via

I want to make remove unused pad/via at inner layer in order to increase area. But I wonder that does it cause problems in terms of IPC Class-III or PCB manufacturing?
123's user avatar
  • 11
0 votes
0 answers
34 views

PCB Power and Ground planes Setup [duplicate]

When designing a 2-layer PCB, I've read that ground planes are good to reduce noise and to provide a stable-ish ground reference when a board isn't connected to a chassis, ground etc. If I need to ...
Steam Ranger's user avatar
1 vote
3 answers
125 views

Different layer schemes for 4-layer PCBs

I've been working on a hobby project and I recently joined a Discord server of others doing similar projects. One of them mentioned they'd made a 4-layer PCB layered together as Signal Ground Ground ...
Anonymaton's user avatar
2 votes
2 answers
155 views

Is it possible to trace a via on a multilayer PCB board without the schematic diagram?

I have a copper trace on a PCB board, but it terminates in an annular ring. My question is, can I trace the path of the trace? I need to determine if it is connected to ground. Thank you in advance. ...
condor12's user avatar
  • 145
0 votes
0 answers
53 views

Frequency limit for routing <32MHz digital signals adjacent to one another on different layers, 4 layer PCB

I'm running an 3.3V SPI device with an SPI clock frequency rated up to 10 MHz, with some additional digital outputs/inputs to/from a microcontroller that is clocked at 32 MHz. Due to some space ...
plu's user avatar
  • 713
0 votes
4 answers
235 views

PCB design: How small can vias be made?

Working with very limited space (In Altium) and need to place vias to make routes between the red solder castellation plates on the top layer to the respective connector pins on the bottom layer, both ...
eutectic_codswallop's user avatar
0 votes
1 answer
203 views

PCB design - Routing without a schematic

I am using Altium CircuitMaker to design a PCB. I'm wondering if there's a way to make my PCB design without a schematic. My idea is to simply make a PCB with just pads and populate it myself with the ...
Vagabond4761's user avatar
0 votes
0 answers
369 views

Keysight ADS layout error "port pin not connected to conductive part of design"

I just designed a distributed element BPF using ADS and now I'm trying to put it into the layout to do an EM simulation. I created my distributed circuit using the dimensions of my components, then ...
TheBelgianWaffl _ Gaming's user avatar
1 vote
1 answer
128 views

Ghost line/barrier showing in Altium deginer

I am having a problem where there's an area (line) that appears only while running traces and on the draftsman document. the ghost line/region does not show up on any of the layers, I toggled all the ...
queTak's user avatar
  • 21
0 votes
2 answers
552 views

Altium: Exclude entire layer from Clearance Rule

I'm designing a PCB in Altium Designer. I've defined Clearance Rules for certain nets. When I run the DRC (Design Rule Check) I get errors that the Clearance between the Keepout and the Pad doesn't ...
codeofandrin's user avatar
4 votes
5 answers
2k views

Is there any disadvantage in making a ground plane and a power plane in a 4 layer PCB?

I have read a lot of posts, forums, and application notes about why it's a bad idea to separate ground or power in mixed analog and digital circuits, so I've made a 4 layer PCB with full GND and VCC ...
santiago deliotte's user avatar
0 votes
2 answers
905 views

How does a copper pour work in Kicad?

In my project, I have a label in the schematic as Vcc. When I created my backside copper pour in PCBnew, I gave it the Vcc net. Thus, when joining a Vcc pad on the frontside layer, via a via to the ...
user1584421's user avatar
  • 1,399
0 votes
3 answers
227 views

Kicad PCB Layout: Nets not visible in different layers

I am trying to do a copper pour on one of the layers on my PCB and for some reason, the nets are not visible to any other layer except the top layer. I have tried to do a copper pour on the top layer ...
Bilal Afzal's user avatar
2 votes
0 answers
260 views

Adding a Chassis Ground at the Midpoint of a PCB

The PCB I designed is 6-layer. I will create a chassis ground in the form of a frame surrounding the mounting holes and add a Y capacitor between and to the signal GND. And I will surround this ...
Electronx's user avatar
  • 772
0 votes
4 answers
654 views

How to correctly design ground planes simple circuit PCB's?

I'm a little new to PCB design and could use some help figuring out the best way to make this very simply PCB that I plan to connect to the back of a custom led light sign that I'm making. The circuit ...
KidWithComputer's user avatar
1 vote
0 answers
102 views

PCB Review (ATmega32U4 + Bosch BNO055 IMU sensor)

So I'm very new to PCB design and would like to get feedback on the layout I've done. I've attached the layers for the board which is a 4-layer stack-up. I'm working with some space constraints too so ...
Yeo's user avatar
  • 23
1 vote
1 answer
252 views

Drilled vs micro vias

I understand there are regular PTH vias drilled once all layers are stacked together then plated (e.g. the Thru 1:9 via on the left of the image below) There are also Blind vias which are drilled into ...
MRB's user avatar
  • 421
0 votes
1 answer
92 views

Altium hatched polygon not covering whole PCB on one layer

I have a two layer PCB on which I want to use hatched polygons on top and bottom layers. For some reason the hatched GND polygon on the bottom layer is not covering the whole layer. PCB Layout Bottom ...
Lyoner's user avatar
  • 339
0 votes
1 answer
54 views

3V3 polygon has a GND vias layer in it

So i dumbly overlooked an error before sending the PCB into production. So my question here is, is there a chance to fix this manually once i get the PCB or is contacting manufacturer is the only ...
narusik's user avatar
  • 13
0 votes
2 answers
75 views

How to change close spacing in a PCB?

I am designing a board with an STM32F103C8T6 processor. I watched some videos by PhilsLab to learn how to work with KiCad. After I watched some more videos to learn how to make my board look more ...
Y-E-Quit's user avatar
  • 121
2 votes
2 answers
826 views

6 layer PCB stack up and routing strategy

I have a couple of questions about the stack up and routing strategy in a 6 layer PCB. I'm in the situation where all the important chips are on the top layer, so all the important tracks start and ...
Federico Massimi's user avatar
2 votes
1 answer
342 views

What should be the recommended PCB thickness for a circuit involving mains voltage, with 4 layers?

The PCB manufacturer has asked if they can use thickness of 1.6mm, but my total stack-up thickness is 1.8mm. This is the current stack up What additional considerations should I take into account to ...
S_D's user avatar
  • 89
1 vote
2 answers
1k views

Altium Designer - Polygon pour clearance across all layers in multi-layer PCB

I'm using Altium Designer to design a 4-layer PCB. In the power supply region (230 VAC power lines to an AC-DC converter), I'm routing exclusively on the bottom layer, and have added a rule to ...
Costas Vlachos's user avatar
0 votes
1 answer
235 views

Does separating DGND and AGND with two different layers for each make any sense?

In my last question I found out that having two different layers for Ground and Analog Ground may induce capacitive coupling. Now I want to ask more generally if the idea I had is worse than ...
Cem Pamir Bana's user avatar
1 vote
1 answer
221 views

Tracing to see if IC is TM1650 or something else

I am tying to determine where the PCB traces are going in order to figure out if this is using the TM1650 or something else. Most of these (this is from a pool pump) uses the TM1650 but there are some ...
StealthRT's user avatar
  • 805
2 votes
1 answer
110 views

PCB copper edge for delivering power

I want to tell a PCB manufacturer to create copper edges for the PCB that should pass power from USB Type-C connector that is connected to USB PD charger: This power module will be soldered to ...
Firas Abd El Gani's user avatar
1 vote
2 answers
618 views

Ten-layer PCB stackup power planes referencing each other

I am learning about PCB stackup from this video. It describes a 10-layer stackup as shown below. Layer 5 and layer 6 are power planes. The author says to prevent power planes referencing each other, ...
Confused's user avatar
  • 3,061
0 votes
0 answers
86 views

High current traces (up to 60 A) routing problem

I need to design a power inverter that might have up to 60 A of current flowing through the leg IGBTs and still could not figure out the best way out for that amount of current. The DC bus voltage may ...
Iron Maiden's user avatar
  • 1,224
0 votes
1 answer
599 views

Altium layer stack manager problem (change thickness, save it but after I close and open Altium again it doesn't change)

I want to explain the problem directly. I have a two layer PCB. I want to change the dielectric layer thickness to make my PCB's thickness 1.5mm. Access to "C:\Program Files\Altium\AD22\filename....
Furkan Özdemir's user avatar
0 votes
2 answers
1k views

4 layer PCB stackup for better EMC

I want to design a PCB with few "low dropout linear voltage regulators", which would be used to power some sensors we are building. None of the parts on the PCB is expected to do any high ...
user32335's user avatar
4 votes
3 answers
2k views

6-layer stackup

Edit 3: I used the following Stackup - in respect to recommendations provided by my board house and the responses to this question. This is a 6-Layer, 0.5mm thick, 1 + 4 + 1 HDI board (Copper ...
ElectronicsStudent's user avatar
0 votes
1 answer
564 views

Split ground plane for electrical isolation between sections that source from the same supply?

I am currently in the process of designing a high-precision mixed signal PCB. I do have some experience designing simpler PCBs, and I have been doing my own research for this question. However I ...
BlueOyster's user avatar
1 vote
3 answers
568 views

Soldering through-hole components when using ground/Vcc planes?

I'm designing my first PCB (2-sided) and can't quite understand. I'm going to be soldering the through-hole components myself such as the resistors. Typically, I put a leg through the hole, heat them, ...
D P's user avatar
  • 13
0 votes
0 answers
143 views

Connecting traces to a top-to-bottom layer via on a four layer PCB

I want all vias on my 4-layer PCB to start on top and stop on bottom layer and I want to be able to connect the traces from inner power and GND layers to the vias too. But it just doesn't happen! The ...
Fateme's user avatar
  • 348
5 votes
1 answer
414 views

Buck converter feedback pin routing

I have a question regarding the connection/ routing of the feedback (FB) pin in the buck converters. Consider the following placement example from the AP64501 DS: In case of a 2 layer board this is ...
Łukasz Przeniosło's user avatar
4 votes
2 answers
1k views

Should VCC and GND layers in a 4-layer PCB be full copper planes?

I'm trying to design a 4-layer development board which will have a MCU, GPS and a GPRS modules, etc. However I'm confused about whether the inner power layers should be full copper planes. Should GND ...
enis's user avatar
  • 73
1 vote
1 answer
671 views

4-layer board clearance and stack-up for 230V

I'm new to PCBs greater than 2 layers as well as 230V incorporated onto a PCB so pleased bear with any ignorance: I have a 4-layer board with the following setup. ...
Jayelec's user avatar
  • 11
0 votes
0 answers
85 views

What signal (VCC or ground) is connected to the top layer in a four layer PCB with a separate ground plane?

I am designing four layer PCB for the first time. I have designed two layer PCBs before. If we dedicate the inner plane for the ground, then which signal should be on the top layer copper pour region? ...
Gaurav Lokhande's user avatar
3 votes
3 answers
537 views

Multi-layer PCB design

Why in the diagram below is called 4-layer board? Link: https://www.youtube.com/watch?v=ESnDQl7ZM5o From my understanding: A multi-layer PCB board: Top connectors and signal traces Power Ground ...
Alan's user avatar
  • 113
4 votes
2 answers
469 views

PCB design review: Questions about power/ground plane

I am designing a small four layer PCB with KiCad. The purpose of this PCB is to control and monitor the lights of a car (not for road use) and without having to resort to old relays and fuses. I have ...
Nik_01's user avatar
  • 41
4 votes
2 answers
3k views

What is the Fab layer used for (PCB)?

What is the Fab layer used for in PCB design? What should it include?
manarinian's user avatar

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