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Hi i wanted to ask what causes an offset for the following integrator setup:enter image description here

I`m no sure if its the virtual ground or another fundamental reason im not aware about since the signal should always be biased at 0V. If someone could help that would great thanks!

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  • \$\begingroup\$ The cause of the offset in this simulated integrator setup is quite different than the cause of offset in the real circuit you may put together. This circuit will not usually work as shown. Does it come from a textbook that deals with ideal circuits? Many such circuits are outright impractical, or borderline practical. When it comes to integrators, nonlinearities of both capacitors and inductors are major determinants of performance, for they are less ideal than even average op-amps! Choice between an inductor and a capacitor is then based on sometimes surprising lab results :) \$\endgroup\$
    – Kuba hasn't forgotten Monica
    Commented Mar 28, 2022 at 13:07

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The actual issue is that LTspice assumes the wrong value for its initial conditions. You need to remember that the current in an inductor is 90° out of phase with the voltage across it (ignoring the effect of the ESR of the inductor for the moment).

Therefore, when voltage across it is zero, the current will be non-zero. LTspice starts it zero, which can't be correct. In the simple case of your schematic, you can calculate when the initial current should be, and initialise the inductor current to that. Add the following to your schematic to correctly initialise the inductor current, and then it all behaves as expected.

.param Iinit 1/(2 * pi * 1k)/10m

.ic I(L1)={Init}

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Your circuit (in simulation) has a DC gain of \$10^6\$ by default.

Multiply the op-amp input offset voltage times that gain.

Edit: In this case, however, it's because the -integral of the first quarter cycle is not canceled out until the next peak, as Tony's answer indicates. The output is 0V at each peak. So please select the other answer!

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  • \$\begingroup\$ but the input sine wave has 0 offset so where would this input offset voltage come from? \$\endgroup\$
    – KMN
    Commented Mar 28, 2022 at 7:41
  • \$\begingroup\$ All real op-amps have some offset voltage. Usually models do too, sometimes several mV. \$\endgroup\$
    – Spehro 'speff' Pefhany
    Commented Mar 28, 2022 at 7:51
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    \$\begingroup\$ @SpehroPefhany. Please check Tony's answer. As the model used does not have an offset voltage, the problem had to be caused by something else. \$\endgroup\$
    – devnull
    Commented Mar 28, 2022 at 12:56
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    \$\begingroup\$ @devnull I think Tony's answer +1 is correct then. \$\endgroup\$
    – Spehro 'speff' Pefhany
    Commented Mar 28, 2022 at 12:58
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    \$\begingroup\$ This answer is correct for the real circuit. If you want the real circuit to work, you can't have a DC gain of \${10}^6\$. The simulation misbehaves for another reason, as explained by another answer. As soon as you'd assemble a real circuit (which will take less time than messing with it in LTSpice), you'll run into the problem described by Sphero in this answer. Both answers are complementary! \$\endgroup\$
    – Kuba hasn't forgotten Monica
    Commented Mar 28, 2022 at 13:04
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The actual issue is that your assumption is incorrect. The output of the circuit is correct. The waveform that is biased with only negative voltages, that IS the negative of the integral of the sine wave input voltage, starting at time=0.

Calculate it, by hand if you want. The integral of a sine wave from time=0 to time=t is not centered on 0. It is unipolar.

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