8051 ARCHITECTURE

Microprocessor System Contrasted With Microcontroller System

Inside the 8051 Microcontroller Block Diagram
Some Embedded Products Using Microcontrollers
Some Embedded Products Using Microcontrollers
Features of the 8051
Some of the Companies Producing a Member of the 8051 Family
Comparison of 8051 Family Members
Versions of 8051/52 Microcontroller From Dallas Semiconductor
(Maxim)
Versions of 8051 From Atmel (All ROM Flash)
Various Speeds of 8051 From Atmel
Some 8-bit Registers of the 8051
Some 8051 16-bit Registers
Steps to Create a Program
8051 On-Chip ROM Address Range
Bits of the PSW Register
 BLOCK DESCRIPTION
• ACCUMULATOR ( ACC )
• Operand register
• Implicit or specified in the instruction
• Has an address in on chip SFR bank
• B REGISTER
• to store one of the operands for
multiplication and division
• otherwise, scratch pad
• considered as a SFR
• PROGRAM STATUS WORD ( PSW )
• Set of flags contain status information
• One of the SFR
• STACK POINTER ( SP )
• 8-bit wide register
• Incremented before data is stored on to the
stack using PUSH or CALL instructions
• Stack defined anywhere on the 128 byte
RAM
• RESET  initiated to 0007H
• Not a top to down structure
• Allotted an address in SFR
• DATA POINTER ( DPTR )
• 16 bit register
• contains DPH and DPL
• Pointer to external RAM address
• DPH and DPL allotted separate addresses in
SFR bank
• PORT 0 TO 3 LATCHES & DRIVERS
• Each i/o port allotted a latch and a driver
• Latches allotted address in SFR
• User can communicate via these ports
• P0, P1, P2,P3
• SERIAL DATA BUFFER
• internally has TWO independent registers
• TRANSMIT buffer parallel in serial out ( PISO )
• RECEIVE buffer  serial in parallel out (SIPO)
• identified by SBUF and allotted an address in SFR
• byte written to SBUF  initiates serial TX
• byte read from SBUF  reads serially received data

• TIMER REGISTERS
• for Timer0 ( 16 bit register – TL0 & TH0 )
• for Timer1 ( 16 bit register – TL1 & TH1 )
• four addresses allotted in SFR
• CONTROL REGISTERS
• IP
• IE
• TMOD
• TCON
• SCON
• PCON
• contain control and status information for interrupts,
timers/counters and serial port
• Allotted separate address in SFR
• TIMING AND CONTROL UNIT
• derives necessary timing and control signals
For internal circuit and external system bus
• OSCILLATOR
• generates basic timing clock signal using crystal oscillator
• INSTRUCTION REGISTER
• decodes the opcode and gives information to timing and
control unit
• EPROM & PROGRAM ADDRESS REGISTER
• provide on chip EPROM and mechanism to address it
• All versions don’t have EPROM
• RAM & RAM ADDRESS REGISTER
• provide internal 128 bytes RAM and a
mechanism to address internally
• ALU
• Performs 8 bit arithmetic and logical
operations over the operands held by
TEMP1 and TEMP 2
• User cannot access temporary registers
• SFR REGISTER BANK
• set of special function registers
• address range : 80 H to FF H
– Interrupt, serial port and timer
units control and perform specific
functions under the control of
timing and control unit
In 8051 micro controller there are 21
Special function registers (SFR) and this
includes Register A, Register B,
Processor Status Word (PSW), PCON
etc. So, it required 21 unique locations for
these 21 special function registers and the
size of each register is of 1 byte.
 Pin Description of the 8051

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 P
) 0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2
P
) 0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 P
) 2.4(A12
(RD)P3.7 17 24 )P2.3(A11
XTAL2 18 23 P ) 2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
 Pinout Description

Pins 1-8: Port 1 Each of these pins can be configured

as an input or an output.

Pin 9: RST A logic one on this pin disables the

microcontroller and clears the contents of most
registers. In other words, the positive voltage on this
pin resets the microcontroller. By applying logic zero to
this pin, the program starts execution from the
beginning.
Pins10-17: Port 3 Similar to port 1, each of these pins
can serve as general input or output. Besides, all of
them have alternative functions:

Pin 10: RXD Serial asynchronous communication

input or Serial synchronous communication output.

Pin 11: TXD Serial asynchronous communication

output or Serial synchronous communication clock
output.
Pin 12: INT0 Interrupt 0 input.

Pin 13: INT1 Interrupt 1 input.

Pin 14: T0 Counter 0 clock input.

Pin 15: T1 Counter 1 clock input.

Pin 16: WR Write to external (additional) RAM.

Pin 17: RD Read from external RAM.

Pin 18, 19: X2, X1 Internal oscillator input and output. A
quartz crystal which specifies operating frequency is
usually connected to these pins. Instead of it, miniature
ceramics resonators can also be used for frequency
stability. Later versions of microcontrollers operate at a
frequency of 0 Hz up to over 50 Hz.

Pin 20: GND Ground.

Pin 21-28: Port 2 If there is no intention to use external

memory then these port pins are configured as general
inputs/outputs. In case external memory is used, the
higher address byte, i.e. addresses A8-A15 will appear on
this port. Even though memory with capacity of 64Kb is
not used, which means that not all eight port bits are used
for its addressing, the rest of them are not available as
inputs/outputs.
Pin 29: PSEN If external ROM is used for storing program,
then a logic zero (0) appears on it every time the
microcontroller reads a byte from memory.

Pin 30: ALE Prior to reading from external memory, the

microcontroller puts the lower address byte (A0-A7) on P0
and activates the ALE output. After receiving signal from the
ALE pin, the external register (usually 74HCT373 or
74HCT375 add-on chip) memorizes the state of P0 and
uses it as a memory chip address. Immediately after that,
the ALU pin is returned its previous logic state and P0 is
now used as a Data Bus. As seen, port data multiplexing is
performed by means of only one additional (and cheap)
integrated circuit. In other words, this port is used for both
data and address transmission.
Pin 31: EA By applying logic zero to this pin, P2 and P3 are
used for data and address transmission with no regard to
whether there is internal memory or not. It means that even
there is a program written to the microcontroller, it will not
be executed. Instead, the program written to external ROM
will be executed. By applying logic one to the EA pin, the
microcontroller will use both memories, first internal then
external (if exists).

Pin 32-39: Port 0 Similar to P2, if external memory is not

used, these pins can be used as general inputs/outputs.
Otherwise, P0 is configured as address output (A0-A7)
when the ALE pin is driven high (1) or as data output (Data
Bus) when the ALE pin is driven low (0).

Pin 40: VCC +5V power supply.

 Input/Output Ports (I/O Ports)

All 8051 microcontrollers have 4 I/O ports each

comprising 8 bits which can be configured as inputs or
outputs. Accordingly, in total of 32 input/output pins
enabling the microcontroller to be connected to
peripheral devices are available for use.

Pin configuration, i.e. whether it is to be configured as

an input (1) or an output (0), depends on its logic state.
In order to configure a microcontroller pin as an input, it
is necessary to apply a logic zero (0) to appropriate I/O
port bit. In this case, voltage level on appropriate pin
will be 0.
Similarly, in order to
configure a
microcontroller pin
as an input, it is
necessary to apply a
logic one (1) to
appropriate port. In
this case, voltage
level on appropriate
pin will be 5V (as is
the case with any
TTL input). This may
seem confusing but
don't loose your
patience. It all
becomes clear after
studying simple
electronic circuits
connected to an I/O
pin.
 Input/Output (I/O) pin

Figure illustrates a simplified schematic of all circuits

within the microcontroller connected to one of its pins. It
refers to all the pins except those of the P0 port which do
not have pull-up resistors built-in.
 Output pin

A logic zero (0) is applied to a bit of the P register. The

output FE transistor is turned on, thus connecting the
appropriate pin to ground.
 Input pin

A logic one (1) is applied to a bit of the P register. The

output FE transistor is turned off and the appropriate pin
remains connected to the power supply voltage over a
pull-up resistor of high resistance.
 Port 0
The P0 port is characterized by two functions. If external
memory is used, then the lower address byte (addresses A0-
A7) is applied on it. Otherwise, all bits of this port are
configured as inputs/outputs.
The other function is expressed when it is configured as an
output. Unlike other ports consisting of pins with built-in pull-
up resistor connected by its end to 5 V power supply, pins of
this port have this resistor left out. This apparently small
difference has its consequences:
 If any pin of this port is configured as an input, then it acts
as if it “floats”. Such an input has unlimited input resistance
and undetermined potential.

When the pin is configured as an output, it acts as an “open

drain”. By applying logic 0 to a port bit, the appropriate pin
will be connected to ground (0V). By applying logic 1, the
external output will keep on “floating”. In order to apply logic
1 (5V) on this output pin, it is necessary to built in an
external pull-up resistor.
 Port 1
P1 is a true I/O port, because it doesn't have any alternative functions as
is the case with P0, but can be configured as general I/O only. It has a
pull-up resistor built-in and is completely compatible with TTL circuits.
Port 2
P2 acts similarly to P0 when external memory is used. Pins of this port
occupy addresses intended for external memory chip. This time it is
about the higher address byte with addresses A8-A15. When no memory
is added, this port can be used as a general input/output port showing
features similar to P1.
Port 3
All port pins can be used as general I/O, but they also have an alternative
function. In order to use these alternative functions, a logic one (1) must
be applied to appropriate bit of the P3 register. In tems of hardware, this
port is similar to P0, with the difference that its pins have a pull-up
resistor built-in.
 Pin's Current limitations

When configured as outputs (logic zero (0)), single

port pins can receive a current of 10mA. If all 8 bits of
a port are active, a total current must be limited to
15mA (port P0: 26mA). If all ports (32 bits) are active,
total maximum current must be limited to 71mA. When
these pins are configured as inputs (logic 1), built-in
pull-up resistors provide very weak current, but strong
enough to activate up to 4 TTL inputs of LS series.
 Memory Organization
The 8051 has two types of memory and these are Program
Memory and Data Memory. Program Memory (ROM) is used
to permanently save the program being executed, while
Data Memory (RAM) is used for temporarily storing data and
intermediate results created and used during the operation
of the microcontroller. Depending on the model in use (we
are still talking about the 8051 microcontroller family in
general) at most a few Kb of ROM and 128 or 256 bytes of
RAM is used. However…
All 8051 microcontrollers have a 16-bit addressing bus and
are capable of addressing 64 kb memory. It is neither a
mistake nor a big ambition of engineers who were working
on basic core development. It is a matter of smart memory
organization which makes these microcontrollers a real
“programmers’ goody“.
 Program Memory

The first models of the 8051-microcontroller family did not

have internal program memory. It was added as an
external separate chip. These models are recognizable
by their label beginning with 803 (for example 8031 or
8032). All later models have a few Kbyte ROM
embedded. Even though such an amount of memory is
sufficient for writing most of the programs, there are
situations when it is necessary to use additional memory
as well. A typical example are so called lookup tables.
They are used in cases when equations describing some
processes are too complicated or when there is no time
for solving them. In such cases all necessary estimates
and approximates are executed in advance and the final
results are put in the tables (similar to logarithmic tables).
How does the microcontroller handle external memory
depends on the EA pin logic state:
 ROLE OF EA

EA=0 In this case, the microcontroller completely

ignores internal program memory and executes only
the program stored in external memory.
EA=1 In this case, the microcontroller executes first
the program from built-in ROM, then the program
stored in external memory.
In both cases, P0 and P2 are not available for use
since being used for data and address transmission.
Besides, the ALE and PSEN pins are also used.
 Data Memory

Data Memory is used for temporarily storing data and

intermediate results created and used during the
operation of the microcontroller. Besides, RAM memory
built in the 8051 family includes many registers such as
hardware counters and timers, input/output ports, serial
data buffers etc. The previous models had 256 RAM
locations, while for the later models this number was
incremented by additional 128 registers. However, the
first 256 memory locations (addresses 0-FFh) are the
heart of memory common to all the models belonging to
the 8051 family. Locations available to the user occupy
memory space with addresses 0-7Fh, i.e. first 128
registers. This part of RAM is divided in several blocks.
The first block consists of 4 banks each including 8
registers denoted by R0-R7. Prior to accessing any of
these registers, it is necessary to select the bank
containing it. The next memory block (address 20h-
2Fh) is bit- addressable, which means that each bit has
its own address (0-7Fh). Since there are 16 such
registers, this block contains in total of 128 bits with
separate addresses (address of bit 0 of the 20h byte is
0, while address of bit 7 of the 2Fh byte is 7Fh). The
third group of registers occupy addresses 2Fh-7Fh, i.e.
80 locations, and does not have any special functions
or features.
 Additional RAM
In order to satisfy the programmers’ constant hunger for Data
Memory, the manufacturers decided to embed an additional
memory block of 128 locations into the latest versions of the
8051 microcontrollers. However, it’s not as simple as it seems to
be… The problem is that electronics performing addressing has
1 byte (8 bits) on disposal and is capable of reaching only the
first 256 locations, therefore. In order to keep already existing 8-
bit architecture and compatibility with other existing models a
small trick was done.
What does it mean? It means that additional memory block
shares the same addresses with locations intended for the SFRs
(80h- FFh). In order to differentiate between these two physically
separated memory spaces, different ways of addressing are
used. The SFRs memory locations are accessed by direct
addressing, while additional RAM memory locations are
accessed by indirect addressing.
 Memory expansion

In case memory (RAM or ROM) built in the microcontroller

is not sufficient, it is possible to add two external memory
chips with capacity of 64Kb each. P2 and P3 I/O ports are
used for their addressing and data transmission.

From the user’s point of view, everything works quite simply

when properly connected because most operations are
performed by the microcontroller itself. The 8051
microcontroller has two pins for data read RD#(P3.7) and
PSEN#. The first one is used for reading data from external
data memory (RAM), while the other is used for reading
data from external program memory (ROM). Both pins are
active low. A typical example of memory expansion by
adding RAM and ROM chips (Hardward architecture), is
shown in next slide.
•When the program during execution encounters an
instruction which resides in external memory (ROM),
the microcontroller will activate its control output ALE
and set the first 8 bits of address (A0-A7) on P0. IC
circuit 74HCT573 passes the first 8 bits to memory
address pins.
•A signal on the ALE pin latches the IC circuit
74HCT573 and immediately afterwards 8 higher bits of
address (A8-A15) appear on the port. In this way, a
desired location of additional program memory is
addressed. It is left over to read its content.
•Port P0 pins are configured as inputs, the PSEN pin is
activated and the microcontroller reads from memory
chip.