Lec Architecture 8086

Introduction to 8086
Microprocessor
Clock Speed
 Also called clock rate, the speed at which a microprocessor
executes instructions.
 The CPU requires a fixed number of clock ticks (or clock cycles) to
execute each instruction.
 The faster the clock, the more instructions the CPU can execute per
second.
 Clock speeds are expressed in megahertz (MHz) or gigahertz (GHz
).
• Every computer contains an internal clock that regulates the rate at
which instructions are executed and synchronizes all the various
computer components.
• A computer with a clock speed of 800MHz is running 800,000,000
cycles per second, while a 2.4GHz computer is running
2,400,000,000 cycles per second.
Uses of transistors in computer
• Transistors are the building block of computers. It is widely used in

CPU and memory.
• The property of the transistor, being able to switch between two
different states (on-off) is very important for a computer's function.
In a computer the transistor can be made to switch between two
binary states called 0 and 1. The simple switch operation of
transistors is what enables computer to complete massively
complex tasks. One computer chip can have millions of transistors
continually switching, helping complete complex calculations.. In a
computer it is not present as a single isolated item, instead it is
part of something that is called an integrated circuit.
• Every memory location will have a pair of transistors, so there are
16 of them for each byte, so 16 million of them for each megabyte
of memory.
Moor’s Law
 An observation made by Intel co-founder Gordon
Moore in 1965. He noticed that the number of
transistors per square inch on integrated circuits had
doubled every year since their invention. Moore’s law
predicts that this trend will continue into the
foreseeable future.
 Although the pace has slowed, the number of
transistors per square inch has since doubled
approximately every 18 months. This is used as the
current definition of Moore's law.
8088/86 pipelining
 8085 is not pipelined microprocessor.
• The idea of pipelining in its simplest form is to allow the
CPU to fetch and execute at the same time.
8086 Microprocessor
 Belongs to a popular microprocessor
series
• 8086, 80186, 80286, 80386, 80486, Pentium
 INTEL launched 8086 in 1978
 8086 is a 16-bit microprocessor with
• 16-bit Data Bus
• 20-bit Address Bus
Features
 It is a 16-bit μp.
 8086 has a 20 bit address bus can access up to
220 memory locations (1 MB).
 It has multiplexed address and data bus AD0-
AD15 and A16 – A19.
 It requires +5V power supply.
 A 40 pin dual in line package.

 8284 clock generator is used to generate
clocked input signal.
8
8086
Features
 An 8086 word in memory consists of any two
consecutive bytes.
 Smaller address contain the low byte of the
word, while higher address contain the higher
byte.
 If the first byte is at even address 8086 can
access the entire word in one operation.
 If the first byte is at odd address , it requires two
bus operation to access the whole word.
Features
 Can be configured as minimum mode:
• Support small, single processor system.
 Can be configured as maximum mode:
• Support multiprocessor systems.
8086 Internal Architecture
 8086 employs parallel processing
 8086 CPU has two parts which operate at the
same time
• Bus Interface Unit 8086 CPU
• Execution Unit
 CPU functions Bus Interface
Unit (BIU)
1. Fetch
2. Decode Execution Unit

(EU)
3. Execute
Bus Interface Unit
 The BIU handles all transactions of data and
addresses on the buses for EU.
 The BIU performs all bus operations such as
instruction fetching, reading and writing operands for
memory and calculating the addresses of the memory
operands.
 The instruction bytes are transferred to the instruction
queue.
Bus Interface Unit
 Sends out addresses for memory locations
 Fetches Instructions from memory
 Reads/Writes data from/to memory
 Sends out addresses for I/O ports
 Reads/Writes data from/to Input/Output

ports
Execution Unit
 Tells BIU (addresses) where to fetch instructions
or data
 Decodes & Executes instructions
 EU executes instructions from the instruction

system byte queue.
 Dividing the work between BIU & EU speeds up
processing
Architecture Diagram of 8086
Intel 8086 Internal Architecture
Execution Unit
 Main components are
• Instruction Decoder
• Control Circuitry
• Arithmetic Logic Unit
• General Purpose Registers
• Pointer & Index registers
• Flag Register
Instruction Decoder
 Translates instructions fetched from memory into a
series of actions which EU carries out
Control Circuitry
 Generates timing and control signals to perform
the internal operations of the microprocessor
Arithmetic Logic Unit

 EU has a 16-bit ALU which can ADD, SUBTRACT,
AND, OR, increment, decrement, complement or
shift binary numbers
Registers in EU
16 bits
8 bits 8 bits
AH AL Accumulator
AX
BX
BH BL Base
CX
CH CL Count
DX DH DL
Data
SP Stack Pointer
Pointer
BP Base Pointer
SI Source Index
Index
DI Destination Index
20
General Purpose Registers
 EU has four 16-bit AH AL AX
general purpose
registers BH BL BX
 Each of them can be
CH CL CX
used two independent
8-bit registers. DH DL DX
 Two registers can also
be combined to form
16-bit registers
 The valid register pairs
are – AX, BX, CX, DX
 AX/AL register is also called Accumulator
• Must be used in multiplication and division operations
• Must also be used in I/O operations
• MUL BH;AL times BH, result in AX
 BX is known as Base Register
• Only general purpose register whose content can be

used for addressing 8086 memory.
• DS is the default segment register.
 CX register is also called Counter Register
• Used as a loop counter
• Used in shift and rotate operations
 DX is known as Data Register
• Used in multiplication and division
• Used to hold high 16 bit result of 16×16 bit
multiplication.
• Used to hold high 16 bit dividend before 32÷16 bit
division and 16 bit remainder after division
Pointer Registers
• Contain the offset addresses of memory locations
• Can also be used in arithmetic and other operations
• SP: Stack pointer
• Used with SS (Stack Segment) register to access the
stack segment.
• Stores an offset from the current SS.
• SP contents are automatically updated due to
execution PUSH/POP instruction.
 BP: Base Pointer
• Primarily used to access data on the stack segment
• Can be used to access data in other segments
Index Registers
 SI: Source Index register
• is required for some string operations
• When string operations are performed, the SI register points to
memory locations in the data segment which is addressed by
the DS register. Thus, SI is associated with the DS in string
operations.
 DI: Destination Index register
• is also required for some string operations.
• When string operations are performed, the DI register points to
memory locations in the data segment which is addressed by
the ES register. Thus, DI is associated with the ES in string
operations
 The SI and the DI registers may also be used to access data stored
in arrays
Flag Register
 8086 has a 16-bit flag register
 Contains 9 active flags
 There are two types of flags in 8086
• Conditional flags – six flags, set or reset
by EU on the basis of results of some
arithmetic operations
• Control flags – three flags, used to control
certain operations of the processor
Flag Register
U U U U OF DF IF TF SF ZF U AF U PF U CF
1. CF CARRY FLAG
Conditional Flags
2. PF PARITY FLAG
3. AF AUXILIARY CARRY
4. ZF ZERO FLAG
5. SF SIGN FLAG
6. OF OVERFLOW FLAG
7. TF TRAP FLAG
Control Flags
8. IF INTERRUPT FLAG
9. DF DIRECTION FLAG
Flag Register
Flag Purpose
Carry (CF) Holds the carry after addition or the borrow after subtraction.
Parity (PF) PF=0; if the result has odd parity, PF=1;even parity.
Auxiliary (AF) is set(AF=1) if there is a carry from low nibble to high nibble
or a borrow from a high nibble to low nibble of the low order
8-bit of a 16-bit number.(for example, in BCD addition or
subtraction.)
Zero (ZF) Shows the result of the arithmetic or logic operation.
Z=1; result is zero. Z=0; The result is not 0
Sign (SF) Holds the sign of the result after an arithmetic/logic
instruction
execution. S=1; negative(MSB=1), S=0
28
Flag Purpose
A control flag.
Trap (TF) Enables the trapping through an on-chip debugging
Feature(if TF=1).
A control flag.
Interrupt (IF) Controls the operation of the INTR (interrupt request)
IF=0; INTR pin disabled. IF=1; INTR pin enabled.
A control flag.
Direction (DF) It selects either the increment or decrement mode for DI
and /or SI registers during the string instructions.
If DF=1 SI/DI auto-decremented if DF=0 auto-incremented
Overflow occurs (OF=1) when signed numbers are added
Overflow (OF) or subtracted. An overflow indicates the result has
exceeded the capacity of the Machine
29
Execution unit – Flag Register
Addition of two numbers:
0101 0100 0011 1001
0100 0101 0110 1010
1001 1001 1010 0011
CF 0
PF 1
AF 1
ZF 0
SF 1
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Introduction to 8086

• Transistors are the building block of computers. It is widely used in

 A 40 pin dual in line package.

2. Decode Execution Unit

 Sends out addresses for memory locations

 Fetches Instructions from memory

 Reads/Writes data from/to memory

 Sends out addresses for I/O ports

 Reads/Writes data from/to Input/Output

 EU executes instructions from the instruction

• Arithmetic Logic Unit

• General Purpose Registers

• Pointer & Index registers

Arithmetic Logic Unit

• Must be used in multiplication and division operations

• Must also be used in I/O operations

• MUL BH;AL times BH, result in AX

 BX is known as Base Register

• Only general purpose register whose content can be

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