REGISTER TRANSFER LANGUAGE AND

MICROOPERATIONS

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 SIMPLE DIGITAL SYSTEMS

• Combinational and sequential circuits can be used to

create simple digital systems.

• These are the low-level building blocks of a digital

computer.

• Simple digital systems are frequently characterized in

terms of
– the registers they contain, and
– the operations that they perform.

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 Register Transfer Language

MICROOPERATIONS (1)

• The operations performed on the data stored in

registers are called microoperations.
• The functions built into registers are examples
of microoperations
» Load
» Clear
» Increment
»…

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 Register Transfer Language

MICROOPERATION (2)

An elementary operation performed (during

one clock pulse), on the information stored
in one or more registers

Registers ALU
(R) (f) 1 clock cycle

R  f(R, R)

f: shift, load, clear, increment, add, subtract, complement,

and, or, xor, …
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 Register Transfer Language

ORGANIZATION OF A DIGITAL SYSTEM

• Definition of the (internal) organization

of a computer
- Set of registers and their functions

- Microoperations set

->Set of allowable microoperations provided

by the organization of the computer

- Control signals that initiate the sequence of

microoperations (to perform the functions)

Viewing a computer, or any digital system, in this way is called the

register transfer level

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 Register Transfer Language

REGISTER TRANSFER LEVEL

• This is because we’re focusing on

– The system’s registers
– The data transformations in them, and
– The data transfers between them.

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 Register Transfer Language

REGISTER TRANSFER LANGUAGE

• Rather than specifying a digital system in words, a specific

notation is used, register transfer language (RTL)

• For any function of the computer, the register transfer

language can be used to describe the (sequence of)
microoperations

• Register transfer language

– A symbolic language
– A convenient tool for describing the internal organization of
digital computers

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 Register Transfer Language

DESIGNATION OF REGISTERS

• Registers are designated by capital letters, sometimes followed by

numbers (e.g., A, R13, IR)
• Often the names indicate function:
– MAR - memory address register
– PC - program counter
– IR - instruction register

• Registers and their contents can be viewed and represented in

various ways
– A register can be viewed as a single entity:
MAR

– Registers may also be represented showing the bits of data

they contain
7 6 5 4 3 2 1 0

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 Register Transfer Language

DESIGNATION OF REGISTERS

• Designation of a register
- a register
- portion of a register
- a bit of a register

• Common ways of drawing the block diagram of a register

Register Showing individual bits

R1 7 6 5 4 3 2 1 0

15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields

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 Register Transfer

REGISTER TRANSFER

• Copying the contents of one register to another is a register

transfer

• A register transfer is indicated as

R2  R1

– In this case the contents of register R1 are copied (loaded)

into register R2
– Note that this is a non-destructive; i.e. the contents of R1
are not altered by copying (loading) them to R2

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 Register Transfer

REGISTER TRANSFER

• A register transfer such as

R3  R5

Implies that the digital system has:

– the data lines from the source register (R5) to the
destination register (R3)
– Parallel load in the destination register (R3)
– Control lines to perform the action

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 Register Transfer

CONTROL FUNCTIONS

• Often actions need to only occur if a certain condition is

true
• This is similar to an “if” statement in a programming
language
• In digital systems, this is often done via a control signal,
called a control function
– If the signal is 1, the action takes place
This is represented as:
P: R2  R1

Which means “if P = 1, then load the contents of register R1 into

register R2”, i.e., if (P = 1) then (R2  R1)

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 Register Transfer

HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS

Implementation of controlled transfer

P: R2 R1

Block diagram Control P Load

R2 Clock
Circuit
n
R1

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 Register Transfer

SIMULTANEOUS OPERATIONS

• If two or more operations are to occur

simultaneously, they are separated with commas

P: R3  R5, R2  R1

• Here, if the control function P = 1, load the contents

of R5 into R3, and at the same time (clock), load the
contents of register R1 into register R2

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 Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols Description Examples

Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
Arrow  Denotes transfer of information R2 R1
Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A B, B
A

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 Register Transfer

CONNECTING REGISTRS

• In a digital system with many registers, it is impractical to

have data and control lines to directly allow each register
to be loaded with the contents of every possible other
registers

• To completely connect n registers  n(n-1) lines

• O(n2) cost
– This is not a realistic approach to use in a large digital system

• Instead, take a different approach

• Have one centralized set of circuits for data transfer – the
bus
• Two ways of constructing common bus system: using
Multiplexer or using three state bus buffer
• Have control circuits to select which register is the
source, and which is the destination
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 Bus and Memory Transfers

BUS AND BUS TRANSFER

Bus is a path(of a group of wires) over which information is
transferred, from any of several sources to any of several destinations.
From a register to bus: BUS  R
Register A Register B Register C Register D

Bus lines

Register A Register B Register C Register D

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

B1 C1 D 1 B2 C2 D 2 B3 C3 D 3 B4 C 4 D 4

0 0 0 0
4 x1 4 x1 4 x1 4 x1
MUX1 MUX2 MUX3 MUX3

x
select
y

4-line bus
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 Multiplexer
 The figure shows the construction of a bus system for four 4-
bit registers.
 The multiplexer select the source register whose binary
information is placed on the bus.
 The bus consists of 4 (4 x 1) multiplexers each having data
inputs 0 through 3 and two selection inputs, x and y.
 The output 1 of register A is connected to input 0 of MUX 1
b/c this input is labeled A1.
 The bit in the same significant position in each register are
connected to the data inputs of one multiplexer to form one
line of the bus.
→The MUX 1 multiplexes the four 0 bits of the registers,
MUX 2 multiplexes the four 1 bits of the registers…..

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 Multiplexer cont…
 The two selection lines X and Y are connected to the
selection inputs of all multiplexers.
 The selection lines choose the four bits of one register and
transfer them into the four-line common bus. When xy=00,
the 0 data inputs of all 4 MUX are selected and applied to the
outputs that form the bus.
→This cause the bus lines to receive the content of
register A since the outputs of this register are connected to
the 0 data inputs of the multiplexers.
X Y Register selected

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 Multiplexer cont…
 In general, a bus system will multiplex K registers of n
bits each to produce an n-line common bus.
 The number of MUXs needed to construct the bus is
equal to n, the number of bits in each register.
 The size of each multiplexer must be K x 1, since it
multiplexes k data lines.

For register R0 to R63 in a 16 bit system:

» What is the MUX size we use?
» How many MUX we need?
» How many select bit?

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 Bus and Memory Transfers

BUS TRANSFER IN RTL

• Depending on whether the bus is to be mentioned explicitly or

not, register transfer can be indicated as either

R2 R1
or
BUS R1, R2  BUS

• In the former case the bus is implicit, but in the latter, it is

explicitly indicated

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End
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 Bus and Memory Transfers

MEMORY (RAM)
• Memory (RAM) can be thought as a sequential circuits
containing some number of registers
• These registers hold the words of memory
• Each of the r registers is indicated by an address
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data
• Assume the RAM contains r = 2k words. It needs the
following
– n data input lines data input lines
– n data output lines
n
– k address lines
– A Read control line address lines
– A Write control line k
RAM
Read
unit
Write
n
data output lines
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 Bus and Memory Transfers

MEMORY TRANSFER
• Collectively, the memory is viewed at the register level as
a device, M.
• Since it contains multiple locations, we must specify
which address in memory we will be using
• This is done by indexing memory references

• Memory is usually accessed in computer systems by

putting the desired address in a special register, the
Memory Address Register (MAR, or AR)
• When memory is accessed, the contents of the MAR get
sent to the memory unit’s address lines
M
Memory Read
AR
unit Write

Data out Data in

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 Bus and Memory Transfers

MEMORY READ

• To read a value from a location in memory and load it into

a register, the register transfer language notation looks
like this:
R1  M[MAR]

• This causes the following to occur

– The contents of the MAR get sent to the memory address lines
– A Read (= 1) gets sent to the memory unit
– The contents of the specified address are put on the memory’s output
data lines
– These get sent over the bus to be loaded into register R1

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 Bus and Memory Transfers

MEMORY WRITE

• To write a value from a register to a location in memory

looks like this in register transfer language:

M[MAR]  R1

• This causes the following to occur

– The contents of the MAR get sent to the memory address lines
– A Write (= 1) gets sent to the memory unit
– The values in register R1 get sent over the bus to the data input lines
of the memory
– The values get loaded into the specified address in the memory

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 Bus and Memory Transfers

SUMMARY OF R. TRANSFER MICROOPERATIONS

A B Transfer content of reg. B into reg. A

AR DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A  constant Transfer a binary constant into reg. A
ABUS R1, Transfer content of R1 into bus A and, at the same time,
R2 ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR  M Memory read operation: transfers content of
memory word specified by AR into DR
M  DR Memory write operation: transfers content of
DR into memory word specified by AR

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 Arithmetic Microoperations

MICROOPERATIONS

• Computer system microoperations are of four types:

1- Register transfer microoperations

2- Arithmetic microoperations
3- Logic microoperations
4- Shift microoperations

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 Arithmetic Microoperations

ARITHMETIC MICROOPERATIONS
• The basic arithmetic microoperations are
– Addition
– Subtraction
– Increment
– Decrement

• The additional arithmetic microoperations are

– Add with carry
– Subtract with borrow
– Transfer/Load
– etc. …

Summary of Typical Arithmetic Micro-Operations

R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
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 Arithmetic Microoperations

BINARY ADDER / SUBTRACTOR / INCREMENTER

B3 A3 B2 A2 B1 A1 B0 A0
Binary Adder
FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0

C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

Binary Incrementer
A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0

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 Arithmetic Microoperations

ARITHMETIC CIRCUIT
Cin
S1
S0
A0 X0 C0
S1 D0
S0 FA
B0 0 4x1 Y0 C1
1 MUX
2
3
A1 X1 C1
S1 FA D1
S0
B1 0 4x1 Y1 C2
1 MUX
2
3
A2 X2 C2
S1 FA D2
S0
B2 0 4x1 Y2 C3
1 MUX
2
3
A3 X3 C3
S1 D3
S0 FA
B3 0 4x1 Y3 C4
1 MUX
2
3 Cout
0 1

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A
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 Logic Microoperations

LOGIC MICROOPERATIONS
• Specify binary operations on the strings of bits in registers
– Logic microoperations are bit-wise operations, i.e., they work on the
individual bits of data
– useful for bit manipulations on binary data
– useful for making logical decisions based on the bit value
• There are, in principle, 16 different logic functions that can
be defined over two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

• However, most systems only implement four of these

– AND (), OR (), XOR (), Complement/NOT
• The others can be created from combination of these.

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 Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

• List of Logic Microoperations
- 16 different logic operations with 2 binary variables.
n
- n binary vars → 2 2 Functions

• Truth tables for 16 functions of 2 variables and the

corresponding 16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's
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 Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

Ai
0
Bi

1
4X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement

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 Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

• Logic microoperations can be used to manipulate individual
bits or a portions of a word in a register

• Consider the data in a register A. In another register, B, is bit

data that will be used to modify the contents of A

– Selective-set AA+B
– Selective-complement AAB
– Selective-clear A  A • B’
– Mask (Delete) AA•B
– Clear AAB
– Insert A  (A • B) + C
– Compare AAB
– ...

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 Logic Microoperations

SELECTIVE SET

• In a selective set operation, the bit pattern in B is used to set

certain bits in A

1100 At
1010 B
1110 At+1 (A  A + B)

• If a bit in B is set to 1, that same position in A gets set to 1,

otherwise that bit in A keeps its previous value

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 Logic Microoperations

SELECTIVE COMPLEMENT

• In a selective complement operation, the bit pattern in B is

used to complement certain bits in A

1100 At
1010 B
0110 At+1 (A  A  B)

• If a bit in B is set to 1, that same position in A gets

complemented from its original value, otherwise it is
unchanged

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 Logic Microoperations

SELECTIVE CLEAR

• In a selective clear operation, the bit pattern in B is used to

clear certain bits in A

1100 At
1010 B
0100 At+1 (A  A  B’)

• If a bit in B is set to 1, that same position in A gets set to 0,

otherwise it is unchanged

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 Logic Microoperations

MASK OPERATION

• In a mask operation, the bit pattern in B is used to clear

certain bits in A

1100 At
1010 B
1000 At+1 (A  A  B)

• If a bit in B is set to 0, that same position in A gets set to 0,

otherwise it is unchanged

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 Logic Microoperations

CLEAR OPERATION

• In a clear operation, if the bits in the same position in A and

B are the same, they are cleared in A, otherwise they are set
in A.

1100 At
1010 B
0100 At+1 (A  A  B)

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 Logic Microoperations

INSERT OPERATION
• An insert operation is used to introduce a specific bit pattern
into A register, leaving the other bit positions unchanged.
• This is done as
– A mask operation to clear the desired bit positions, followed by
– An OR operation to introduce the new bits into the desired
positions.
– Example
» Suppose you wanted to introduce 1010 into the low order
four bits of A: 1101 1000 1011 0001 A (Original)
1101 1000 1011 1010 A (Desired)

» 1101 1000 1011 0001 A (Original)

1111 1111 1111 0000 Mask
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)

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 Shift Microoperations

• Logical Shift microoperation- Left logical Shift

- Right logical Shift

• Circular Shift Microoperation- Left Circular Shift

- Right Circular Shift

• Arithmetic Shift Microoperation- Left Arithmetic Shift

- Right Arithmetic
Shift

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 Shift Microoperations

LOGICAL SHIFT
• In a logical shift the serial input to the shift is a 0.

• A right logical shift operation:

0

• A left logical shift operation:

0

• In a Register Transfer Language, the following notation is used

– shl for a logical shift left
– shr for a logical shift right
– Examples:
» R2  shr R2
» R3  shl R3
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 Shift Microoperations

CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted out
of the other end of the register.

• A right circular shift operation:

• A left circular shift operation:

• In a RTL, the following notation is used

– cil for a circular shift left
– cir for a circular shift right
– Examples:
» R2  cir R2
» R3  cil R3
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 Logical versus Arithmetic Shift

• A logical shift fills the newly created bit position with

zero:

• An arithmetic shift fills the newly created bit

position with a copy of the number’s sign bit:

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 Shift Microoperations

ARITHMETIC SHIFT
• An left arithmetic shift operation must be checked for the
overflow
0
sign
bit

Before the shift, if the leftmost two

V bits differ, the shift will result in an
overflow

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3

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 Cont…
• An arithmetic shift shifts a signed binary number to the left or
right.

• An arithmetic shift-left multiplies a signed binary number by 2.

• An arithmetic shift-right divides the number by 2.

• In arithmetic shifts the sign bit receives a special treatment

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 Shift Microoperations

HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

0 for shift right (down)

Serial Select 1 for shift left (up)
input (IR)

S
MUX H0
0
1
A0

A1 S
MUX H1
0
A2 1

A3
S
MUX H2
0
1

S
MUX H3
0
1

Serial
input (IL)

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 Shift Microoperations

ARITHMETIC LOGIC SHIFT UNIT

S3
S2 Ci
S1
S0

Arithmetic D i
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi Circuit
Ai
Ai-1 shr
Ai+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F = A + B + 1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with
borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=AB XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F49
= shl A Shift left A into F
END

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