CH0697

Figure 6-1 FM receiver block diagram.
Modern Electronic Communication 9th edition Jeffrey S. Beasley and Gary M. Miller
Copyright 2008 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Figure 6-2 MOSFET RF amplifier. (Courtesy of Motorola Semiconductor Products, Inc.)
Figure 6-3 Transistor limiting circuit.
Figure 6-4 Limiter input/output and flywheel effects.
Figure 6-5 FM discriminator characteristic.
Figure 6-6 Slope detection.
Figure 6-7 Foster-Seely discriminator.
Figure 6-8 Discriminator phase relations.
Figure 6-9 Ratio detector.
Figure 6-10 Quadrature detection.
Figure 6-11 Analog quadrature detector.
Figure 6-12 PLL block diagram.
Figure 6-13 An example of an FM receiver using the LM565 PLL.
Figure 6-14 The LM565 phase-locked-loop data sheets. (Reprinted with permission of National Semiconductor Corporation.)
Figure 6-14 (continued) The LM565 phase-locked-loop data sheets. (Reprinted with permission of National Semiconductor Corporation.)
Figure 6-15 Monophonic and stereo receivers.
Figure 6-16 Stereo signal processing.
Figure 6-17 Composite stereo and SCA modulating signal.
Figure 6-18 SCA PLL decoder.
Figure 6-19 CA3090 stereo decoder. (Courtesy of RCA.)
Figure 6-20 Block diagram of the Philips Semiconductors TEA5767 single-chip FM stereo radio.
Figure 6-21 Complete 88- to 108-MHz stereo receiver.
Figure 6-21 (continued) Complete 88- to 108-MHz stereo receiver.
Figure 6-22 Typical FM receiver.
Figure 6-23 Testing by wobbling the signal.
Figure 6-24 Quadrature detector.
Figure 6-25 Diode test range.
Figure 6-26 Diode and transistor testing.
Figure 6-27 An implementation of an FM receiver using Multisim.
Figure 6-28 The frequency plot of the bandpass filter.

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Figure 6-1 FM receiver block diagram.

Figure 6-2 MOSFET RF amplifier. (Courtesy of Motorola Semiconductor Products, Inc.)

Figure 6-3 Transistor limiting circuit.

Figure 6-4 Limiter input/output and flywheel effects.

Figure 6-5 FM discriminator characteristic.

Figure 6-6 Slope detection.

Figure 6-7 Foster-Seely discriminator.

Figure 6-8 Discriminator phase relations.

Figure 6-9 Ratio detector.

Figure 6-10 Quadrature detection.

Figure 6-11 Analog quadrature detector.

Figure 6-12 PLL block diagram.

Figure 6-13 An example of an FM receiver using the LM565 PLL.

Figure 6-15 Monophonic and stereo receivers.

Figure 6-16 Stereo signal processing.

Figure 6-17 Composite stereo and SCA modulating signal.

Figure 6-18 SCA PLL decoder.

Figure 6-19 CA3090 stereo decoder. (Courtesy of RCA.)

Figure 6-21 Complete 88- to 108-MHz stereo receiver.

Figure 6-21 (continued) Complete 88- to 108-MHz stereo receiver.

Figure 6-22 Typical FM receiver.

Figure 6-23 Testing by wobbling the signal.

Figure 6-24 Quadrature detector.

Figure 6-25 Diode test range.

Figure 6-26 Diode and transistor testing.

Figure 6-27 An implementation of an FM receiver using Multisim.

Figure 6-28 The frequency plot of the bandpass filter.

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