Embedded Systems: (Software)

Embedded Systems
(Software)
Embedded Applications
Session -2
Kavi Arya
Krithi Ramamritham
KReSIT/ IIT Bombay
© Krithi Ramamritham / Kavi Arya IIT Bombay 1

Examples of Embedded Systems

They are everywhere!
• wristwatches, washing machines,

• microwave ovens,
• elevators, mobile telephones,
• printers, FAX machines,
• telephone exchanges,
• automobiles, aircrafts
Embedded Apps
• A modern home
– has one general purpose desktop PC
– but has several embedded systems.
• More prevalent in industrial sectors
– Dozens of embedded computers in modern
automobiles
– chemical and nuclear power plants

An embedded system typically has a digital signal

processor and a variety of I/O devices connected to
sensors and actuators.
Computer (controller) is surrounded by other subsystems,
sensors and actuators
Computer -- Controller's function is :
• to monitor parameters of physical processes
of its surrounding system
• to control these processes whenever needed.

Simple Examples
A simple thermostat controller
• periodically reads the temperature of the
chamber
• switches on or off the cooling system.
a pacemaker
• constantly monitors the heart
• paces the heart when heart beats are
missed

Open loop temperature control
Closed loop temperature control

Feedback Control
Feedforward Control
Example: Elevator Controller

Remote Camera-based Survelliance
• Observers and the observed

sites connected through a
network.
• Input from sites displayed

at observers' end at regular
intervals.
• Need: System should

capture, process and
transmit images at regular
intervals, predictably

When there is an alarm
• Observer redirects one or more cameras to

zoom in on to a specific part of a site.
• Sends commands with the necessary
pan/tilt/zoom parameters across the network.
• Cameras retarget their views within bounded
time and start transmitting as before, scenes
from the chosen location.

What do we need?
• timely transmission of user needs from observer to
camera.
• camera platform retargeting the camera within bounded
time.
• camera capturing images at regular intervals
• images sent to observers predictably across the network

Functional Design & Mapping
F2 Functional
F1 F5
Design
Source:
F4 Source:
Ian Phillips, ARM
Ian Phillips, ARM
VSIA 2001
VSIA 2001
F3
(F2)
Architectural
Thread
(F5)
Design
(F3) (F4)
HW1 HW2 HW3 HW4 RTOS/Drivers
Hardware Interface

We will look at the details of
• A simple Digital Camera

• Digital Flight Control
• Plastic Injection Molding
What the future holds…

e.g., automotive electronics
Digital camera…
• Only recently possible
– Systems-on-a-chip
• Multiple processors and memories on
one IC
– High-capacity flash memory

Designer’s perspective: two key
tasks
• Processing images and storing in memory
• When shutter pressed:
– Image captured
– Converted to digital form by charge-coupled
device (CCD)
– Compressed and archived in internal memory
• Uploading images to PC
• Digital camera attached to PC
• Special software commands camera to transmit
archived images serially

Compression
• Store more images
• Transmit image to PC in less time
• JPEG (Joint Photographic Experts Group)

Requirements Specification
• System’s requirements – what system
should do
– Nonfunctional requirements
• Constraints on design metrics (e.g.,
“should use 0.001 watt or less”)
– Functional requirements
• System’s behavior (e.g., “output X should
be input Y times 2”)
– ….

Requirements Specification…
Initial specification is general - from marketing dept.
• E.g., short document detailing market need for a low-end digital
camera that:
– captures and stores at least 50 low-res images and
uploads to PC,
– costs around $100 with single medium-size IC costing less
that $25,
– has long as possible battery life,
– expected sales vol. =200,000 if mkt entry < 6 mths
– 100,000 if between 6 and 12 months,
– insignificant sales beyond 12 months

Nonfunctional requirements
• Design metrics of importance based on

initial specification
– Performance: time required to process image
– Size: number of elementary logic gates (2-input
NAND gate) in IC
– Power: measure of avg. electrical energy
consumed while processing
– Energy: battery lifetime (power x time)

Nonfunctional requirements…
• Constrained metrics
– Values must be below (sometimes above) certain
threshold
• Optimization metrics
– Improved as much as possible to improve product
• Metric can be both constrained and
optimization

• Power
– Must operate below certain temperature (cooling
fan not possible)
– Therefore, constrained metric
• Energy
– Reducing power or time reduces energy
– Optimized metric: want battery to last as long as
possible

• Performance
– Must process image fast enough to be useful
– 1 sec reasonable constraint
• Slower would be annoying
• Faster not necessary for low-end of market
– Therefore, constrained metric
• Size
– Must use IC that fits in reasonably sized camera
– Constrained and optimization metric
• Constraint may be 200,000 gates, but smaller would be
cheaper

Informal functional specification
• Flowchart breaks
functionality down into
Zero-bias adjust
simpler functions
CCD
input
• Each function’s details DCT
described in English Quantize

yes
• Low quality image has Archive in

memory
no Done?
resolution of 64 x 64
yes More no Transmit serially
• Mapping functions to a 8×8

blocks?
serial output
e.g., 011010...
particular processor type

not done at this stage

Informal functional specification
CCD
input Zero-bias
adjust
DCT
Quantize yes
no
Archive in Done
memory ?
yes
More no
Transmit serial output
e.g., 011010...
8×8 serially
blocks
?

Refined functional specification
Executable model of
• Refine informal digital camera
specification into one that
can actually be executed 10101101
01101010
CCD.C
• Can use C-like code to 10010101

101...
CCDPP. CODEC.
describe each function Image

C C
– Called system-level model, file

CNTRL.
101010101
C
prototype, or simply model 010101010
101010101
0...
– Also is first implementation UART.C
output
file

Design
• Determine system’s architecture
– Processors
• Any combination of single-purpose
(custom or standard) or general-purpose processors
– Memories, buses
• Map functionality to that architecture
– Multiple functions on one processor
– One function on one or more processors

Design..
• Implementation
– A particular architecture and mapping
– Solution space is set of all implementations
• Starting point
– Low-end general-purpose processor connected to flash
memory
• All functionality mapped to software running on processor
• Usually satisfies power, size, time-to-market constraints
• If timing constraint not satisfied then try:
– use single-purpose processors for time-critical
functions
– rewrite functional specification
Implementation 1: Microcontroller alone
• Low-end processor could be Intel 8051

microcontroller
• Total IC cost including NRE about $5
• Well below 200 mW power
• Time-to-market about 3 months
• However…

Implementation 1: Microcontroller
alone…
• However, one image per second not possible
– 12 MHz, 12 cycles per instruction
• Executes one million instructions per second
– CcdppCapture has nested loops resulting in 4096 (64 x

64) iterations
• ~100 assembly instructions each iteration
• 409,000 (4096 x 100) instructions per image
• Half of budget for reading image alone
– Would be over budget after adding compute-intensive

DCT and Huffman encoding

Implementation 2:
Microcontroller and CCDPP
EEPROM 8051 RAM
UART
SOC CCDPP

Implementation 2:
EEPROM 8051 RAM
SOC UART CCDPP
• CCDPP function on custom single-purpose processor

– Improves performance – less microcontroller cycles
– Increases NRE cost and time-to-market
– Easy to implement: Simple datapath, Few states in controller
• Simple UART easy to implement as single-purpose
processor also
• EEPROM for program memory and RAM for data memory
added as well

Block diagram of Intel 8051 processor core
Microcontroller
Instruction 4K ROM
Decoder
Controller
ALU 128
RAM
To External Memory Bus
• Synthesizable version of Intel 8051 available

– Written in VHDL
– Captured at register transfer level (RTL)
• Fetches instruction from ROM
• Decodes using Instruction Decoder
• ALU executes arithmetic operations
– Source and destination registers reside in RAM
• Special data movement instructions used to load and
store externally
• Special program generates VHDL description of ROM
from output of C compiler/linker
Implementation 2:
• Analysis of implementation 2
– Total execution time for processing one image:
• 9.1 seconds
– Power consumption:
• 0.033 watt
– Energy consumption:
• 0.30 joule (9.1 s x 0.033 watt)
– Total chip area:
• 98,000 gates

and CCDPP/Fixed-Point DCT
• 9.1 seconds still doesn’t meet performance
constraint of 1 second
• DCT operation prime candidate for improvement
– Execution of implementation 2 shows microprocessor
spends most cycles here
– Could design custom hardware like we did for CCDPP
• More complex so more design effort
– Instead, will speed up DCT functionality by modifying
behavior

DCT floating-point cost
• Floating-point cost
– DCT uses ~260 floating-point operations per pixel
transformation
– 4096 (64 x 64) pixels per image
– 1 million floating-point operations per image
– No floating-point support with Intel 8051
• Compiler must emulate
– Generates procedures for each floating-point
operation: mult, add
– Each procedure uses tens of integer operations
– Thus, > 10 million integer operations per image
– Procedures increase code size
• Fixed-point arithmetic can improve on this

and CCDPP/Fixed-Point DCT
– Use same analysis techniques as implementation 2
• 1.5 seconds
• 0.033 watt (same as 2)
• 0.050 joule (1.5 s x 0.033 watt)
• Battery life 6x longer!!
• 90,000 gates
• 8,000 less gates (less memory needed for code)

Implementation 4:
Microcontroller and CCDPP/DCT
EEPROM 8051 RAM
CODEC UART CCDPP

SOC
• Performance close but not good enough

• Must resort to implementing CODEC in hardware
– Single-purpose processor to perform DCT on 8 x 8 block

Implementation 4:
Microcontroller and CCDPP/DCT
• 0.099 seconds (well under 1 sec)
• 0.040 watt
• Increase over 2 and 3 because SOC has another
processor
• 0.00040 joule (0.099 s x 0.040 watt)
• Battery life 12x longer than previous implementation!!
• 128,000 gates, significant increase over previous
implementations
Digital Camera -- Summary
• Digital camera example
– Specifications in English and executable language
– Design metrics: performance, power and area
• Several implementations
– Microcontroller: too slow
– Microcontroller and coprocessor: better, but still too slow
– Fixed-point arithmetic: almost fast enough
– Additional coprocessor for compression: fast enough, but
expensive and hard to design
– Tradeoffs between hw/sw

Summary of Implementation 2 Implementation 3 Implementation 4
implementations Performance (second) 9.1 1.5 0.099
Power (watt) 0.033 0.033 0.040
• Implementation 3 Size (gate) 98,000 90,000 128,000
Close performance
Cheaper
Energy (j oul e) 0.30 0.050 0.0040
Less time to build
• Implementation 4
– Great performance and energy consumption
– More expensive and may miss time-to-market window
• If DCT designed ourselves then increased NRE cost and time-to-market
• If existing DCT purchased then increased IC cost
• Which is better?

2. Flight Simulator
CLIENT - pilot SERVER - simulator
Constraints on responses to pilot inputs, aircraft state updates

Time Periods to meet Timing
Requirements
CLIENT SERVER
Requirement Choice Made Rationale
Continuous pilot The time period of the The writer thread on
inputs should be writer on Client should the Client polls for the
polled at rates be less than 16 ms pilot inputs from the
greater than 16 ms joystick
Requirements…
CLIENT SERVER
The state of the The time period of the The flight dynamics
aircraft is to be Flight Dynamics thread on the Server
advanced at 12.5 thread on the Server advances the state of
ms time steps is 12.5 ms the system
Requirements…

Response time for Reader and Writer • Delay in data transfer at
pilots should be less threads on Server, and these threads increases
than 150 ms for the Reader thread on the the response time
commercial aircrafts Client should be as fast • These threads should be
and 100 ms for as the system permits. interrupt driven in order to
fighter aircrafts (Time period of 4ms in minimize the response time
our case)
Controlling a reaction
• we know:
– if temperature too high, it explodes
– maximum rate of temperature increase
– rate of cooling
• events:
– temperature change
– temperature > safe threshold
• we can derive:
– how often we have to check temperature
– when we have to finish cooling

Example – Injection Molding (cont.)
– Timing constraints

Example – Injection Molding (cont.)
– Concurrent control tasks

We looked at details of
• A simple Digital Camera

• Digital Flight Control
• Plastic Injection Molding
The world gets exciting…

e.g. Automotive electronics
Automotive
Electronics

Cruise Control
• Controls car speed

• Actuates the throttle
valve by a cable
connected to an
actuator, instead of by
pressing a pedal.
• The throttle valve
controls the power and
speed of the engine by
limiting how much air
the engine takes in .

Control Architecture for Cruise Control
State Machine for Activation
Adaptive Cruise Control with Driver Alert
• Helps to reduce the need for drivers to manually adjust speed

or disengage cruise control when encountering Slower traffic.
• Automatically manages vehicle speed to maintain a distance
set by the driver.
• Alerts drivers when slower traffic is detected in the path.
• Audible and visual alerts warn the driver when braking is
necessary to avoid slower moving vehicles ahead.
• Drivers can adjust system sensitivity to their preferred driving
style.
Web Servers… get smaller

iPic : Tiny Web-Server
2mm*2mm,
PIC 12c508
512b ROM, 24b RAM,
6bits IO, 4MHz RC

Microcontroller
Block diagram of Intel 8051 processor core
Instruction 4K ROM
Decoder
Controller
ALU 128
RAM
To External Memory Bus

ABS: Anti-Lock Breaks
•Reduce the danger of
accidents when
braking on roads that
are slippery, wet,
snow-laden or if one
tyre is in wet soil
• Maintaining
steerability by
preventing wheel lock
up on braking -
Locked wheels have
less traction than
moving wheels
Components Types
• • 1 / 2 channel 2 wheel
Wheel speed sensors
• 2 channel 4 wheel
• Actuator for valve and
• 3 channel 4 wheel criss-
pump cross
• Channel • 4 channel 4 wheel
• ECU
More sensors  truer sensing

More valves  greater individual wheel control
greater side to side stability
greater stopping power
More also implies greater expense, more complexity, more

computing and electric power

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Embedded Systems

KReSIT/ IIT Bombay

© Krithi Ramamritham / Kavi Arya IIT Bombay 1

© Krithi Ramamritham / Kavi Arya IIT Bombay 2

• wristwatches, washing machines,

© Krithi Ramamritham / Kavi Arya IIT Bombay 4

An embedded system typically has a digital signal

© Krithi Ramamritham / Kavi Arya IIT Bombay 5

© Krithi Ramamritham / Kavi Arya IIT Bombay 6

Closed loop temperature control

© Krithi Ramamritham / Kavi Arya IIT Bombay 9

• Observers and the observed

• Input from sites displayed

• Need: System should

© Krithi Ramamritham / Kavi Arya IIT Bombay 10

• Observer redirects one or more cameras to

© Krithi Ramamritham / Kavi Arya IIT Bombay 11

© Krithi Ramamritham / Kavi Arya IIT Bombay 12

© Krithi Ramamritham / Kavi Arya IIT Bombay 13

We will look at the details of

• A simple Digital Camera

What the future holds…

© Krithi Ramamritham / Kavi Arya IIT Bombay 15

© Krithi Ramamritham / Kavi Arya IIT Bombay 16

© Krithi Ramamritham / Kavi Arya IIT Bombay 17

© Krithi Ramamritham / Kavi Arya IIT Bombay 18

© Krithi Ramamritham / Kavi Arya IIT Bombay 19

• Design metrics of importance based on

© Krithi Ramamritham / Kavi Arya IIT Bombay 20

© Krithi Ramamritham / Kavi Arya IIT Bombay 21

© Krithi Ramamritham / Kavi Arya IIT Bombay 22

© Krithi Ramamritham / Kavi Arya IIT Bombay 23

• Each function’s details DCT

described in English Quantize

• Low quality image has Archive in

• Mapping functions to a 8×8

particular processor type

© Krithi Ramamritham / Kavi Arya IIT Bombay 24

© Krithi Ramamritham / Kavi Arya IIT Bombay 25

• Can use C-like code to 10010101

describe each function Image

– Called system-level model, file

© Krithi Ramamritham / Kavi Arya IIT Bombay 26

© Krithi Ramamritham / Kavi Arya IIT Bombay 27

• Low-end processor could be Intel 8051

© Krithi Ramamritham / Kavi Arya IIT Bombay 29

– CcdppCapture has nested loops resulting in 4096 (64 x

– Would be over budget after adding compute-intensive

© Krithi Ramamritham / Kavi Arya IIT Bombay 30

© Krithi Ramamritham / Kavi Arya IIT Bombay 31

SOC UART CCDPP

• CCDPP function on custom single-purpose processor

© Krithi Ramamritham / Kavi Arya IIT Bombay 32

To External Memory Bus

• Synthesizable version of Intel 8051 available

© Krithi Ramamritham / Kavi Arya IIT Bombay 34

© Krithi Ramamritham / Kavi Arya IIT Bombay 35

© Krithi Ramamritham / Kavi Arya IIT Bombay 36

© Krithi Ramamritham / Kavi Arya IIT Bombay 37