Powersynth: Multi-Chip Power Module Layout Synthesis: Application of Fast Design Optimization Tools For Mcpms
Powersynth: Multi-Chip Power Module Layout Synthesis: Application of Fast Design Optimization Tools For Mcpms
Powersynth: Multi-Chip Power Module Layout Synthesis: Application of Fast Design Optimization Tools For Mcpms
SPONSORED
CENTER
Methodology
Key Features
• 10,000 times faster than FEM analysis
• FAST thermal model
• Lumped element. Heat flux distribution network modeled as rectangular contours
• Automated mesh generation (Gmsh), and open-source FEM solver (Elmer)
• FAST electrical parasitic model
• Parasitic R and L modeled by micro-strip transmission line structure
• Parasitic C is modeled by closed-form equation
• Parasitic extraction: a graph network representation (nodes and edges)
• A framework for complex module design
• Technology Library database holds material data for each layer
• Quick and easy-to-draw topology stick diagram
• Projects can be saved and shared between different work
• True multi-objective optimization
• User-defined performance measures
• Efficient and fast optimization using NSGA-II
• Data analysis and export
• Multiple solutions between trade-offs
• Exported design can be analyzed in other tools or exported for manufacture (FEM, SolidWorks,
etc.)
Main Results
Loop Lower Gate Upper Gate Max. MOSFET
Layout Name Ind. Loop Ind. Loop Ind. Temp. Std. Dev.
Temp.
Conventional 7.45 nH 9.37 nH 8.08 nH 412 K 0.713 K
Hand
Hand
Designs Layout B