Training Manual Lily Pl42c91hp Pl42q91hp Pl50c91h
Training Manual Lily Pl42c91hp Pl42q91hp Pl50c91h
Training Manual Lily Pl42c91hp Pl42q91hp Pl50c91h
TRAINING MANUAL
Agenda
1. Specification
3. Block Diagram
4. Wiring Diagram
5. Operation Instruction
& Installation
6. Trouble Shooting
PDP TV MICOM FLOWCHART :
PRODUCT PROJECT JIG used Main Micom Sub Micom Main Micom Sub Micom
Tool Tool File Type File Type
RS232C : AA39-00311A
1. Start the "Flash Downloader V5.1"(Must used V5.1), Which is the program only for
downloading ATV
2. Connect Download cable to TV set.
3. Turn on TV set in Stand by Mode.
4. Select Micom Type. (Mstar).
5. Check the Download port. (LPT1)
*.Caution : Check "porttalk.sys" file is saved or not in your Computer
(C:\WINDOWS\System32\drives).
You can not download without "porttalk.sys".
If there is no this file, save "porttalk.sys" file in this directory. (C:\WINDOWS\System32\drive
Page 7
Step 3
Select T-CRL32MEAM-1011.0
1. Click "Connect" button and check the "Program" button will activate
2. Click " Program", Start Download.
3. Finished download, Display "Complete" check it.
4. Exit download program.
5. Remove download cable from TV set.
Firmware downloading through USB mode.
1-1.
- Update S/W by using USB 2.0 port.
- In USB, make the folder “MT8226”
and put to update file in the folder.
- Connect USB to Wiselink (Side AV-USB).
Main S/W Update by USB
- Select
Control
- Select “YES”
- Start Upgrading
automatically.
1-3.
- When Upgrading finish, Turn off the Set (waiting a few seconds) and
turn on again automatically.
Firmware Update through MTK Tool
2-2. Install the MTK Tool
- Connect Set (Service JACK) and JIG Cable to execute Program
Update.
- Click Reset
- Choose MT8226
- Select Com Port
(Auto Detect)
- Select Bin file
(to update new S/W
version file),
by Browse
- Click Upgrade button
2-4. If Upgrade is finished, Turn off (=AC Power off) the Set (waiting a
few seconds) and turn on again.
Firmware Update through Win DDC
DDC
Manager
Sub Micom Update with DDC Manager
Connect Sub-Micom Download JIG and D-SUB JACK
D-SUB
JACK
Sub Micom Update with DDC Manager
Win-DDC Set-Up
Manufacture: WELTREND
Communication type
: D-SUB15(Analog)
Sub Micom Update with DDC Manager
1-3.
- Click Load File
- Choose to update
Sub-Micom file
(For example)
T-PRLPEUS-
0005.hex
Sub Micom Update with DDC Manager
1-5.
- Remove Download JIG
Cable
-Turn off (=AC Power off)
the
Set (waiting a few
seconds)
and turn on again.
Carnelian PS50A410
Pyrope
PS50A4550
PS50A550
Spinel
■.Check Voltage
- SMPS Video main Board, SMPS X,Y Drive board, SMPS Logic board
②
● SMPS relay on <-> off continually
- Operate Protection circuit because of some Ass’y problem
CN810
CN809
CN807
● No display but sound is normal
CN810
CN809
- X or Y or Logic or Y Buffer board is abnormal
- SMPS output Voltage is abnormal CN807
● No sound but display is normal
- Speaker wire is not connect
- Video main board sound part defect
- Speaker part defect
2
- Volume level is “0”(Non-sense)
3 3
● SMPS Troubleshooting
● Major Defect Symptom _ Panel
Discharge defect
Horizontal Line
Horizontal Bar or Block
Vertical Line or Block
Buzzing Noise
Pixel defect
1. Discharge defect
defect
2. If not fixed by adjust,
replace PDP panel
How to replace
- Need to adjust Vs, Va voltage the Panel
after panel replacement
Partial dicharge
defect at each 2. If not fixed, replace logic board
side
- Caution
Attention to FPC cable damage
Defect position
for each buffer Need to replace
the only defect
2. If not fixed, replace address board as defect
buffer boards side (E, F, G
E-buffer F- G-buffer address buffer)
buffer
G- F-buffer E-buffer
buffer
Service Guide
1. If the noise comes from the Buzzing Noise
vibration of Back-Cover,
attach a spacer felt 1. Refer to the PDF
file of 13 Page
2. If the noise source is X or for replacing Panel
The noise Y main board, attach
Buzzing Noise 2. Refer to the exel
By vibration a damping sheet file of 13 Page
for adjusting Vs, Va
3. If the noise source is SMPS,
replace the SMPS
4. If not fix, replace the Panel
and then adjust Vs and Va
Plasma Discharge Problem
Two types
How to fix
2009
Discharge Defect; this is called Low Level Discharge by R&D
defect
2. If not fixed by adjust,
replace PDP panel
How to replace
- Need to adjust Vs, Va voltage the Panel
after panel replacement
Partial dicharge
defect at each 2. If not fixed, replace logic board
side
2 Over Discharge
Test; Black pattern and OSD, can be seen around OSD, often appears
as Blue stars.
Solution; Reduce Ve 3-10V.
If not ok; change Logic FW, the ramp waveform is generated from the
FW.
For Models that have this problem
HQ Bulletins have been created.
2008-04-30
OW
6. Pixel defect
1. Y-Main
2. X-Main
3. Logic Main
4. Y Buffer
5. E, F, G Address Buffer
1. Y-Main
2 Over Discharge
Test; Black pattern and OSD, can be seen around OSD, often appears
as Blue stars.
Solution; Reduce Ve 3-10V.
If not ok; change Logic FW, the ramp waveform is generated from the
FW.
2. X-Main
OK
Dim
Video
• No Video, Sound OK
1 - Don’t come out Vs voltage(3.3V)
at Logic board
5 • Broken Picture
• Other Symptom
6 Abnormal color or stripes
4. Y Buffer
• Power Protection
occurrence
2 - Can hear Relay off
sound at Power On
● Troubleshooting Procedures by Assembly
<PDP 42”>
<PDP 50”>
V. Trouble Shooting
Relaxation
Pleasure
“ beyond the space… ”
Satisfaction
Affordable
1. Specification
1.Specification
Product Features
1.Specification
Key Features
1055 x 759 x 316 mm (With Stand) 1231 x 849 x 316 mm (With Stand)
60 Hz
⑧ ⑨ ③
4. Wiring Diagram
Main Board Wiring
5. Operation Instruction
& Installation
5. Operation Instruction & Installation
Rear Panel
6. Trouble shooting
6. Trouble shooting
No Power
6. Trouble shooting
Turned on and off repeatedly
6. Trouble shooting
No Picture ( When audio is normal)
6. Trouble shooting
No Sound
ATTACHMENT
CONTENTS
I. What is PDP ?
PDP ?
Agenda
1. Introduction to PDP
4. Characteristic of Board
1. Introduction to PDP
● PDP Concept
Power
PS Ultraviolet Fluorescent
Radiation Substance
Drive Circuit
Visible
Light
Power Input
Loss in Drive Circuit 70%
Gas Discharge
Heat and Infrared 2%
Radiation Ray
Emission
Ultraviolet Radiation
Absorption of 60%
Partitions of Cell
Absorption by Fluorescent Substance
Structure
::0.1mm
0.1mmCell
CellPitch
Pitch
--Not
Notaffected
affectedby
bymagnetic
magneticfields
fields
--Full-color
Full-color
--Excellent
ExcellentNon-linearity
Non-linearity
::Does
Doesnot
notrequire
requireTFT
TFT(Thin
(ThinFilm
Film
Transistor)unlike
Transistor) unlikeLCD
LCD
Panel Structure and
Manufacturing
2. Panel Structure & Manufacturing
● Panel Cell Structure
Upper Panel
Bus Electrode
Dielectric Layer
MgO Layer ITO Electrode
Partition Fluorescent
Substance
Transparent
Transparent Electrode
Electrode
uses -- Sets
Sets aa gap
gap between
between electrodes
electrodes
uses and
and maintains
maintains the
the discharge
discharge
nerates -- Transparent
Transparent for
for visible
visible light
light
nerates ultraviolet
ultraviolet rays
rays
Dielectric
Dielectric Layer
Layer
-- Limits
Limits current
current flow
flow
-- Transparent
Transparent for
for visible
visible light
light
--Accumulates
Accumulates wall
wall charge
charge Bus
Bus Electrode
Electrode
-- Provides
Provides aa path
path for
for
MgO
MgO Thin
Thin Film
Film the
the discharge
discharge current
current
-- Emits
Emits secondary
secondary electrons
electrons -- Prevents
Prevents aa voltage
voltage drop
drop
-- Generates
Generates aa wall
wall charge
charge
osphor
osphor Layer
Layer
onverts
onverts Visible
Visible Light-Ultraviolet
Light-Ultraviolet Rays
Rays Driving
Driving Circuit
Circuit
-- Switches
Switches discharged
discharged cells
cells
Address
Address Electrode
Electrode -- Processes
Processes the
the video
video signal
signal
-- Inputs
Inputs the
the Data
Data Signal
Signal
PDP Driving
Characteristics
3. PDP Driving Characteristics
● Block Diagram
[Wiring Diagram Schematic ]
CN805 CN805
(10P) (10P) CN804 CN804
SMPS (9P) (9P)
CN806)
CN812
(5P)
CN802 CN803 CN801
(11P) (10P) (10P) X- Main
Y- Main
LA03 CN803
(31P) (10P)
CN101 AC
CN111 CN601 CN802 CN801
Inlet
CN102
Digital Analog
CN103
3. PDP Driving Characteristics
● Board Functions
■.SMPS(Switching Mode Power Supply)
: SMPS supplies the voltage for the parts installed on the boards and supplies the voltage
and current for the panel.
■.X-MAIN Board
: Switches FETs according to the timing provided by the Logic Board, generates the Drive
Waveform and supplies the Drive Waveform for the X electrode of the panel through the
connector.
■.Y-MAIN Board
: Switches FETs according to the timing provided by the Logic Board, generates the Drive
Waveform and supplies the Drive Waveform for the Y electrode of the panel through the
Scan Driver IC of the Y-Buffer Board.
Function
Function Function
Function
••Removes
Removesthe theSustain
SustainComponents Function ••Emission
Components Function Emissionofofvisible
visiblerays
rays
••Initialize the Wall-Voltage
Initialize the Wall-Voltage ••Sets
Setsthe
theDischarge
DischargeCell
Cell through a Cell Discharge
through a Cell Discharge
Issue
Issue Issue
Issue Issue
Issue
••Operating
OperatingMargin ••High-Speed
High-SpeedSwitching ••High
Margin Switching HighEfficiency
Efficiency
••Contrast ••Low-Voltage ••Low
Contrast Low-Voltage LowVoltage
Voltage
••Short
ShortReset
ResetTime ••ERC
Time ERC OperatingEfficiency
Operating Efficiency
3. PDP Driving Characteristics
● Drive Waveform (P3 Alexander)
Y rising Y sustain
Ramp Pulse
Y falling
Ramp Y scan
Pulse
X sustain
Pulse
Address
Pulse
Vset = 173V
Vs = 175V
Vsc_h = 35V
Y
Vsc_l = -70V
Ve=165V Vs = 175V
The
Thepreset
presetcells
cellsto
tobe
beturned
turned
on to display a picture.
on to display a picture.
3. PDP Driving Characteristics
● Sustain Duration
Turn
Turnthe
thecells
cellson
onby
byaastrong
strong
Sustain
SustainDischarge
Discharge
3. PDP Driving Characteristics
● Frame Structure (ADS)
SF1 SF2 SF3 SF4 SF5 SF6 SF7 SF8
sub-field
1
2 address
scan line
..
..
. 1T 2T 4T 8T 16T 32T 64T 128T
sustain
480
1TV field (time)
D
X
Y1
Y2
Yn
3. PDP Driving Characteristics
● Image Display by 8 Sub-Fields
e
ag
l Im
a
in
SF1 SF2 SF3 SF4 SF5 SF6 SF7 SF8 rig
O
sub-field
1
2 address
scan line
..
..
. 1T 2T 4T 8T 16T 32T 64T 128T
sustain
480
1TV field (time)
Operating Explanation
per Board
4. Operating Explanation per Board
Power Supply
LVDS
Digital B'd Analog B'd
AD TMDS Comb
Micom Filter
Converterr Receiverr
4. Operating Explanation per Board
● Drive Waveform Specifications
Y rising Y sustain
Ramp Pulse
Y falling
Ramp Y scan
Pulse
X sustain
Pulse
Address
Pulse
PDP Filter ?
Content
Cabinet – Back
(SEC)
Display
Board
(SEC)
Cabinet – Front (SEC)
The Function of the PDP
Filter
PDP Filter PDP Module
(Source)
Visible
Light
Remote controller
malfunction NIR Xenon gas
High Contrast !
PDP Filter Structure
PDP Filter Mesh Type
Structure
Color adjusting+ NIR Cut Film
AR Film
Mesh Film
Semi Tempered Glass
AR Film
Color adjusting+ NIR Cut Film
Mesh Film
Semi Tempered Glass
PDP Filter Sputter type Structure
AR Film
AR Film
Color adjusting
Dielectric
Blocker
Metal
AR Film
Blocker
Coating
Dielectric
Semi Tempered Glass
Color adjusting film
AR Film
PDP Filter MRT (Sputter) type
Structure
AR Film
MAB Film
Color adjusting
Coating on Semi Tempered Glass
PDP Filter Performance
PDP Filter Performance
Transmittance (%) 48 % 44 % 52 %
NIR** 850 nm 9% 5% 5%
Shielding
(%) 950 nm 4% 2% 2%
Peak
Brightness
1,047 561 468 210
Black
Dark Room 0.15 0.08 0.07 0.65
Brightness
Contrast
Ratio
6,978 : 1 7,480 : 1 6,938 : 1 467 : 1
50
40
Transmittance(%)
30
20
SSC Mesh Type Filter
10
Dielectric
Dielectric
Dielectric
Blocker
Blocker
Metal
AR Film
Coating
AR Film
AV-LINK CAPABILITIES
REMOTE
NONE REPLACES INFRARED REPEATERS
CONTROL
INTEGRATED REMOTE CONTROL SYSTEM
CONNECTOR
Connector Drawings
All dimensions in millimeters
What is HDMI? Attachment
Link Architecture
The input stream to the Source’s encoding logic will contain video
pixel,
packet and control data. The packet data consists of audio and
auxiliary data and associated error correction codes.
These data items are processed in a variety of ways and are presented
to the TMDS encoder as either 2 bits of control data, 4 bits of packet
data or 8 bits of video data per TMDS channel. The Source encodes
one of these data types or encodes a Guard Band character on any
given clock cycle.
What is HDMI? Attachment
Example: TMDS periods in 720x480p video frame
What is HDMI? Attachment
The HDMI link operates in one of three modes: Video Data Period, Data Island
period, and Control period. During the Video Data Period, the active pixels of
an active video line are transmitted. During the Data Island period, audio and
auxiliary data are transmitted using a series of packets. The Control period is
used when no video, audio, or auxiliary data needs to be transmitted.
A Control Period is required between any other two periods.
Video Data Periods use transition minimized coding to encode 8 bits per
channel, or 24 bits total per pixel.
Data Island Periods are encoded using a similar transition minimized coding,
TMDS Error Reduction Coding (TERC4), which transmits 4 bits per channel,
or 12 bits total per pixel clock period.
During Control Periods, 2 bits per channel, or 6 bits total are encoded per pixel
clock using a transition maximized encoding. These 6 bits are HSYNC, VSYNC,
CTL0, CTL1, CTL2 and CTL3. Near the end of every Control Period,
a Preamble, using the CTLx bits, indicates whether the next Data Period is
a Video Data Period or a Data Island Period.
What is HDMI? Attachment
specific minimum requirements have been specified for Sources and Sinks
There is no sample size usage restriction for DTV devices. An HDMI Sink
may optionally accept audio at sample rates of 88.2kHz, 96kHz, 176.4kHz
and/or 192kHz using either IEC 60958 format or IEC 61937 format, and
should indicate these capabilities in the E-EDID data structure.
What is HDMI? Attachment
All HDMI Sources shall be compatible with DVI 1.0 compliant sink devices (i.e.
“monitors” or “displays”) through the use of a passive cable converter. Likewise,
all HDMI Sinks shall be compatible with DVI 1.0 compliant sources (i.e. “systems”
or “hosts”) through the use of a similar cable converter.
When communicating with a DVI device, an HDMI device shall operate according
to the DVI 1.0 specification, with the following exception - these devices are not
required to comply with DVI 1.0 rules regarding:
• Monitor scaling requirements
• Physical Interconnect specifications
• System Low Pixel Format Support Requirements
TruSurround XT bridges this gap. It processes any multichannel audio source, as is
usually found on DVDs, and transforms the material into breathtaking virtual surround
sound from just two speakers or headphones.
Based upon the patented TruSurround® technology from SRS Labs, which is the
established standard for virtual surround sound, TruSurround XT also includes the unique
features of SRS Dialog Clarity and TruBass and creates a stunning 3D sound image from
standard stereo material.
What is TXT? Attachment
TruSurround XT features
� SRS Dialog Clarity Enhancement: Playback of dialog often suffers due to competing
signals from other speakers. In addition, feature film soundtracks are mixed specifically for
cinema playback and are loaded with the latest advancements in special audio effects.
When translated over home theatre or computers systems, dialog may become
unintelligible. This patented SRS algorithm enhances signal clarity to address these
problems, thus improving dialog intelligibility from all such source material.
What is TXT? Attachment
TruSurround XT features
Using TruBass, TruSurround XT takes the bass information contained within the original
audio track and helps the speakers or headphones re-create it – even if it is below the
speaker’s low frequency limitations.
When TruSurround XT accepts a stereo signal, WOW is enabled for a better listening
experience. Wow is also used by Microsoft in their new Media Player for Windows XP and
Windows Media Player 7.