On "3D ICs"

A Presentation On 3D ICs Presented in partial fulfillment of Bachelors Degree in Technology Electronics & Communication Engineering
Session: 2012-2013 PRESENTED TO: BY: Ms Smriti Sachan Mr Amit kumar Jain
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PRESENTED Shubham Manglik (EC/09/50)
Department of Electronics and Communication Engineering Poornima College Engineering, Jaipur
CONTENTS
INTRODUCTION IDEA FOR 3D IC LIMITED PERFORMANCE OF 2D IC 3D ARCHITECTURE MANUFACTURING TECHNOLOGY OF 3D ICs ADVANTAGES OF 3D ARCHITECTURE PERFORMANCE CHARACTERISTICS CONCERNS IN 3D CIRCUITS
PRESENT SCENARIO IN 3D IC INDUSTRY

CONCLUSION
INTRODUCTION
In electronics, a three-dimensional integrated circuit is a
chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit.
In contrast, a 3D IC is a single chip in which all components on
the layers communicate using on-chip signaling, whether vertically or horizontally.
IDEA FOR 3D IC
The large growth of computer and information technology industry is depending on VLSI circuits with increasing functionality and performance at minimum cost and power dissipation and 2D ICs generate various gate delays and interconnection delay.
So to reduce these delays and total power
consumption, 3D IC technology is introduced.

Intel introduced 80 core chip in 2007 which run on
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the frequency of 1.4GHz.
LIMITED PERFORMANCE OF 2D ICs

As we try to increase the performance and efficiency of chip, the complexity of chip design increases and this requires more and more transistors. So the final size of the circuit and delays increases. The losses increases with large interconnection because the capacitance and resistances are generated in between the clad and copper.
3D IC ARCHITECTURE
3D IC is a concept that can significantly : Improve interconnect performance,

Increase transistor packing density, Reduce chip area Power dissipation
In 3D design structure the entire chip Si is divided by number of layers of oxide and metal, to form
transistors.
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MANUFACTURING TECHNOLOGY OF 3D ICs
There are four ways to built 3D ICs :1. Monolithic 2. Wafer on wafer 3. Die on wafer 4. Die on die
1. Monolithic
Electronic components and their connections (wiring) are built in layers on a single semiconductor wafer, which is then diced into 3D ICs. There is only one substrate, hence no need for aligning, thinning, bonding, or through-silicon vias.
2. Wafer on wafer
Electronic components are built on two or more
semiconductor wafers, which are then aligned, bonded, and diced into 3D ICs.
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3. Die on wafer
Electronic components are built on two
semiconductor wafers. One wafer is diced aligned

and bonded onto die sites of the second wafer.
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4.Die on die
Electronic components are built on multiple dice,
which are then aligned and bonded.

One advantage of die-on-die is that each
component die can be tested first, so that one

bad die does not ruin an entire stack
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AVANTAGES OF 3D ARCHITECTURE
3D integration can reduce the wiring, thereby
reducing the capacitances, power dissipation and

chip area improves performance.
Digital and analog circuits can be formed with
better noise performance.

It more cost effective then 2D integration.
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PERFORMANCE CHARACTERISTICS
TIMING 2. ENERGY
1.
With shorter interconnects in 3D ICs, both switching energy and cycle time are expected to be reduced
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1. TIMING
The graph shows the
results of a reduction in wire length due to 3D routing.

Reduction in the
interconnect lengths reduces RC delays and increase chip timing performance

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2. ENERGY PERFOMANCE
The graph shows
the reduction in a normalized energy consumption with number of wire layers.
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CONCERNS IN 3D CIRCUIT
Thermal Issues in 3D-circuits
Reliability Issues
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PRESENT SCENARIO IN 3D IC INDUSTRY

Many companies like MIT (USA), IBM are doing research on 3D IC technology and they are going to introduce cheaper chips for certain
applications, like memory used in digital cameras,

cell phones, handheld gaming devices etc.
The original cost will be 10 times lesser than the current ones.
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FUTURE OF THE 3-D IC INDUSTRY

Matrix is working with partners including Microsoft
Corp, Thomas Multimedia, Eastman Kodak and Sony Corp. three product categories are planned: bland memory cards: cards sold preloaded with content, such as software or music ; and standard memory packages. Thomson electronics, the European electronic giant, will begin to incorporate 3-D memory chips from matrix semiconductor in portable storage cards, a strong endorsement for the chip start up.
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CONCLUSION
3D ICs will be the first of a new generation of
dense, inexpensive chips having less delay and

interconnection losses that will replace the conventional storage and recording media. We can understand that 3-D ICs chip power
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are an attractive alleviate also the
architecture, dissipation
that and
can can
interconnect related problems such as delay and

facilitate integration of heterogeneous technologies in one
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QUERIES???
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A Presentation On 3D ICs Presented in partial fulfillment of Bachelors Degree in Technology Electronics & Communication Engineering

PRESENTED Shubham Manglik (EC/09/50)

Department of Electronics and Communication Engineering Poornima College Engineering, Jaipur

PRESENT SCENARIO IN 3D IC INDUSTRY

the layers communicate using on-chip signaling, whether vertically or horizontally.

consumption, 3D IC technology is introduced.

the frequency of 1.4GHz.

LIMITED PERFORMANCE OF 2D ICs

3D IC is a concept that can significantly : Improve interconnect performance,

MANUFACTURING TECHNOLOGY OF 3D ICs

semiconductor wafers. One wafer is diced aligned

which are then aligned and bonded.

component die can be tested first, so that one

reducing the capacitances, power dissipation and

better noise performance.

results of a reduction in wire length due to 3D routing.

interconnect lengths reduces RC delays and increase chip timing performance

the reduction in a normalized energy consumption with number of wire layers.

PRESENT SCENARIO IN 3D IC INDUSTRY

applications, like memory used in digital cameras,

FUTURE OF THE 3-D IC INDUSTRY

dense, inexpensive chips having less delay and

are an attractive alleviate also the

interconnect related problems such as delay and

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