50PJ350
50PJ350
50PJ350
MODEL : 50PJ350
CAUTION
50PJ350-SA
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL63140202(1004-REV00)
Printed in Korea
CONTENTS
CONTENTS ............................................................................................................................... 2 SAFETY PRECAUTIONS ...........................................................................................................3 SPECIFICATION.........................................................................................................................4 ADJUSTMENT INSTRUCTION ..................................................................................................8 BLOCK DIAGRAM ...................................................................................................................15 EXPLODED VIEW ...................................................................................................................16 SVC. SHEET ................................................................................................................................
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB. Keep wires away from high voltage or high temperature parts. Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.
AC Volt-meter
1.5 Kohm/10W
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application Range
(1) This spec sheet is applied all of PDP TV with PB02A chassis. Model Name 50PJ350-SA Market Brazil Brand LG
2. Specification
Each part is tested as below without special appointment. (1) Temperature : 25 C 5 C (77 F 9 F), CST : 40 C 5 C (2) Relative Humidity : 65 % 10 % (3) Power Voltage : Standard input voltage (100 V - 240 V ~ 50 / 60 Hz) * Standard Voltage of each product is marked by models (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. (5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test Method
(1) Performance : LGE TV test method followed. (2) Demanded other specification Safety : UL, CSA, IEC specification, CE EMC : FCC, ICES, IEC specification, CE Model Name 50PJ350-SA Market Brazil Appliance Safety : IEC/EN60065
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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4. General Specification
No 1. 2. Item Receiving System Available Channel Specification 1) SBTVD / NTSC / PAL-M / PAL-N 1) VHF : 02~13 2) UHF : 14~69 3) DTV : 07-69 (VHF high/UHF) 4) CATV : 02~135 3. 4. 5. Input Voltage Market Screen Size 1)AC 100 ~ 240V 50/60Hz BRAZIL 127 cm (50 inch) Wide(1365 X 768) 106 cm (42 inch) Wide(1024 X 768) 6. 7. 8. Aspect Ratio Tuning System Module 16:9 FS PDP50T1#### (1365 X 768) PDP42T1#### (1024 X 768) 9. 10. Operating Environment Storage Environment 1) Temp : 0 deg ~ 40 deg 2) Humidity : ~ 80 % 1)Temp : -20 deg ~ 60 deg 2) Humidity : 0 ~ 90 % 50PJ350-SA, 50PJ250-SA 42PJ350-SA, 42PJ250-SA 42PJ230-SB 50PJ350-SA, 50PJ250-SA 42PJ350-SA, 42PJ250-SA 42PJ230-SB Remark
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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7. HDMI Input(PC/DTV)
No 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 11 12 Resolution PC 640*350 720*400 640*480 800*600 1024*768 1280*768 1360*768 1280*1024 1600*1200 1920*1080 DTV 720*480 720*480 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 31.50 31.47 45.00 44.96 33.75 33.72 67.50 67.432 27.00 26.97 33.75 33.71 60 59.94 60.00 59.94 60.00 59.94 60 59.94 24.00 23.976 30.00 29.97 27.027 27.00 74.25 74.176 74.25 74.176 148.50 148.352 74.25 74.176 74.25 74.176 SDTV 480P SDTV 480P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P 31.468 31.469 31.469 37.879 48.363 47.776 47.712 63.981 75.00 67.5 70.09 70.08 59.94 60.31 60.00 59.870 60.015 60.020 60.00 60 25.17 28.32 25.17 40.00 65.00 79.5 85.50 108.00 162 148.5 EGA DOS VESA(VGA) VESA(SVGA) VESA(XGA) CVT(WXGA) VESA (WXGA) VESA (SXGA) VESA (UXGA) HDTV 1080P H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed DDC X 0 0 0 0 0 0 0 0 0
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB02A Chassis applied PDP TV all models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. But it is flexible when its factory local problem occurs. (3) The adjustment must be performed in the circumstance of 25 cC 5 cC of temperature and 65 % 10 % of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep 100 V - 240 V, 50 / 60 Hz. (5) Before adjustment, execute Heat-Run for 5 minutes. After Receive 100% Full white pattern (06CH) then process Heat-run (or 8. Test pattern condition of Ez-Adjust status) V How to make set white pattern 1) Press Power ON button of Service Remocon 2) Press ADJ button of Service remocon. Select 10. Test pattern and, after select White using navigation button, and then you can see 100% Full White pattern. * In this status you can maintain Heat-Run useless any pattern generator * Notice: if you maintain one picture over 20 minutes (Especially sharp distinction black with white pattern 13Ch, or Cross hatch pattern 09Ch) then it can appear image stick near black level.
V
- Adjust 3 items at 3-1 PCB assembly adjustments (3) Adjustment sequence one after the order. (1) Adjustment protocol
< See ADC Adjustment RS232C Protocol_Ver1.0 > (2) Necessary items before Adjustment items O Pattern Generator : (MSPG-925FA) O Adjust 480i Comp1 (MSPG-925FA:model :209, pattern :65) Comp1 Mode O Adjust 1080p Comp1 (MSPG-925FA:model :225 , pattern :65) Comp1 Mode O Addjust RGB (MSPG-925FA:model :225 , pattern :65) RGB-PC Mode * If you want more information then see the below Adjustment method (Factory Adjustment) (3) Adjustment sequence O aa 00 00: Enter the ADC Adjustment mode. O xb 00 40: Change the mode to Component1 (No actions) O ad 00 10: Adjust 480i Comp O ad 00 10: Adjust 1080p comp O xb 00 60: Change to RGB-PC mode(No action) O ad 00 10: Adjust 1080p RGB O xb 00 90: Endo of Adjustmennt
3. Adjustment items
3-1. PCB Assembly adjustment
(1) Adjust 480i Comp1 (2) Adjust 1080p Comp1/RGB - If it is necessary, it can adjustment at Manufacture Line - You can see set adjustment status at 9. ADJUST CHECK of the In-start menu
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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5. Factory Adjustment
-> PB02A : USE INTERNAL ADC(S7) : using internal pattern.
< Adjustment pattern : 480i / 1080p 60Hz Pattern > * You must make it sure its resolution and pattern cause every instrument can have different setting 2) Adjustment method 480i Comp1, Adjust 1080p Comp1/RGB (Factory adjustment) O ADC 480i Component1 adjustment - Check connection of Component1 - MSPG-925FA Model: 209, Pattern 65 O Set Component 480i mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to NORMAL O ADC 1080p Component1 / RGB adjustment - Check connection both of Component1 and RGB - MSPG-925FA Model: 225, Pattern 65 O Set Component 1080p mode and 100% Horizontal Color Bar Pattern(HozTV31Bar), then set TV set to Component1 mode and its screen to NORMAL O After get each the signal, wait more a second and enter the IN-START with press IN-START key of Service remocon. After then select 7. External ADC with navigator button and press Enter. O After Then Press key of Service remocon Right Arrow(VOL+) O You can see ADC Component1 Success O Component1 1080p, RGB 1080p Adjust is same method. O Component 1080p Adjustment in Component1 input mode O RGB 1080p adjustment in RGB input mode O If you success RGB 1080p Adjust. You can see ADC RGB-DTV Success
5-3. EDID(The Extended Display Identification Data) / DDC(Display Data Channel) download
(1) Summary 1) It is established in VESA, for communication between PC and Monitor without order from user for building user condition. It helps to make easily use realize Plug and Play function. 2) For EDID data write, we use DDC2B protocol.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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< For write EDID data, setting Jig and another instruments >
- EDID data (Model name = LG TV) - 2010 EDID DATA CHECK SUM. BLOCK(0) HD HDMI1 HDMI2 HDMI3 RGB FHD HDMI1 HDMI2 HDMI3 HDMI4 RGB 3B 3B 3B A3 3B 3B 3B 3B A3 BLOCK(1) 2C 1C 0C 25 2C 1C 0C FC 25
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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(3) White Balance Adjustment - If you cant adjust with inner pattern, then you can adjust it using HDMI pattern. You can select option at Ez-Adjust Menu 7. White Balance there items NONE, INNER, HDMI. It is normally setting at inner basically. If you cant adjust using inner pattern you can select HDMI item, and you can adjust. - In manual Adjust case, if you press ADJ button of service remocon, and enter Ez-Adjust Menu 7. White Balance, then automatically inner pattern operates. (In case of Inner originally Test-Pattern. On will be selected in The Test-Pattern. On/Off. Connect all cables and equipments like Pic.5) Set Baud Rate of RS-232C to 115200. It may set 115200 orignally. O Connect RS-232C cable to set O Connect HDMI cable to set
O O
* See Working Guide if you want more information about EDID communication.
[CMD wb wb wb wb wb wb
ID 00 00 00 00 00 00
DATA] 00 10 1f 20 2f ff
Meaning White Balance adjustment start. Start of adjust gain (Inner white pattern) End of gain adjust Start of offset adjust (Inner white pattern) End of offset adjust End of White Balance adjust (Inner pattern disappeared)
wb 00 00: Start Auto-adjustment of white balance. wb 00 10: Start Gain Adjustment (Inner pattern) O jb 00 c0 : O O wb 00 1f: End of Adjustment * If it needs, offset adjustment (wb 00 20-start, wb 00 2fend) O wb 00 ff: End of white balance adjustment (inner pattern disappear) < Connection Diagram for Adjustment White balance >
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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Adjustment Mapping information RS-232C COMMAND [CMD ID DATA] Cool Mid Warm jd je jf 00 00 00 MIN CENTER (DEFAULT) Cool 184 187 192 64 64 64 Mid 192 183 161 64 64 64 Warm 192 159 95 64 64 64 192 192 192 127 127 127 MAX
jg jh ji
Ja Jb Jc
Using CS-1000 Equipment. - COOL : T=11000K, _uv=0.000, x=0.276 y=0.283 - MEDIUM : T=9300K, _uv=0.000, x=0.285 y=0.293 - WARM : T=6500K, _uv=0.000, x=0.313 y=0.329
Using CA-210 Equipment. (10 CH) - Contras value : 216 Gray Color Test Color Coordination
O
When Color temperature (White balance) Adjustment (Automatically) - Press Power only key of service remocon and operate automatically adjustment. - Set BaudRate to 115200. O You must start wb 00 00 and finish it wb 00 ff. O If it needs, then adjustment Offset.
- Brighness spec. Item White average brightness Brightness uniformity -20 +20 % Min 49 Typ Max Unit Remark 60 cd/m - 100%Window White Pattern - 100IRE(255Gray) - Picture: Vivid(Medium ) - 85IRE(216Gray) 100% Window White Pattern - Picture: Vivid(Medium)
(4) White Balance Adjustment (Manual adjustment) 1) Test Equipment: CA-210 - Using PDP color temperature, Color Analyzer (CA210) must use CH 10, which Matrix compensated (White, Red, Green, Blue compensation) with CS2100. See the Coordination bellowed one. 2) Manual adjustment sequence is like bellowed one. - Turn to Ez-Adjust mode with press ADJ button of service remocon. - Select 10.Test Pattern with CH+/- button and press enter. Then set will go on Heat-run mode. Over 30 minutes set let on Heat-run mode. - Let CA-210 to zero calibration and must has gap more 10cm from center of PDP module when adjustment. - Press ADJ button of service remocon and select 7.White-Balance in Ez-Adjust then press G button of navigation key. (When press G button then set will go to full white mode) - Adjust at three mode (Cool, Medium, Warm) - If cool mode Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G gain adjustment High Light adjustment. - If Medium and Warm mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - All of the three mode Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B gain adjustment High Light adjustment. - With volume button (+/-) you can adjust. - After all adjustment finished, with Enter (_ key) turn to Ez-Adjust mode. Then with ADJ button, exit from adjustment mode
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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10-1. ADC-Set.
R-Gain adjustment Value (default 128) G-Gain adjustment Value (default 128) V B-Gain adjustment Value (default 128) V R-Offset adjustment Value (default 128) V G-Offset adjustment Value (default 128) V B-Offset adjustment Value (default 128)
V V
20 23 70 75
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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Put the USB Stick to the USB socket Press Menu key, and move OPTION
V V
After download is finished, remove the USB stick. Press IN-START key of ADJ remote control, check the S/W version.
CAUTION - DO NOT REMOVE USB MEMORY CARD FROM USB PORT WHEN YOU FIND BELOW DESCRIPTION - " Do not remove the memory card from the port! "
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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BLOCK DIAGRAM
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
- 15 -
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
400
601
602
208
520
604
200
206
590
205
910
900 240 580 201 501 207 305 302 204 202 203 301 120 300 302 303
LV1
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
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A2
A10
A9
A12
VCC_1.5V_DDR
VCC_1.5V_DDR VCC_1.5V_DDR 1K 1%
VCC_1.5V_DDR
VCC_1.5V_DDR
R1201
R1204
1K 1%
R1224
0.1uF
1000pF
1000pF
1000pF
0.1uF
0.1uF
1%
A-MVREFCA 0.1uF C1216 C1205 0.1uF C1217 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C1211 C1206 C1207 C1210 C1212 C1213 C1214 C1215 C1219 C1220 C1221 0.1uF C1208 C1222 C1223 0.1uF 0.1uF C1235 0.1uF C1218 C1224 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C1234 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C1229 C1228 C1232 C1238 C1236 C1237 C1239 C1241 C1242 C1227 C1230 C1231 C1233 C1243 C1244 C1245 C1246 10uF 10uF
1K 1%
R1202
1%
1% C1250 1K
B-MVREFCA
B-MVREFDQ R1225
1K 1%
C1201
C1202
C1204
C1203
C1247
C1248
VCC_1.5V_DDR
+1.5V_DDR_IN
L1201 B-TMA0 R1213 10 R1214 10 AR1208 C1225 10uF 10V C1226 0.1uF 16V R1215 10 R1216 10 AR1211 B-MA0 B-MA2
A-MA0 A-MA2
A-TMA0 A-TMA2
B-MA11 B-MA1 B-MA8 B-MA6 10 AR1214 B-MA0 B-MBA0 B-MA3 B-MA5 B-MA7 10 AR1215 B-MA1 B-MA2 B-MA3 B-MA4 B-MA5 B-MA6 B-MA4 B-MA12 B-MBA1 B-MA10 10 AR1219 B-MA7 B-MA8 B-MA9 B-MA10 B-MA11 B-MA12 B-MRESETB B-MBA2 B-MA13 B-MA9 10 R1222 10 R1223 10 AR1220 R1238 R1237 B-MCK B-MCK B-MCKB B-MCKB B-MRASB B-MCASB B-MODT 10 B-MWEB VCC_1.5V_DDR R1219 10 R1220 10 R1217 10 R1218 10 AR1212 R1232 10K C1240 B-MBA0 B-MBA1 56 B-MBA2 M2 N8 M3 B-MA13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7
IC1202 H5TQ1G63BFR-H9C
M8
IC1201 H5TQ1G63BFR-H9C
M8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 A-MODT A-MRASB A-MCASB A-MWEB A-MRESETB VCC_1.5V_DDR R1231 10K A-MCKE
A-MA11 A-MA1 A-MA8 A-MA6 A-MA0 A-MA1 A-MA2 A-MA3 A-MA4 A-MA5 A-MA6 A-MA7 A-MA8 A-MA9 A-MA10 A-MA11 A-MA12 A-MA13 A-MRESETB A-MBA2 A-MA13 R1236 R1235 A-MBA0 A-MBA1 A-MBA2 A-MCK 56 C1209 0.01uF A-MCKB A-MCKB A-MRASB A-MCASB A-MODT A-MWEB 10 A-MDQSL A-MDQSLB R1208 10 R1209 10 R1211 10 R1212 10 AR1209 A-MDQL1 A-MDQL3 A-MDML A-MDQU2 10 AR1210 A-MCKE A-MDQL7 A-MDQL5 10 AR1205 A-MDQL0 A-MDQL2 A-MDQL6 A-MDQL4 10 AR1206 A-MDQU7 A-MDQU3 A-MDQU5 A-MDMU 10 AR1207 A-MDQU6 A-MDQU0 A-MDQU4 10 A-MDQU1 R1210 10 R1233 10K A-MA9 10 A-MCK R1206 10 R1207 10 AR1202 A-MA4 A-MA12 A-MBA1 A-MA10 10 AR1201 A-MBA0 A-MA3 A-MA5 A-MA7 10 AR1204 10 AR1203
VREFCA
B-MVREFCA
A-MVREFCA
VREFCA
A0 A1 A2
B-TMBA0
H1
A-TMBA0 A-TMA3 A-TMA5 A-TMA7 A-TMA0 A-TMA4 A-TMA12 A-TMBA1 A-TMA10 A-TMA1 A-TMA2 A-TMA3 A-TMA4 A-TMA5 A-TMA6 A-TMA7 A-TMRESETB A-TMBA2 A-TMA13 A-TMA9 A-TMA8 A-TMA9 A-TMA10 A-TMA11 A-TMA12 A-TMCK A-TMCKB A-TMBA0 A-TMRASB A-TMCASB A-TMODT A-TMWEB A-TMBA1 A-TMBA2 A-TMCK A-TMCKB A-TMCKE A-TMDQSL A-TMDQSLB A-TMDQSU A-TMDQSUB A-TMODT A-TMRASB A-TMCASB A-TMWEB A-TMRESETB C20 A20 B20 A21 C22 A-TMA13 B8 B9 A8 C21 B10 A22 A10 B22 C9 C23 B11 A9 C10 B23
VREFDQ
A3 A4 A5
VREFDQ
H1
ZQ
L8
L8
ZQ
A6 A7 A8
A_DDR3_A0/DDR2_A13 A_DDR3_A1/DDR2_A8 A_DDR3_A2/DDR2_A9 A_DDR3_A3/DDR2_A1 A_DDR3_A4/DDR2_A2 A_DDR3_A5/DDR2_A10 A_DDR3_A6/DDR2_A4 A_DDR3_A7/DDR2_A3 A_DDR3_A8/DDR2_A6 A_DDR3_A9/DDR2_A12 A_DDR3_A10/DDR2_RASZ A_DDR3_A11/DDR2_A11 A_DDR3_A12/DDR2_A0 A_DDR3_A13/DDR2_A7
B_DDR3_A0/DDR2_A13 B_DDR3_A1/DDR2_A8 B_DDR3_A2/DDR2_A9 B_DDR3_A3/DDR2_A1 B_DDR3_A4/DDR2_A2 B_DDR3_A5/DDR2_A10 B_DDR3_A6/DDR2_A4 B_DDR3_A7/DDR2_A3 B_DDR3_A8/DDR2_A6 B_DDR3_A9/DDR2_A12 B_DDR3_A10/DDR2_RASZ B_DDR3_A11/DDR2_A11 B_DDR3_A12/DDR2_A0 B_DDR3_A13/DDR2_A7
B-TMA0 B-TMA1 B-TMA2 B-TMA3 B-TMA4 B-TMA5 B-TMA6 B-TMA7 B-TMA8 B-TMA9 B-TMA10 B-TMA11 B-TMA12 B-TMA13
B2 D9 G7 K2 K8 N1 N9 R1 R9 VCC_1.5V_DDR
B2 D9 G7 K2 K8 N1 N9 R1 VCC_1.5V_DDR R9
B-TMCK B-TMCKB
VDDQ_1 CK CK CKE CS ODT RAS CAS WE NC_1 RESET NC_2 NC_3 NC_4 DQSL DQSL DQSU DQSU DML DMU DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 NC_6 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
A1 A8 C1 C9 D2 E9 F1 H2 H9 J1 J9 L1 L9 T7
A1 A8 C1 C9 D2 E9 F1 H2 H9 J1 J9 L1 L9 T7
0.01uF
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 NC_1 NC_2 NC_3 NC_4 NC_6 DQSL DQSL RESET CS ODT RAS CAS WE CK CK CKE
56
B-TMRASB B-TMBA0 B-TMBA1 B-TMBA2 B-TMCK B-TMCKB B-TMCKE B-TMCASB B-TMODT B-TMWEB
A_DDR3_MCLKZ/DDR2_MCLKZ B_DDR3_MCLKZ/DDR2_MCLKZ
F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3
F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3
A-MDQSL A-MDQSLB A-MDQSU A-MDQSUB A-MDML A-MDMU A-MDQL0 A-MDQL1 A-MDQL2 A-MDQL3 A-MDQL4 A-MDQL5 A-MDQL6 A-MDQL7 A-MDQU0 A-MDQU1 A-MDQU2 A-MDQU3 A-MDQU4 A-MDQU5 A-MDQU6 A-MDQU7
A-MDQSU A-MDQSUB
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
DQSU DQSU DML DMU DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
B-TMDQL1 B-TMDQL3 B-TMDML B-TMDQU2 10 AR1213 B-TMCKE B-TMDQL7 B-TMDQL5 10 AR1216 B-TMDQL0 B-TMDQL2 B-TMDQL6 B-TMDQL4 10 AR1217 B-TMDQU7 B-TMDQU3 B-TMDQU5 B-TMDMU 10 AR1218 B-TMDQU6 B-TMDQU0 B-TMDQU4 10 B-TMDQU1 R1221 10
B-MDML B-MDMU B-MDQL0 B-MDQL1 B-MDQL2 B-MDQL3 B-MDQL4 B-MDQL5 B-MDQL6 B-MDQL7
C16 B16 A16 C15 A14 B18 C18 B13 A19 C13 C19 A13 B19 C12 A15 A17 B14 C17 B15 A18 C14 B17
A_DDR3_DQSL/DDR2_DQS0
B_DDR3_DQSL/DDR2_DQS0
J25 J24 H26 H25 F26 L24 L25 F24 L26 F25 M25 E26 M24 E25 G26 J26 G24 K25 H24 K26 G25 K24
B-TMDQSL B-TMDQSLB B-TMDQSU B-TMDQSUB B-TMDML B-TMDMU B-TMDQL0 B-TMDQL1 B-TMDQL2 B-TMDQL3 B-TMDQL4 B-TMDQL5 B-TMDQL6 B-TMDQL7 B-TMDQU0 B-TMDQU1 B-TMDQU2 B-TMDQU3 B-TMDQU4 B-TMDQU5 B-TMDQU6 B-TMDQU7
A_DDR3_DQSLB/DDR2_DQSB0 B_DDR3_DQSLB/DDR2_DQSB0 A_DDR3_DQSU/DDR2_DQSB1 A_DDR3_DQSUB/DDR2_DQS1 A_DDR3_DML//DDR2_DQ13 A_DDR3_DMU/DDR2_DQ6 A_DDR3_DQL0/DDR2_DQ3 A_DDR3_DQL1/DDR2_DQ7 A_DDR3_DQL2/DDR2_DQ1 A_DDR3_DQL3/DDR2_DQ10 A_DDR3_DQL4/DDR2_DQ4 A_DDR3_DQL5/DDR2_DQ0 A_DDR3_DQL6/DDR2_CKE A_DDR3_DQL7/DDR2_DQ2 A_DDR3_DQU0/DDR2_DQ15 A_DDR3_DQU1/DDR2_DQ9 A_DDR3_DQU2/DDR2_DQ8 A_DDR3_DQU3/DDR2_DQ11 A_DDR3_DQU4/DDR2_DQM1 A_DDR3_DQU5/DDR2_DQ12 A_DDR3_DQU6/DDR2_DQM0 A_DDR3_DQU7/DDR2_DQ14 B_DDR3_DQSU/DDR2_DQSB1 B_DDR3_DQSUB/DDR2_DQS1 B_DDR3_DML/DDR2_DQ13 B_DDR3_DMU/DDR2_DQ6 B_DDR3_DQL0/DDR2_DQ3 B_DDR3_DQL1/DDR2_DQ7 B_DDR3_DQL2/DDR2_DQ1 B_DDR3_DQL3/DDR2_DQ10 B_DDR3_DQL4/DDR2_DQ4 B_DDR3_DQL5/DDR2_DQ0 B_DDR3_DQL6/DDR2_CKE B_DDR3_DQL7/DDR2_DQ2 B_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU2/DDR2_DQ8 B_DDR3_DQU3/DDR2_DQ11 B_DDR3_DQU4/DDR2_DQM1 B_DDR3_DQU5/DDR2_DQ12 B_DDR3_DQU6/DDR2_DQM0 B_DDR3_DQU7/DDR2_DQ14
A-TMDML A-TMDMU A-TMDQL0 A-TMDQL1 A-TMDQL2 A-TMDQL3 A-TMDQL4 A-TMDQL5 A-TMDQL6 A-TMDQL7
B1 B9 D1 D8 E2 E8 F9 G1 G9
B1 B9 D1 D8 E2 E8 F9 G1 G9
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
B-MDQU1
A-TMDQU1
10K
R1234
B-MCKE
A-MCKE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
C1249
1K
1K
1K
EAX61373301 DDR
09/04/02
12 13
R1228
R1227
VCC_1.5V_DDR
USB1 SIDE
+3.3V
Capacitors on VBUSA should be placed as closd to connector as possible.
SWITCH ADDED
250_350 IC1101 AP2191SG-13
NC 8 1 GND
+3.3V R1141 10K READY R1145 22 USB1_CTL P_+5V C1120 0.1uF 16V 250_350
250_350
OUT_2
OUT_1
$0.11
IN_1
R1124
22
IN_2
FLG
EN
250_350
250_350
250_350
KJA-UB-4-0004 P1102
USB1_DM_to_MAIN USB1_DP_to_MAIN D1100 CDS3C05HDMI1 5.6V READY D1102 CDS3C05HDMI1 5.6V READY
10mm
USB2 REAR(SVC)
L1100 0LCML00003B MLB-201209-0120P-N2
PJ230 JK1100 KJA-UB-0-0037
USB2_DM_to_MAIN USB2_DP_to_MAIN D1101 CDS3C05HDMI1 5.6V READY D1103 CDS3C05HDMI1 5.6V READY
4 5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
SIDE CVBS
250_350
5A 4A
[YL]E-LUG [YL]O-SPRING
C1016 47pF 50V
SIDE_CVBS_IN
3A [YL]CONTACT
+3.3V
R1036 10K
D1022 30V
R1044 75
4B
[WH]O-SPRING
3C [RD]CONTACT 4C 5C PPJ235-01
D1021
[RD]O-SPRING [RD]E-LUG
R1038
470K
R1026 10K
+3.3V_AVDD D1019
R1039 10K
R1043
12K
R1010 470K
AV 1
D1020 30V
SIDE_CVBS_DET
JK1002
C1015 820pF
SIDE_LIN
R1037
D1005 30V
R1014 75
COMPONENT 2
SPDIF
+3.3V
R1058 1K
R1015 470K
D1007 5.6V
R1016 470K
+3.3V
[RD2]O-SPRING_1 [RD2]E-LUG-S [BL2]O-SPRING [BL2]E-LUG-S [GN2]CONTACT [GN2]O-SPRING [GN2]E-LUG [RD3]E-LUG [RD3]O-SPRING_2 [RD3]CONTACT [WH3]O-SPRING [RD3]O-SPRING_1 [RD3]E-LUG-S [BL3]O-SPRING [BL3]E-LUG-S [GN3]CONTACT [GN3]O-SPRING
D1015 D1014 30V R1064 0 1/16W 5% D1013 30V R1020 75 R1063 0 1/16W 5% R1021 75 D1011 5.6V D1010 30V R1062 0 1/16W 5% R1005 75 D1009 30V R1061 0 1/16W 5% D1008 30V R1060 0 1/16W 5% R1012 75 R1013 75
GND
NAND GATE
2 3 4
R1042
R1011 470K
R1032 12K
12K
R1023 10K
470K
AV_LIN
C1014 820pF
SIDE_RIN
JK1003 JST1223-001
Fiber Optic
COMP2_Y-
R1029 10K
R1018 470K
COMPONENT 1
C1027 820pF 50V R1030 10K C1028 820pF 50V READY C1029 10pF 50V
D1012 5.6V
R1004 470K
COMP1_Pr+
COMP1_Pr-
COMP1_DET
[GN3]E-LUG
R1022 75
COMP1_Y+
COMP1_Y-
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
EAX61373301 JACK 10 13
4 FIX_POLE
COMP2_Pb+
C1022 22pF
COMP2_Pb-
VINPUT
VCC
250_350
D907
D904
D905
P900 SPG09-DB-010
C900 0.1uF 16V
D906
D908
RGB
+3.3V DSUB_R
R906 75
L902 R956 R957 0 G R958 4.7K R951 4.7K G
+3.3V
6 1 2 3 9 4 10 5 16 15 14 7 8 13 11 12
RED_GND GND_2 RED GREEN_GND DDC_DATA GREEN BLUE_GND H_SYNC BLUE NC V_SYNC GND_1 SYNC_GND DDC_CLOCK DDC_GND R974 R973 0 0
R952 0
R953 4.7K
DSUB_RDDC_SDA/UART_TX
4.7K
FHD LVDS
FHD 22 SCL1 52 51
R908 75
DSUB_GL904
Q904 2N7002(F)
Q903 2N7002(F)
DSUB_G
R959
22
SDA1
R954
R917 1K
50
PC_SER_CLK PC_SER_DATA R968 FHD 22 R969 FHD 100 R970 FHD 22 SCL1_1 DISP_EN SDA1_1
READY SHILED
DSUB_DET
HD
+3.3V
R963
49 48
P903 SMW200-26C
+3.3V
R964 3.3K
47 46 45 44 43 MOD_ROM_RX 42 41
R907 75
R915 22 R916 22
DSUB_B DSUB_B-
3.3K
2
DSUB_HSYNC DSUB_VSYNC
MOD_ROM_TX
1 3 5 7 9 11 13 15 17 19 21 23 25
R949 HD 100 R960 27K R961 HD 22 SCL1_1 RXB0RXB1RXB2RXBCKRXB3RXB4PC_SER_CLK DISP_EN
4 6 8
R962 HD
22
10 12 14 16 18 20 22 24 26
40 39 38 37 36 35 34 33 32 31 30 29 28
DDC_SCL/UART_RX
RXB2+ RXBCK+
GND
RXACK+ RXACK-
250_350
IC901 AT24C02BN-10SU-1.8
8
+5V_ST
PC_SER_DATA
2 7 3 6
R912 18K
EDID_WP
R923 4.7K
C922 0.1uF
HD LVDS
DDC_SCL/UART_RX DDC_SDA/UART_TX RGB_DDC_SCL RGB_DDC_SDA
27 26 25 24 23 22 21 20 19 18 17 16 15 14
R932 0 R934 0
RXBCK+ RXBCK-
+3.3V_ST
13
RS232C
PC AUDIO
C910 0.1uF 50V 250_350 JK900 PEJ027-01 3 6A E_SPRING T_TERMINAL1 B_TERMINAL1 R_SPRING T_SPRING B_TERMINAL2 T_TERMINAL2 D911 5.6V C921 820pF 50V R933 10K R927 470K D910 5.6V C920 820pF 50V R931 10K R926 470K R935 12K IR PC_LIN R938 10K KEY1 L906 MLB-201209-0120P-N2 R937 4.7K R945 22 C926 10pF D913 READY R914 4.7K C931 10pF R946 22 R947 C924 22 10pF READY C923 10pF READY 6 C930 10pF R941 10K C925 10pF L903 MLB-201209-0120P-N2
12 11 10 9 8
DOUT2
RIN2
C2-
C2+
C1-
C1+
V-
V+
7 6 5 4 3 2 1 MOD_ROM_TX MOD_ROM_RX
IC900 MAX3232CDR
$0.179
14 15 16
7A 4
10
11
12
13
GND
ROUT2
ROUT1
+3.3V_ST
DOUT1
DIN2
DIN1
RIN1
VCC
5 7B 10K R918 6B
R901 4.7K
READY 5% 1/10W
TF05-51S P904
R936 12K
R905 100
R904 100
KEY2
PC_SER_DATA PC_SER_CLK
+3.3V
IR
F o r 2 3 0 D e b u g g i n g PJ230
P906 12507WR-03L PJ230 R980 0
SUB_SCL
SUB_SDA
READY
100K R919
+3.3V_ST 1 +3.3V 2
DDC_SCL/UART_RX
R981 0
L900 MLB-201209-0120P-N2
READY
P901
100K R920
DDC_SDA/UART_TX
L901 MLB-201209-0120P-N2
PJ230 3 4 LED_WHITE
11
12 13
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
EAX61141601 LVDS/RS232//RGB 9 13
SIDE HDMI
5V_DET_HDMI_3 5V_HDMI_3 C R851 B 10K Q806 2SC3875S(ALY) 250_350 5V_HDMI_4 5V_DET_HDMI_4
SHIELD JACK_GND
HPD3 R857 1K C Q807 2SC3875S(ALY) C810 E 0.1uF 16V 22 22 DDC_SDA_4 DDC_SCL_4 R878 0 R869 10K B HPD4
SHIELD 20
$ 0 . 4 7 19 ->$0.28 18
READY R823 1K C803 R822 R824 0.1uF 1.8K 3.3K 16V READY READY READY D806 READY READY R826 AVRL161A1R1NT 22 R827 22
20
$0.47 - > $ 0 . 2 719
20
$0.27
19 18
DDC_SDA_3 DDC_SCL_3
HPD +5V_POWER DDC/CEC_GND SDA SCL NC CEC CLKCLK_SHIELD CLK+ DATA0DATA0_SHIELD DATA0+ DATA1DATA1_SHIELD DATA1+ DATA2DATA2_SHIELD DATA2+
R856 1.8K
R860 3.3K
18 17 16 15 14 13
CEC_REMOTE EAG59023302 CK-_HDMI4
17 16 15 14 13 12
EAG59023301
R845 R844
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
DDC_SDA_2 DDC_SCL_2
READY R828 0
R846
CEC_REMOTE CK-_HDMI3
READY
CEC_REMOTE CK-_HDMI2
12 11 10
9 8 7 6 5 4 3 2 1 CK+ D0D0_GND D0+ D1D1_GND D1+ D2D2_GND D2+
11 10
9 8 7 6 5 4 3 2 1
CK+ D0D0_GND D0+ D1D1_GND D1+ D2D2_GND D2+ D2+_HDMI3 D1+_HDMI3 D2-_HDMI3 D0+_HDMI3 D1-_HDMI3 CK+_HDMI3 D0-_HDMI3
CK+_HDMI2 D0-_HDMI2
CK+_HDMI4 D0-_HDMI4
D0+_HDMI2 D1-_HDMI2
D0+_HDMI4 D1-_HDMI4
D1+_HDMI2 D2-_HDMI2
D1+_HDMI4 D2-_HDMI4
D2+_HDMI2
JK803
KJA-ET-0-0032 JK804
GND
10mm
GND
5V_HDMI_3 +5V
A2
A1
A2
A1
D804 ENKMC2838-T112
A0
A0
A0
A1
WP
R850 18K
EDID_WP R848 R849 22 22
R852 18K
R853 18K
DDC_SCL_3
A1
WP
R864 18K
EDID_WP R862 22 R863 22
A1
WP
R867 18K
R868 18K
DDC_SCL_4
A2
SCL
A2
SCL
A2
SCL
GND
SDA
R829
22
ENKMC2838-T112 D805
A2
A1
GND
SDA
GND DDC_SDA_3
SDA
DDC_SDA_4 GND
READY
DDC_SDA_2
GND
+3.3V
+3.3V_ST
R875 READY R871 0 G R800 68K R870 68K Q800 BSS83 D801 MMBD301LT1G CEC_REMOTE HDMI_CEC_S7 HDMI_JACK R872 0 READY S7 CEC_REMOTE D802 MMBD301LT1G D B S D B S R873 G
0 R877 68K
MICOM_CEC_ON/OFF
Q801 BSS83
HDMI_JACK
R874 0 READY
HDMI_CEC MICOM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
EAX61373301 HDMI 8 13
HDMI
AMP
+3.3V
L703 120-ohm +3.3V_AU_AVDD
1 u F 25V
R713 470
2200pF
4700pF
R705 0
L702
120-ohm
+3.3V_DVDD
C713
C712
C708
10 PLL_FLTM 9 AVSS
12 VR_ANA 11 PLL_FLTP
4 BST_A 3 PVDD_A_2
2 PVDD_A_1 1 OUT_A
0.047uF
470
R714
C716
AVSS
C710
P_17V
C721 0.01uF
1:S26;2:Q21 AUDIO_MASTER_CLK
R720 22
22pF +3.3V_AU_AVDD
8 NC 7 OC_ADJ
AVDD
R710
C704 0.01uF
TESTOUT 22
READY
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44
PGND_AB_2 PGND_AB_1 OUT_B PVDD_B_2 PVDD_B_1 BST_B BST_C PVDD_C_2 PVDD_C_1 OUT_C PGND_CD_2 PGND_CD_1
C725 0.01uF 50V 0.033uF C730 2S C726 0.01uF 50V 0.033uF C731 2S 1S
L701 AD-9060
C740 0.01uF
MCLK
1F
1%
18K R711
4
SPK_L-
1:AI3;5:O24
AC_DET
TAS5709PHPR IC700
43 42 41 40 39 38 37
SPK_R+
READY
SMAW250-H04R P703
1S
1F
GVDD_OUT_2 32
R744 2K R707
33 33
C706 33pF READY C707 33pF READY
PVDD_D_1
PVDD_D_2
RESET
DVSS_2
STEST
BST_D
OUT_D 36
GND 29
AGND 30
33
26
DVDD 27
28
VREG 31
25
34
35
R708
P_17V
+3.3V_DVDD READY
CH_5
C717
CH_5 SDA1
1 u F 25V
C720 0.01uF
C718
0.033uF 50V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
+3.3V
L609 MLB-201209-0120P-N2
+3.3V_DE
+1.2V_DE
+1.2V_DE
C697 10uF 6.3V C652 10uF 6.3V
+3.3V_DE
22 22 22 22
0.1uF
1uF
1uF
VDDH_5
VDDL_7
AGC_S
VDDH_4
VSS_11
VSS_10
HDVPP
TEST2
TEST0
100
91
90
89
88
87
86
85
84
83
82
81
80
79
99
98
97
96
78
95
94
93
77
92
76
TEST1
DENA
DENB
SDOA
PCKA
SDOB
PCKB
SCKB
GPO2
SCKA
NC_4
NC_3
GPI2
RON
VSS_1 AVDD_S C663 0.1uF AII_S AIQ_S AVSS_S VRT_S VRB_S C664 0.1uF R640 2.2K R641 2.2K TCPO_S VDDL_1 MSCL_S MSDA_S VSS_2 C665 0.1uF VSSH PSEL ZSEL 0.1uF VDDL_2 ACKI TCPO_T IR_T VRT_T VRB_T AVDD_T AIN_T AIP_T R623 AVSS_T
1 2 3 4 5 6 7 8 9
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 27 28 29 30 31 32 33 34 35 36 37 43 44 45 46 47 48 49 38 39 40 41 42 50
VSS_9 INTB INTA SADR VDDH_3 SCL SDA VSS_8 HDVDDL0 SADR_S NC_2 SADR_T VDDL_6 VSS_7 ERRB SYNCB ERRA SYNCA TDO CSEL1 CSEL0 TMS TRST VDDL_5 VSS_6 C681 0.1uF C682 0.1uF C683 0.1uF C684 0.1uF
READY
R629 2.2K
2.2K
22 R642 22 R643
READY
R628
SCL1 SDA1
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
IC602 MN884433
C666
R621 10K 1%
TUNER_IF_N TUNER_IF_P
R622
100 100
GPI1
GPI0
XI
VSS_3
VSS_4
VSS_5
TDI
TEST4
AGCI_T
VDDL_3
SHVPP
MSCL_T
AGCR_T
VDDH_1
MSDA_T
VDDH_2
SHVDDH
VDDL_4
TEST3
GPO1
GPO0
NC_1
XO
R624 R625
2.2K 2.2K
READY
R639 2.7K
DEMOD_RESET READY C672 0.1uF 16V C674 0.1uF 16V C677 0.1uF 16V C678 0.1uF 16V C679 0.1uF 16V C680 0.1uF 16V C696 0.1uF 16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
EAX61373301 TUNER 6 13
POWER B/D
+5V_ST
P500 SMAW200-H18S1
P_+5V P_+5V
R535 22K
R1/C1
Q501 SI3865BDV
+5V
1 3 5 7 9 11
2 4 6 8 10 12 14 16 18 19
ERROR_DET
AC_DET
1uF C594
5V_ON
R507
R544 P_17V
RL_ON
IC507 MP8706EN-C247-LF-Z
IN 1 8 GND C541 0 . 1 u F
560 R537
RL_ON
R506
100
13 15 17
R2
RL_ON
ON/OFF
$0.081
D2_1
S2
D2_2
S7 core 2.5V
+2.5V_AVDD
+3.3V_ST L502 EAM44020101 CB3216PA501E C509 10uF 6.3V C512 10uF 6.3V C515 0.1uF 16V
+3.3V_NEC_ST
SW_1
VCC
SW_2
FB
R540 1.2K
1 GND
R539 39K
2 VOUT
BST
1%
EN/SYNC
R2 R1
1% IC506 AZ1117H-ADJTRE1(EH11A) INPUT 3 2 R541 110 C545 22uF 10V 1 ADJ/GND R538 330 1%
+5V_TU
1.8A
C567 10uF 6.3V C573 10uF 6.3V C580 0.1uF 16V
C586 47uF 16V C589 47uF 16V
L520 10uH
+7V
Vout=0.8*(1+R1/R2) OUTPUT
S7 DDR 1.5V
+5V_ST
L503 CIC21J501NE
R527 0 RL_ON
1%
1074 mA
P_+5V
IC501 MP8706EN-C247-LF-Z
IN 1 8 GND C523 0 . 1 u F
close to tuner
+1.26V_VDDC +5V
MLB-201209-0120P-N2
L514
+3.3V_AVDD
Vout=0.8*(1+R1/R2)
+1.5V_DDR_IN
SW_1
SW_2 C528 0.1uF 1K R500 L504 3.6uH NR8040T3R6N C540 22uF 10V Placed on SMD-TOP C539 0.1uF
IC502 MP2212DN
FB R505 11K 1/10W 5% Placed on SMD-TOP R2 1 8
10K
1%
Close to IC
3A
VCC
FB
R531 3.3K 1%
R515 200 1%
IC504 AZ1085S-3.3TR/E1
BST
EN/SYNC
INPUT
3 MAX 3A 2 $0.122 1
OUTPUT
EN/SYNC
POWER_ON/OFF1
R518 1.2K L519 3.6uH
GND
IN
SW_1
BS
VCC
S7 core 1.26V
R1 1.26V 1.2V 40.2K 40.2K 40.2K R2 71.5K 82.5K 65.5K 1.29V
For Debug
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
3A
SW_2
ADJ/GND
EAX61373301 POWER 5 13
S_POWER
+1.26V_VDDC
L323 BLM18PG121SN1D
VDDC
C380 0.1uF 16V
VDDC
C304 16V 0.1uF C309 16V 0.1uF VDDC
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 A_DVDD B_DVDD VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 NC_13
GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28
VDDC
+1.26V_VDDC
L321 BLM18SG121TN1D
+1.26V_MIU1VDDC
J16 L18
+1.26V_MIU0VDDC
+1.26V_MIU1VDDC VDDC
H16 K19 L19 M18 M19 N18 N19 N20 P18 P19 P20 Y12
+1.26V_VDDC
AVDD2P5_2.5 +2.5V_AVDD L303 BLM18PG121SN1D Place to S7m closely L324 BLM18SG121TN1D
+1.26V_MIU0VDDC
J11 L7 L304 AVDD25_PGA_2.5 Place to S7m closely VDD33_3.3 C379 ADC2P5_2.5 16V 0.1uF
AVDD1P2 DVDD_NODIE
BLM18PG121SN1D
H7 J7 J8
L8 C336 16V 0.1uF C339 16V 0.1uF C342 16V 0.1uF C345 16V 0.1uF C350 16V 0.1uF C354 16V 0.1uF C356 10uF 6.3V C361 10uF 6.3V C371 22uF 16V AVDD2P5_2.5
AVDD_AU25
L305 BLM18PG121SN1D
AU25_2.5
W15 Y15
AVDD_NODIE
L306 BLM18PG121SN1D
ADC2P5_2.5 AVDD_DMPLL_3.3 Place to S7m closely C316 16V 0.1uF C323 16V 0.1uF VDD33_3.3 AU33_3.3
N9 P9 N8 P8
T7 U7
AVDD_AU33 AVDD_EAR33
T9 +3.3V_AVDD +1.5V_DDR_IN L300 BLM18PG121SN1D L310 AVDD_DDR0_1.5 Place to S7m closely BLM18PG121SN1D Place to S7m closely VDD33_DVI L318 BLM18PG121SN1D AVDD_DMPLL_3.3 R8 R9 T8
C347 16V 0.1uF C324 10uF 6.3V C332 10uF 6.3V L308 BLM18PG121SN1D
GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80
AVDD_NODIE_3.3
FRC_LPLL_3.3
L301 BLM18PG121SN1D
AVDD_DDR1_1.5 Place to S7m closely C348 16V 0.1uF Place to S7m closely
L309 BLM18PG121SN1D
VDD33_3.3
R19 W14 AVDD_DDR0_1.5 D15 D16 E15 L314 BLM18PG121SN1D C366 16V 0.1uF AU33_3.3 Place to S7m closely C375 10uF 6.3V E16 AVDD_DDR1_1.5 E17 F16 F17 G16 G17 H17
GND_81 AVDD_MEMPLL NC_6 GND_82 GND_83 GND_84 GND_85 AVDD_DDR0_D_1 AVDD_DDR0_D_2 AVDD_DDR0_D_3 AVDD_DDR0_D_4 AVDD_DDR0_C AVDD_DDR1_D_1 AVDD_DDR1_D_2 AVDD_DDR1_D_3 AVDD_DDR1_D_4 AVDD_DDR1_C GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98 NC_22 NC_23 NC_27 NC_28 NC_18 GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_106 GND_107
FRC_LPLL_3.3
AA12
G15
Y7 Y8
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
ER_BLOCK
MODEL OPTION
R266
MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2 MODEL_OPT_3 READY R278 22 R279 22 READY R252 22 READY
MODEL_OPT_4 MODEL_OPT_5
CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2 DDC_SCL_2 HPD2
MODEL_OPT_6
HD 3.3K R265
R227
X200 24MHz
HDMI
CK+_HDMI4 CK-_HDMI4 D0+_HDMI4 D0-_HDMI4 D1+_HDMI4 D1-_HDMI4 D2+_HDMI4 D2-_HDMI4 DDC_SDA_4 DDC_SCL_4 HPD4 CK+_HDMI3 CK-_HDMI3 D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 DDC_SDA_3 DDC_SCL_3 HPD3 HDMI_CEC_S7
1M
GND_C
TU_SDA
MODEL OPTION
CH_5
AUDIO_MASTER_CLK
IIS
AE1 AF16 AF1 AE3 AD14 AD3 AF15 AF2 AE15 AD2 AD16 AD15 AE16 NC_48 NC_78 NC_64 NC_50 NC_45 NC_34 NC_77 NC_65 NC_62 NC_33 NC_47 NC_46 NC_63
LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2] LVA0P/LLV3P/BLUE[9] LVA0N/LLV3N/BLUE[8] LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1] LVA3N/LLV7N/BLUE[0] LVA4P/LLV8P LVA4N/LLV8N
COMP1_LIN COMP1_RIN AV_RIN SIDE_LIN SIDE_RIN COMP2_LIN COMP2_RIN PC_LIN PC_RIN AV_LIN
LVDS OUT
DSUB
R168
R169
33
68 33 68 0
R170
R171 R172
AUDIO IN
DSUB_HSYNC
LVBCLKP/LLV0P/GREEN[5] LVBCLKN/LLV0N/GREEN[4] LVB0P/RLV6P/RED[1] NC_66 NC_76 NC_32 NC_44 NC_61 NC_60 LVB0N/RLV6N/RED[0] LVB1P/RLV7P/GREEN[9] LVB1N/RLV7N/GREEN[8] LVB2P/RLV8P/GREEN[7] LVB2N/RLV8N/GREEN[6] LVB3P/LLV1P/GREEN[3] LVB3N/LLV1N/GREEN[2] LVB4P/LLV0P/GREEN[1] AE4 AD5 AF4 AD4 LVB4N/LLV0N/GREEN[0] NC_51 NC_36 NC_67 NC_35 NC_49 RLV3P/RED[7] RLV3N/RED[6] RLV0P/LVSYNC RLV0N/LHSYNC RLV1N/LCK AF8 AD9 AE9 AF9 RLV2P/RED[9] NC_71 NC_40 NC_56 NC_72 NC_58 NC_69 TCON3/OE/GOE/GCLK2 NC_53 NC_74 NC_37 NC_43 NC_52 NC_75 NC_68 NC_59 NC_57 NC_70 NC_42 NC_38 NC_41 NC_54 NC_73 NC_39 TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN TCON13/LEDON TCON17/CS6/GCLK4 TCON15/SCAN_BLK1 TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N TCON9/CS3/OPT_P TCON16/WPWM TCON12/DPM TCON1/STV/GSP/VST TCON5/TP/SOE TCON14/SACN_BLK RLV1P/LDE RLV2N/RED[8] RLV4P/RED[5] RLV4N/RED[4] RLV5P/RED[3] RLV5N/RED[2]
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
R139
33 33 33
68 33 68 33 68 0 C220 C221 C222 C223 C224 C225 C205 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF
G4 H6 K5 K4 J4 K6 H4 J6 J5
COMPONENT 1/2
R194 R173
R174
HSYNC1 VSYNC1 RIN1P RIN1M GIN1P GIN1M BIN1P BIN1M SOGIN1 MIC_DET_IN MICCM MICIN HSYNC2 RIN2P RIN2M GIN2P GIN2M BIN2P BIN2M SOGIN2 HP_OUT_1L HP_OUT_1R CVBS0P CVBS1P CVBS2P CVBS3P CVBS4P CVBS5P CVBS6P CVBS7P ET_REFCLK CVBS_OUT1 CVBS_OUT2 VCOM0 ET_TX_EN ET_MDC ET_MDIO ET_CRS ET_RXD1 ET_TXD1 ET_RXD0 ET_TXD0 VAG VRP VRM AUCOM LINE_OUT_0L LINE_OUT_2L LINE_OUT_3L LINE_OUT_0R LINE_OUT_2R LINE_OUT_3R
R175
R176
AUDIO OUT
W4
R177
R178 R179
N/A
R180
R181
33
68 33 68
N3 N2 M2 M1 L2 L1 M3
R182
R183
R184
R185 R186
33
68 0
AE2
FRC PART
TV/MNT CVBS
R154 R155
33 33
N4 N6 L4 L5 L6 M4 M5 K7 M6
33 33 33 33 33 33
AE11 AF6 AE6 AF11 AD6 AD12 AE5 AF12 AF5 AE12 AE10 R242 R243 0 READY 0 AF7 IR SOC_RESET R273 10K READY AD11 AD7 AD10 AE7 AF10 AD8
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
N/A
R156 68 C233 0.047uF
M7 N5
F8 G8 K8 A4 Y17
MINILV
NC_26 NC_19
AB16 AA14 AC15 Y16 AC16 AC14 AA16 AA15 Y10 AA11 AB15 AB14
S7 RESET CIRCUIT
*Active High reset
+3.3V AE8 Y11 Y19 C200 4.7uF 10V READY NC_55 NC_12 GND_105
R145 10 READY
R165 22 READY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
EAX61373301 AV IN_OUT/EXPANDER 2 13
250_350
+3.3V L102 U22 T21
PCM_D0 PCM_D1 PCM_D2 PCM_D3 PCM_D4 PCM_D5 PCM_D6 PCM_D7 PCM_A0 PCM_A1 PCM_A2 PCM_A3 PCM_A4 PCM_A5 PCM_A6 PCM_A7 PCM_A8 PCM_A9 PCM_A10 PCM_A11 PCM_A12 PCM_A13 PCM_A14 PCM_REG_N PCM_OE_N PCM_WE_N PCM_IORD_N PCM_IOWR_N PCM_CE_N PCM_IRQA_N PCM_CD_N PCM_WAIT_N PCM_RESET
S7 IC Configuration
+3.3V READY PCM_A[0-7] R33 1K R39 1K READY R34 PCM_A[7] PCM_A[6] PCM_A[5] PCM_A[4] R36 1K 1K R35 1K 1K R38 1K PCM_A[0-7] PWM0 PWM1 V4 LGD BIT SEL H or NC : 10 bit AUDIO_MASTER_CLK MS_SCK L : 8 bit PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] V4 LGD LVDS SEL L or NC : VESA H : JEIDA MS_LRCH V4 LGD OPC L or NC : DISABLE H : ENABLE C7 0 . 1 u F <T3 CHIP Config(AUD_LRCH)> Boot from SPI flash : 1b0 Boot from NOR flash : 1b1 PCM_A[3] PCM_A[2] PCM_A[1] PCM_A[0] <CHIP_CONF={AUBCK_OUT,AUMCK_OUT,PWM1,PWM0}> 1.CHIP_CONF= 4h3:{0,0,1,1}MIPS_no_EJ_NOR8 2.CHIP_CONF= 4h4:{0,1,0,0}MIPS_EJ1_NOR8 3.CHIP_CONF= 4h5:{0,1,0,1}MIPS_EJ2_NOR8 4.CHIP_CONF= 4hB:{1,0,1,1}B51_Secure_no_scramble 5.CHIP_CONF= 4hC:{1,1,0,0}B51_Secure_scramble 1.MIPS as host(8051s reset remains until MIPS deactive it.),No EJ PAD,Byte mode NAND flash 2.MIPS as host,EJ use PAD1,Byte mode NAND flash 3.MIPS as host,EJ use PAD2,Byte mode NAND flash 4.8051 as host,Internal SPI flash secure boot,no scramble 5.8051 as host,Internal SPI flash secure boot with scramble /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE AR102 22 BIT_SEL,LVDS_SE : LCD MODULE OPT OPC: Optimal power control FOR PICTURE AFLC: LED TV OPTION PCM_A[6] PCM_A[7]
T22 AB18 AC18 AC19 AC20 AC21 U21 V21 Y22 AA22 R22 R21 T23 T24 AA23 Y20 AB17 AA21 U23 Y23 W23 W22 AA17 V22 W21 Y21 AA20 V23 P23 R23 P22 AR103 AC17 AB20 AA18 AB21 AB19 AD17 AA19 22 R52 R53 R55 R54 33 33 33 33 M23 N23 M22 N22 A5 B5
NC_1 NC_2 NC_3 NC_4 R16 1K R19 3.9K NC_5 NC_6 R/B RE CE NC_7 R17 1K READY +3.3V R10 1K READY C4 0.1uF NC_8 VCC_1 VSS_1 NC_9 NC_10 CLE ALE WE WP R12 1K NC_11 NC_12 NC_13 NC_14 NC_15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VCC_2 VSS_2 NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16 C6 10uF 6.3V
GPIO36/UART3_RX GPIO37/UART3_TX GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO50/UART1_RX GPIO51/UART1_TX GPIO6/PM0/INT0 GPIO7/PM1/PM_UART_TX GPIO8/PM2 GPIO9/PM3 GPIO10/PM4 GPIO11/PM5/PM_UART_RX/INT1 PM_SPI_CS1/GPIO12/PM6 PM_SPI_WP1/GPIO13/PM7 PM_SPI_WP2/GPIO14/PM8/INT2 GPIO15/PM9 PM_SPI_CS2/GPIO16/PM10 GPIO17/PM11/INT3 GPIO18/PM12/INT4 PM_SPI_CK/GPIO1 GPIO0/PM_SPI_CZ PM_SPI_DI/GPIO2 PM_SPI_DO/GPIO3
K21 L23 K20 L20 M20 G20 G19 F20 F19 E7 D7 E11 G9 F9 C5 E8 E9 F7 F6 D8 G12 F10 D9 D11 E10 D10 R82 R83 R92 R81 33 33 33 33 R80 22 R101 R90 READY 22 22 R89 R96 R97 R98 22READY 22 33 C19 10pF READY R88 100 COMP1_DET MODEL_OPT_0 MOD_ROM_RX MOD_ROM_TX USB1_OCD USB1_CTL
READY R42 1K
R37
MODEL_OPT_6 MODEL_OPT_1 /FLASH_WP MODEL_OPT_2 TUNER_RESET DEMOD_RESET AV_CVBS_DET /SPI_CS SPI_CK SPI_DI SPI_DO
TS0_CLK PCM_PF_CE0Z PCM_PF_CE1Z PCM_PF_OEZ PCM_PF_WEZ PCM_PF_ALE PCM_PF_AD[15] PCM_PF_RBZ TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 UART_TX2/GPIO65 UART_RX2/GPIO64 DDCR_DA/GPIO71 DDCR_CK/GPIO72 DDCA_DA/UART0_TX DDCA_CK/UART0_RX TS1_D0 TS1_D1 TS1_D2 PWM0/GPIO66 PWM1/GPIO67 PWM2/GPIO68 PWM3/GPIO69 PWM4/GPIO70 TS1_D3 TS1_D4 TS1_D5 TS1_D6 TS1_D7 TS0_D6 TS0_D7 TS1_CLK TS1_VLD TS1_SYNC TS0_VLD TS0_SYNC
AA9 AA5 AA10 AB5 AC4 Y6 AA6 W6 AA7 Y9 AA8 AC5 AC6 AB6 AC10 AB10 AC9 AB9 AC8 AB8 AC7 AB7 R104 R136 R18 R28 22 22 22 22 FE_TS_CLK FE_TS_VLD FE_TS_SYN FE_TS_SERIAL BRAZIL DEMOD OPT
NAND-2G_HYNIX
PF_WP /F_RB
NAND_1G_NUMONYX_NEW NAND_1G_HYNIX
IC104-*1 NAND01GW3B2CN6E IC104-*3 H27U1G8F2BTR-BC
PJ230
IC101-*1 LGE101 (S7 NON_TON/DiX/RM)
AE1 W26 W25 U26 U25 U24 V26 V25 V24 W24 Y26 Y25 Y24
CH_2
IC103 MX25L8005M2I-15G
CS# 1 8 VCC
+3.3V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VDD_2 VSS_2 NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 R/B RE CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 CLE ALE W E W P NC_11 NC_12 NC_13 NC_14 NC_15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VCC_2 VSS_2 NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16
AF16 AF1 AE3 AD14 AD3 AF15 AF2 AE15 AD2 AD16 AD15 AE16
NC_48 NC_78 NC_64 NC_50 NC_45 NC_34 NC_77 NC_65 NC_62 NC_33 NC_47 NC_46 NC_63
LVACLKP/LLV6P/BLUE[3] LVACLKN/LLV6N/BLUE[2] LVA0P/LLV3P/BLUE[9] LVA0N/LLV3N/BLUE[8] LVA1P/LLV4P/BLUE[7] LVA1N/LLV4N/BLUE[6] LVA2P/LLV5P/BLUE[5] LVA2N/LLV5N/BLUE[4] LVA3P/LLV7P/BLUE[1] LVA3N/LLV7N/BLUE[0] LVA4P/LLV8P LVA4N/LLV8N
C5 0.1uF 16V
NC_7 NC_8 VDD_1 VSS_1 NC_9 NC_10 CL AL W W P NC_11 NC_12 NC_13 NC_14
LVBCLKP/LLV0P/GREEN[5] LVBCLKN/LLV0N/GREEN[4] AF3 AF14 AD1 AD13 AE14 AE13 LVB0P/RLV6P/RED[1] NC_66 NC_76 NC_32 NC_44 NC_61 NC_60 LVB0N/RLV6N/RED[0] LVB1P/RLV7P/GREEN[9] LVB1N/RLV7N/GREEN[8] LVB2P/RLV8P/GREEN[7] LVB2N/RLV8N/GREEN[6] LVB3P/LLV1P/GREEN[3] LVB3N/LLV1N/GREEN[2] LVB4P/LLV0P/GREEN[1] AE4 AD5 AF4 AD4 AE2 LVB4N/LLV0N/GREEN[0] NC_51 NC_36 NC_67 NC_35 NC_49 RLV3P/RED[7] RLV3N/RED[6] RLV0P/LVSYNC RLV0N/LHSYNC RLV1N/LCK AF8 AD9 AE9 AF9 AE11 AF6 AE6 AF11 AD6 AD12 AE5 RLV2P/RED[9] NC_71 NC_40 NC_56 NC_72 NC_58 NC_69 TCON3/OE/GOE/GCLK2 NC_53 NC_74 NC_37 NC_43 NC_52 NC_75 NC_68 NC_59 NC_57 NC_70 NC_42 NC_38 NC_41 NC_54 NC_73 NC_39 TCON21/CS10/VGH_ODD TCON20/CS9/VGH_EVEN TCON13/LEDON TCON17/CS6/GCLK4 TCON15/SCAN_BLK1 TCON18/CS7/GCLK5 TCON19/CS8/GCLK6 TCON11/CS5/HCON TCON10/CS4/OPT_N TCON9/CS3/OPT_P TCON16/WPWM TCON12/DPM TCON1/STV/GSP/VST TCON5/TP/SOE TCON14/SACN_BLK RLV1P/LDE RLV2N/RED[8] RLV4P/RED[5] RLV4N/RED[4] RLV5P/RED[3] RLV5N/RED[2]
AC26 AC25 AA26 AA25 AA24 AB26 AB25 AB24 AC24 AD26 AD25 AD24
CH_8
R11 4.7K
RGB_DDC_SDA RGB_DDC_SCL
/FLASH_WP
+3.3V R9 10K
/SPI_CS
AD23 AE23 AE26 AE25 AF26 AF25 AE24 AF24 AF23 AD22 AE22 AF22
PWM0 PWM1
22 22 22PWM2 22 22
SPI_DO
SO
HOLD#
NC_15
AD19 AE19 AD21 AE21 AF21 AD20 AE20 AF20 AF19 AD18 AE18 AF18
R1 0 R2 0 READY
WP# C
SCLK
SPI_CK
NAND_1G_NUMONYX_OLD
IC104-*2 NAND01GW3A2CN6E NC_1 NC_2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VDD_2 VSS_2 NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16 NC_3 NC_4 NC_5 NC_6 RB R E NC_7 NC_8 VDD_1 VSS_1 NC_9 NC_10 CL AL W W P NC_11 NC_12 NC_13 NC_14 NC_15
AF12 AF5 AE12 AE10 AF7 AD11 AD7 AD10 AE7 AF10 AD8
B E
GND
SI
NC_26 NC_19 NC_30 NC_15 AE8 Y11 Y19 NC_31 NC_55 NC_12 GND_105 NC_29 NC_21 NC_20 NC_11 NC_17 NC_25 NC_24
AB16 AA14 AC15 Y16 AC16 AC14 AA16 AA15 Y10 AA11 AB15 AB14
SPI_DI
C6 B6 C8 C7 A6
HDCP EEPROM
IC102 CAT24WC08W-T A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA
+3.3V
Addr:10101--
R7 4.7K
NEC_ISP_RXD
L103
$0.199
FOR DEBUG 1
RESET_NEC CHECK !! STANDBY STAUTE X101 32.768KHz R118 120K P120/INTP0/EXLVI R161 100K EDID_WP CHECK WAKE UP BY KEY !!
RESET_NEC NEC_ISP_TXD
X102 10MHz
OCD1A
OCD1B
C12 0.1uF
10
P123/XT1
FLMD0
0.1uF C11
VSS
P40
P41
R59
VDD
I2C : A0
R6 4.7K READY
FLMD0
REGC
11
RESET
R21 4.7K
R23 4.7K
EEPROM
IC109 M24M01-HRMN6TP
NC 1 8 VCC
P121/X1/OCD0A
P122/X2/EXCLK/OCD0B
12 13
C B E Q102 2SC3052
44
43
46
45
42
41
40
38
48
47
NEC_RXD
15
RS232C_RXD
Z1 C1 0.1uF
14
C8 0.1uF 16V
SUB_SCL_NEC_TEMP
39
37
Y0
36 35 34 33
P140/PCL/INTP6 P00/TI000 P01/TI010/TO00 P130 P20/ANI0 ANI1/P21 ANI2/P22 ANI3/P23 ANI4/P24 ANI5/P25 ANI6/P26 ANI7/P27 R123 R124 R120 R121 10K 22 22 R122 R198 R138 R137 10K 22 22 22
RS232C_TXD
10K
R20 4.7K
R22 4.7K
RED_ONLY
RED_ONLY
E1
WP
13
S7_TXD
10K
X1
R195
R45
E2
SCL
VSS
SDA
22 READY
512KBIT = $0.35
IC109-*1 M24512-HRMN6TP
E0 1 8 VCC
13
VEE
10
KEY2 KEY1
P15/TOH0
P14/RXD6
P13/TXD6
AVREF
AVSS
VSS
22 P11/SL10/RXD0 2 2 P10/SCK10/TXD0
P31/INTP2/OCD1A
P12/SO10
+3.3V_NEC_ST
E1
W P
E2
SCL
ST_NVRAM_512K
VSS
SDA
R60 47K
NC
VCC 8
E2
SCL6
R69 R70
22 22
R77
HDMI_CEC
0IMMRSG036B
R93
4 GND
SDA 5
R78
R100
R72 0
R73 0
22 22
E1
W 7 C
C9 0.1uF 16V
16V
C17 0.1uF
C20 100uF
OCD1A
+3.3V_NEC_ST
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
NEC_ISP_TXD
EAX61373301 S7/FLASH/NVRAM/GPIO 1 13
RF_SWITCH_CTL C1302 0.1uF 16V Pull-up cant be applied because of MODEL_OPT_2 Q1306 ISA1530AC1
R1343 10K
E B C
R1321 2.2K
TU1300 TDTR-T035F
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 SHIELD RF_S/W_CTL BST_CTL +B1[5V] NC_1[RF_AGC] NC_2 SCLT SDAT NC_3 SIF NC_4 VIDEO GND +B2[1.2V] +B3[3.3V] RESET IF/AGC DIF_1[N]
TUNER_IF_N C1309 1200pF 50V C1308 4.7uF 10V C1300 0.1uF
+5V_TU
L1302 C1301 22uF 16V
+5V_TU
R1329 470
+3.3V
R1318 3K R1320 3K TU_SCL 100 R1316 TU_SDA C1312 47pF 50V C1313 47pF 50V CH_6 C1325 100pF 50V R1325 4.7K B C E
R1332 82
TUNER_SIF
100
R1315
Q1304
ISA1530AC1
+5V_TU
R1326 1K READY
R1330 100
READY
R1324 0
E B Q1305 ISA1530AC1
R1334 82
+1.2V_DE
L1301 C1307 4.7uF 10V C1306 0.1uF L1300 C1304 4.7uF 10V
TUNER_CVBS
+3.3V
R1309 100 C1303 0.1uF
+3.3V
R1311 100K C1310 0.1uF 16V TUNER_RESET
R1327 1K READY
ISDB_IF_AGC
DIF_2[P]
TUNER_IF_P
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes
13
13
AN TUNER
Brazil Basic DTV Training manual Brazil Basic DTV Training manual
Contents
ATSCGroupBrazilTeam
Last updated 2009.11.19
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Reset Design
Active Low KIA7029AF (Reset) Active Low Micom GPIO Reset Active High
TAS5709 (AMP) GPIO Reset Active Low S7 (Main Soc) GPIO Reset Active Low
Tuner
Demodulator
Breakthrough
S7 Power Sequence
Appendix
Power Up Sequence
Power
Breakthrough
S7 Power Sequence
Appendix
Time t1 t2 t3 t4
Description XTAL stable to Reset falling Reset pulse width 1.26V to Reset falling 3.3VDDP to Reset falling
Min 5 5 5 5
Typ.
Max
Unit ms ms ms ms
Breakthrough
S7 Power Sequence
# t2 : Reset Pulse Width : 40ms OK
Breakthrough
S7 Power Sequence
a) AC On
1 :X-tal 2 : 3.3V 3 : 1.26V 4 : Reset
b) DC(Remocon) On
1 :X-tal 2 : 3.3V 3 : 1.26V 4 : Reset
# t1 : Reset Pulse Width : 400ms # t3 : Reset Pulse Width : 400ms # t4 : Reset Pulse Width : 400ms
OK OK OK
# t1 : Reset Pulse Width : 120ms # t3 : Reset Pulse Width : 120ms # t4 : Reset Pulse Width : 120ms
OK OK OK
Breakthrough
CH 6
+3.3V_TU
DDCR_CK/GPIO72 DDCR_DA/GPIO71
CH 2
+3.3V
NVRAM NVRAM TGPIO0 TGPIO1 (U1) (U2) <SCL1> <SDA1> 0xA0 0xA0
CH 5
DEMOD.(BRAZIL) DEMOD.(BRAZIL) MN884433 MN884433 0xD8 0xD8
+3.3V /+3.3V_NEC_ST
SATURN 7
DDCDA_CK/GPIO23 DDCDA_DA/GPIO24 DDCDB_CK/GPIO25 DDCDB_DA/GPIO26 DDCDD_CK/GPIO29 DDCDD_DA/GPIO30 DDCDC_CK/GPIO27 DDCDC_DA/GPIO28 DDCA_CK/UART0_RX DDCA_DA/UART_TX (B4) (C4) <DDC_SCL3> <DDC_SDA3>
EEPROM EEPROM HDMI1 HDMI1 0XA0 0XA0 EEPROM EEPROM HDMI1 HDMI1 0XA0 0XA0 EEPROM EEPROM RGB RGB 0XA0 0XA0
CH 12 CH 11 CH 8
I2S_IN_WS/GPIO174 I2S_IN_BCK/GPIO175
(F15) <SUB_SCL_NEC_TEMP> (F14) <SUB_SDA_NEC_TEMP> MICOM MICOM UPD78F0513 UPD78F0513 0x52 0x52
CH 7
+3.3V SUB I2C SUB I2C Touch Eye Touch Eye 0x70 0x70
Breakthrough
GPIO Structure
GPIO 66 67 31 32 42 11 14 TCON2/GSP _R/GCLK1 TCON4/CPV //GSC_R/G CLK3 TCON6/FLK 40 50 51 5 7 15 16 17 176 TCON8/CS2 /FLK3 Signal Name PWM0 PWM1 DSUB_DET Model_OPT_3 Model_OPT_0 Model_OPT_1 Model_OPT_2 5V_DET_HDMI_2 5V_DET_HDMI_4 Direction Input Input Input Input Input Input/Output Input/Output Input Input Chip configuration Chip configuration D-Sub Auto link check Model option 3 Model option 0 Model option 1 /FE_BOOSTER_CTRL Model option 2/RF_SWITCH_CTL (HDMI3 Ready) HDMI 5V Detect HDMI Side 5V Detect Description
5V_DET_HDMI_3 COMP1_DET MOD_ROM_RX MOD_ROM_TX USB1_OCD USB1_CTRL TUNER_RESET DEMOD_RESET AV_CVBS_DET COMP2_DET SIDE_CVBS_DET
Input Input Input Output input Output Output Output Input Input Input
HDMI_1 5V Detect Compnent1 Auto link Module Rom download UART Module Rom download UART USB1_OCD USB1_5V Power Control TUNER_RESET Demodulator Reset AV_CVBS Auto link Compnent2 Auto link SIDE_CVBS Auto link
Breakthrough
STBY
659mA
L501
AP2121/0.3A :$0.048
P O w E R
601mA
IC901(RGB EEPROM)
355mA
+1.5V_DDR_IN
L1201
VCC_1.5V_DDR
Instant Boot
L505
19mA
P_17V TU700(TAS5709) +7V +5V_TU
Multi Power
L300 L301
IC507(DCDC)
IC506(LDO)
TU1300(TUNER)
IC504 (DCDC) L507 P_+5V Q501 (TR) IC1101(USB S/W) HDMI CEC IC504 (LDO) IC1000(NAND GATE) SPDIF IC700(TAS5709) IC700(TAS5709) TU1300(TUNER) IR PART IC102,9(EEPROM) IC103(Serial Flash) L102 IC104(NAND Flash) +3.3V_DE L609 +1.2V_DE IC600(REG) L1301 IC505 (REG) IC602 (MN884433) TU1300(TUNER) +3.3V L514 +5V
L1100 USB REAR (SVC) 801,802,804 (HDMI EEPROM)
+1.26V_VDDC
B O A R D
+3.3V_AVDD
+3.3V_DVDD
+3.3V_AU_AVDD
L314 L316
Multi Power
+2.5V_AVDD
Breakthrough
Power-Up Boot Fail Trouble Shooting No OSD Trouble Shooting Digital TV Video Trouble Shooting Analog TV Video Trouble Shooting Component Video Trouble Shooting RGB Video Trouble Shooting AV Video Trouble Shooting HDMI Video Trouble Shooting All Source Audio Trouble Shooting Digital TV Audio Trouble Shooting Analog TV Audio Trouble Shooting Component / RGB / AV Audio Trouble Shooting HDMI Audio Trouble Shooting USB Trouble Shooting
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Replace Cable
Breakthrough
Va
TVaR TVaF
Vs
TVsR TVsF Td_on Td_off
DISPEN
Symbol TOn TOff TOnR TVaR TVaF TVsR TVsF Td_on Td_off
Normal Display
Description
unit msec msec msec msec msec msec msec msec msec
Time interval between 90% of Vcc and 10% of Vs when Power On Time interval between 10% of Vs and 90% of Vcc when Power Off Time interval between 10% of Vcc and 90% of Vcc when Power On Rising Time of Va (10% to 90%) Falling Time of Va (90% to 10%) Rising Time of Vs (10% to 90%) Falling Time of Vs (90% to 10%) Time interval between 90% of Vs and DISPEN rising edge when Power On Time interval between DISPEN falling edge and 90% of Vs when Power Off
Breakthrough
SCL
Y Y
SDA
A7
A6
A0
SCL (continue) SDA (continue) ACK By Slave D7 D6 Command Data for Addr D0 Stop ACK By Slave By Master
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Check RF Cable Y Check Tuner(TU1300) Power (5.0V, 3.3V, 1.2V) Y N Check IF Signal pin #17, 18 Y Check Demodulator Power (3.3V, 1.2V) L609, IC600 Y Check Demodulator X-TAL (X602) Y Check TP Clock, Data, Sync R630, R631, R632 Y Maybe MstarS7(IC100) has problems N Maybe Demodulator has problems N Replace X-TAL N Replace L609 / IC600 Maybe Tuner has problems N Replace one of Bead & Recheck
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_S7
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_S7
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Breakthrough
Cable
CVBS_LIVE SIF1
TP1
S7 S7 I2S_BCM
USB2.0
Rear(0) Side(1)
(External Input) AV1 AV1_LR AV2 AV2_LR COMP1_LR COMP2_LR RGB_LR EXT_IN (Comp1/2, RGB)
(Audio Out)
(Micom)
I2S_BCM
TAS9709 TAS9709
KIA7427AF Reset
(USB)
I2C
NEC Micom
Breakthrough
Exception - USB power could be disabled by inrushing current - In this case, remove the device and try to reboot the TV (AC power off/on)
Breakthrough