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    Resume

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    EC-223 Shivakumar

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    Resume

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    EC-223 Shivakumar
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    Resume

    Uploaded by

    EC-223 Shivakumar

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    © All Rights Reserved
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    of 1

    SUCHISMITA BOSE

    Email : [email protected] Phone : +91-8637054496 Linkedin : https://www.linkedin.com/in/suchismita-bose-45040b1b8/


    Academic Qualifications
    Year Degree/Certificate Institute CPI/%
    2021 - Present MSR (EE) Indian Institute of Technology, Kanpur 9/10
    2017 -2021 B.Tech Jalpaiguri Government Engineering College,WB 9.35/10
    2017 XII Jalpaiguri Govt. Girls’ High School,WB 92.4%
    2015 X Jalpaiguri Govt. Girls’ High School,WB 92.85%
    Scholastic Achievements
    • Received the Academic Excellence Award (two times) for exceptional academic performance in Master of Science.
    • Received the Silver medal in the Department of Electrical Engineering, B.Tech.
    • Paper on “Characterization of Single Photon Detector and Its Quenching Circuit Analysis” got selected for Inter-
    national Conference on Photonics 2023, IISC Bengaluru.
    • Qualified in (Written Test+ Interview) Build India Scholarship Exam by L&T.
    • Got Placed In Linde, India.
    Key Projects
    • Designing a backend for a mixed-signal IC using Verilog (VLSI System Design) (Oct’22- Dec’22 )
    Mentor: Dr. Chithra, Assistant Professor, EE, IIT Kanpur. (Tools used: Quartus Prime, ModelSim)
    – Designed a backend for a chip consisting of two amplifiers and an oscillator for executing a start-up sequence.
    • Design, layout and characterization of the commonly used logic gates (VLSI System Design) (Oct’22- Dec’22 )
    Mentor: Dr. Chithra, Assistant Professor, EE, IIT Kanpur. (Tools used: LTSpice, Electric)
    – Designed the schematic and layout of a 2-input NOR and a 2-input NAND standard cell by taking the appropriate size of
    NMOS and PMOS.
    – Performed the transient analysis, estimated the propagation delay, and power consumption using Spice code.
    • Dual Port RAM Design and Verification Using Verilog and System Verilog (Maven Silicon) (May’22- Dec’22 )
    – Designed a dual port RAM using Verilog HDL.
    – Architected the class-based verification environment and verified the RTL model using System Verilog.
    • BCD based Arithmetic Logic Unit (ALU) (Digital VLSI Design) (Mar’22- May’22 )
    Mentor: Dr. Rik Dey, Assistant Professor, EE, IIT Kanpur. (Tools Used: Quartus Prime, EDA Playground)
    – Designed a Gate Level logic circuit (using MOSFETs) for the conversion and display of a number from Decimal to BCD
    format, as well as, a single digit comparator, adder, and subtractor using Verilog HDL.
    – Extended to a common user-controlled circuit for addition or subtraction on 3-digit signed numbers using 9’s complement.
    MSR Thesis*
    • Characterization of Single Photon Detector and Its Quenching Circuit Analysis
    Mentor: Dr. Utpal Das, Emeritus Professor, EE, IIT Kanpur.
    – Experimentally Analysed the electrical signals and properties of an Avalanche Photodiode (APD).
    – Characterized an Avalanche Photodiode (APD) in Geiger mode to function it as a Single Photon Detector.
    – Simulated the Passive and Active Quenching Circuit suitable for the Single Photon Detector.
    Online Internship
    • VLSI Design Internship, Maven Silicon (Jan’22- Mar’22 )
    – EDA Tools: Quartus Prime, ModelSim
    – Description: Successfully designed AHB Master, AHB Slave, APB Controller and AHB2APB bridge top and did top-level
    verification using test-bench.
    Technical Skills
    • Programming Language: Verilog HDL, System Verilog, C.
    • Software: LTspice, MATLAB, Electric, Questasim, Quartus Prime, ModelSim, Visual Code studio, EDA Playground, Icarus
    Verilog.
    • Operating System: Windows, Linux.
    Positions of Responsibility
    • Department Placement Coordinator 2023 (Student Placement Office, IIT Kanpur) (Present)
    • Students’ Senate Nominee (Department Postgraduate Committee, IIT Kanpur ) (2021 )
    • Teaching Assistant, IIT Kanpur (Aug’21- June’23 )
    • Member of Institute of Engineers (JGEC)
    Relevant Courses
    Digital Electronics Digital IC Design Electrical Network
    Digital Circuits VLSI Physical Design Analog Electronics
    Object Oriented Programming IC Fabrication Static Timing Analysis (STA)
    VSD - Circuit Design Microprocessor & Microcontroller Semiconductor Optical Devices
    Extra-Curricular Activities
    • Stood first in SPUTNIK event under the banner of SRISTI 2020 (JGEC).

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