Lecture 6 CPLDs

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Reconfigurable Computing
CS G553

Lecture 6 –Sequential PLDs and CPLDs


PLDs
ROM

Fixed
Programmable
Inputs AND Outputs
OR Array
Array

PLA (Programmable Logic Array)

Programmable Programmable
Inputs Outputs
AND Array OR Array

PAL (Programmable Array Logic)

Programmable
Inputs Fixed OR Array Outputs
AND Array

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Programmable Logic Device

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Sequential Programmable Logic Device

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Basic Macro Cell Logic

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Basic Macro Cell Logic

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Example SPLD

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Complex Programmable Logic Devices

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Complex Programmable Logic Device

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Complex Programmable Logic Device

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Architecture of Xilinx 9500-family CPLD

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Architecture of Xilinx 9500-family CPLD

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Architecture of Xilinx 9500-family CPLD

AND
Macrocell
Array

Product
Term
Allocator

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Architecture of Xilinx 9500-family CPLD

5 Product Terms

15 Product Terms
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Architecture of Xilinx 9500-family CPLD

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Thank You
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