Unit-2 Microprogrammed Control

A control unit whose binary control values are saved as words in memory is called a
microprogrammed control unit.
2.1 Control Memory
 Control Memory is the storage in the microprogrammed control unit to store the
microprogram.
 Microprogram consists instruction in the strings of 0’s and 1’s and these are called
microinstructions.
 Microprogramming is the method of control unit design in which the control
selection and sequencing information is stored in ROM or RAM called a control
memory.
 Microinstructions are fetched from control memory in similar way as an instruction
is fetched from main memory.
 Each microinstruction also explicitly or implicitly specifies the next
microinstruction to be used thereby providing the necessary information for
sequencing.

2.2 Address Sequencing

The control memory is used to store the microinstructions in groups. Here each group is
used to specify a routine. The control memory of each computer has the instructions which
contain their micro-programs routine. These micro-programs are used to generate the
micro-operations that will be used to execute the instructions. Suppose the address
sequencing of control memory is controlled by the hardware. In that case, that hardware
must be capable to branch from one routine to another routine and also able to apply
sequencing of microinstructions within a routine.
When we try to execute a single instruction of computer, the control must undergo the
following steps:

 When the power of a computer is turned on, we have to first load an initial address
into the CAR (control address register). This address can be described as the first
microinstruction address. With the help of this address, we are able to activate the
instruction fetch routine.
  Then, the control memory will go through the routine, which will be used to find out
the effective address of operand.
 In the next step, a micro-operation will be generated, which will be used to execute
the instruction fetched from memory.

We are able to transform the bits of instruction code into an address with the help of control
memory where routine is located. This process can be called the mapping process. The
control memory required the capabilities of address sequencing, which is described as
follows:

 On the basis of the status bit conditions, the address sequencing selects the
conditional branch or unconditional branch.
 Addressing sequence is able to increment the CAR (Control address register).
 It provides the facility for subroutine calls and returns.
 A mappings process is provided by the addressing sequence from the instructions
bits to a control memory address.

In the above diagram, we can see a block diagram of a control memory and associative
hardware, which is required for selecting the address of next microinstruction. The
microinstruction is used to contain a set of bits in the control memory. With the help of
some bits, we are able to start the micro-operations in a computer register. The remaining
bits of microinstruction are used to specify the method by which we are able to obtain the
next address.
In this diagram, we can also see that the control address register is able to recover their
address with the help of four different directions. The CAR is incremented with the help
of incrementer and then chooses the next instruction. The branching address will be
determined in the multiple fields of microinstruction so that they can provide results in
branching.
If there are status bits of microinstruction and we want to apply conditions on them, in this
case, we can use conditional branching. An external address can be shared with the help of
a mapping logic circuit. The return address will be saved by a special register. This saved
address will be helpful when the micro-program requires returning from the subroutine. At
that time, it requires the value from the unique register.

 Conditional Branching

In the above diagram, the branch logic is used to provide the decision-making capabilities
in the control unit. There are special bits in the system which is described by the status
conditions. These bits are used to provide the parameter information such as mode bits, the
sign bit, carry-out, and input or output status.

If these status bits come together with the microinstruction field, they are able to control
the decision of a conditional branch, which is generated in the branch logic. Here the
microinstruction field is going to specify a branch address. The multiplexer is used to
implement the branch logic hardware. If the condition is met, it will be branch to the initial
address. Otherwise, it will increment the address register.

If we load the branch address into the control address register from the control memory,
we are able to implement the unconditional branch microinstruction. If the condition is
true, it will go to the branch, which is referred to as the address from the next address field
of the current microinstruction. Otherwise, it will fall through. There are various types of
conditions that need to be tested: Z(zero), C(carry), O(overflow), N(negative), etc.
 Mapping of Instruction-Subroutines

In the control memory, if the microinstruction specifies a branch to the first work, in
this case, there will be a special type of branch. Here an instruction contains their
micro-program routine. For this special branch, the status bits will be the bits in the
operation code, which is the part of instruction.

The above image shows a type of easy mapping process which are going to convert
the 4-bit operation code into the 7-bit address for control memory. In the mapping
process, the 0 will be placed in the most significant bit of address. After that, the
four operation code bits will be transferred. Lastly, the two least significant bits of
CAR will be cleared.
With the help of this process, a micro-program will be provided to each computer
instruction. The micro-program contains the capacity of four microinstructions. If
less than four microinstructions are used by the routine, the location of unused
memory can be used for other routines. If more than four microinstructions are used
by the routine, it will use the addresses 1000000 through 1111111.
 This concept can be extended to a more general mapping rule with the help of PLD
(Programmable logic device) or ROM (Read-only memory).

The above image shows the mapping of address of microinstruction from the OP-
code of an instruction. In the execution program, this microinstruction is the starting
microinstruction.

Subroutines:

Subroutines can be referred to as programs that are used to accomplish a particular

task by the other routines. With the help of employing subroutines, we can save the
microinstructions. These subroutines use the common sections of microcode, such
as effective address computation. The main routine is able to get the address for the
return with the help of a subroutine register. In another word, we can say that it
becomes a source to transfer the address to a main routine. The register file is used
to store the addresses for subroutines. These register files can be structured in a way
that the register will be organized in the 'Last in first out' (LIFO) stack.

2.3 Micro program

A sequence of microinstructions constitutes a microprogram. Since alterations of the
microprogram are not needed once the control unit is in operation, the control memory can
be a read-only memory (ROM). ROM words are made permanent during the hardware
production of the unit. The use of a micro program involves placing all control variables
in words of ROM for use by the control unit through successive read operations. The
content of the word in ROM at a given address specifies a microinstruction.
 Microinstruction Format

A microinstruction format includes 20 bits in total. They are divided into four
elements as displayed in the figure.

 F1, F2, F3 are the micro-operation fields. They determine micro-operations

for the computer.
 CD is the condition for branching. They choose the status bit conditions.
 BR is the branch field. It determines the type of branch.
 AD is the address field. It includes the address field whose length is 7 bits.
 The micro-operations are divided into three fields of three bits each. These
three bits can define seven different micro-operations.

 Symbolic Microprogram

The microinstructions can be determined by symbols. It is interpreted to its binary

format with an assembler. The symbols should be represented for each field in the
microinstruction. The users should be enabled to represent their symbolic addresses.
Each line in an assembly language represents symbolic instruction. These
instructions are divided into five fields such as label, micro-operations, CD, BR, and
AD.
The fields that specify the following information are as follows: -
 The label field may be empty or it may specify a symbolic address. A label is
terminated with a colon (:).
 The micro-operations field consists of one, two, or three symbols, separated
by commas. But each F field includes only a single symbol.
 The CD field has one of the letters U, I, S, or Z. where U-unconditional
Branch, I-Indirect address bit, S- Sign of AC, Z-Zero value in AC
 The BR field contains one of the four symbols defined. (JMP, CALL
,RET,MAP).
 The AD field specifies a value for the address field of the microinstruction in
one of three possible ways –
 With a Symbolic address, which must also appear as a label.
 With the symbol NEXT to designate the next address in sequence .
  When the BR field includes a RET or MAP symbol, the AD field is left
null and is transformed to seven zeros by the assembler.
 Binary Microprogram

It is Also the symbolic microprogram is a convenient way for writing microprograms

in a way that people can read and understand, but this is not the way that the
microprogram is stored in memory. The symbolic microprogram must be translated
to binary either by means of an assembler program or by the user if the microprogram
is simple enough as in this example.

The equivalent binary form of the microprograms is listed in Table below. The
addresses for control memory are given in both decimal and binary

2.4 Design of Control Unit

Control unit generates timing and control signals for the operations of the computer. The
control unit communicates with ALU and main memory. It also controls the transmission
between processor, memory and the various peripherals. It also instructs the ALU which
operation has to be performed on data.
A control unit works by receiving input information to which it converts into control
signals, which are then sent to the central processor. The computer’s processor then tells
the attached hardware what operations to perform. The functions that a control unit
performs are dependent on the type of CPU because the architecture of CPU varies from
manufacturer to manufacturer. Examples of devices that require a CU are:
 Central Processing Unit (CPU)
 Graphical Processing Unit(GPU)

 Component of Control unit

 The components of this unit are instruction registers, control signals within
the CPU, control signals to/from the bus, control bus, input flags, and clock
signals.
 The components of the Hardwired control unit are instruction register
(contains opcode and address field), timing unit, control state generator,
control signal generation matrix, and instruction decoder.
 The components of the Micro programmed control unit are the next address
generator, a control address register, control memory, and control data
register.
 Structure of Control Unit

A control unit has a set of input values on the foundation of which it produces an
output control signal which in turn performs micro-operations. These output signals
control execution of a program. A general model of control unit is displayed in
Figure below.
 Hardwired Control Unit

 It is implemented with the help of gates, flip flops, decoders etc. in the
hardware. The inputs to control unit are the instruction register, flags, timing
signals etc. This organization can be very complicated if we have to make the
control unit large.
 The basic data of an opcode (operation code of an instruction) is sent to the
instruction decoder for decoding. The instruction decoder is the set of
decoders to decode different types of data in the opcode. This results in output
signals which contain values of active signals that are given as the input to the
matrix generator to generate control signals for the execution of a program by
the processor of the computer.

 The matrix generator provides states of controls unit and the signals out from
the processor (interrupt signals). Matrix is built as the programmable logic
array. The control signals generated by the matrix generator are given as the
input to the next generator matrix and combines with the timing signals of the
timing unit that contains rectangular patterns.
 For fetching of new instruction, the control unit turns into an initial stage for
the execution of new instruction. The control unit remains in the initial stage
or first stage as long as the timing signals, input signals, and states of
instruction of a computer are unchanged. The change in the state of the control
unit can be raised if there any change in any of the generated signals.
 When an external signal or interrupt occurs, the control unit goes to the next
state and performs the processing of the interrupt signal. The flags and states
 are used to select the desired states to perform the execution cycle of
instruction.
 In the last state, the control unit fetches the next instruction and sends the
output to the program counter, then to the memory address register, to the
buffer register, and then to the instruction register to read the instruction.
Finally, if the last instruction (which is fetched by the control unit) is end
instruction, then it goes to the operating state of the processor and waits until
the user directs the next program.

 Microprogram Sequencer

 The basic components of microprogrammed control unit are are the control
memory and the circuits that select the next address.
 The task of Microinstruction sequencing is done by Microprogram sequencer.
 The address selection part is called microprogram sequencer.
 Microprogram sequencer can be constructed with digital function to to suit a
particular application.
 Two important factors that must be considered while designing the
microinstruction sequencer. i.e the size of the microinstruction and the address
of generation time.

CAR – Control Address Register

SBR – Subroutine Register
CD – Condition
BR –Branch
 The purpose of microprogram sequencer is to present an address to the control
memory so that a microinstruction may be read and executed
 The next address logic of the sequencer determines the specific address source
to be loaded into the CAR.
 The choice of the address source is guided by the next address information
bits that the sequencer receives from address information bits that the
sequencer receives from the present microinstruction.
 The control memory is included in the diagram to show the interaction
between the sequencer and the memory attached to it.
 There are two multiplexers in the circuit.
 The first multiplexer selects an address from one of the four sources and routes
it into the CAR.
 The second multiplexer tests the value of a selected status bit and the result of
the test is applied to an input logic circuit.
 The output from CAR provides the address for the control memory.
 The contents of CAR is incremented and applied to one of the multiplexer
inputs and to the SBR.
 The other three input come from the address field of the present
microinstruction, from the output of SBR and from an external source that
maps the instruction.
 Variables S0and S1 select one of the source addresses for CAR.
 Variable L enables the load input in SBR.
 The CD (condition) field of the microinstruction selects one of the status bits
in the second multiplexer.
 If the bit selected is 1, the T (test) variable is equal to 1, otherwise it is 0.
 The T value together with the two bits from the BR (branch) field go to an
input logic circuit.
 The Input logic in a particular sequencer determines the type of operations
that are available in the unit. Typical sequencer operations are: increment,
branch
 Typical sequencer operations are: increment, branch and jump, call and return
from subroutine, load an external address, push or pop the stack, and other
address sequencing operations.
 The binary values of the two selection variables determine the path in the
multiplexer. E.g. S1S0 = 10, multiplexer input number 2 is selected and
establishes a transfer path from SBR to CAR.