MCP2557FD/8FD: CAN FD Transceiver With Silent Mode

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MCP2557FD/8FD

CAN FD Transceiver with Silent Mode


Features Description
• Silent Mode is Useful in the Following The MCP2557FD/8FD CAN transceiver family is
Applications: designed for high-speed CAN FD applications with up
- Disables transmitter in redundant systems to 8 Mbps communication speed. The maximum prop-
- Implements babbling idiot protection agation delay was improved to support longer bus
- Tests connection of bus medium length.
- Prevents a faulty CAN controller from The device meets automotive requirements for CAN
disrupting all network communications FD bit rates exceeding 2 Mbps, low quiescent current,
• Optimized for CAN FD at 2, 5 and 8 Mbps electromagnetic compatibility (EMC) and electrostatic
Operation: discharge (ESD).
- Maximum propagation delay: 120 ns
- Loop delay symmetry: ±10%(2 Mbps)
Package Types
• Meets or Exceeds Stringent Automotive Design MCP2557FD MCP2558FD
Requirements Including “Hardware Require- SOIC SOIC
ments for LIN, CAN and FlexRay Interfaces in
TXD 1 8 S TXD 1 8 S
Automotive Applications”, Version 1.3, May 2012:
VSS 2 7 CANH VSS 2 7 CANH
- Conducted emissions at 2 Mbps with
Common-Mode Choke (CMC) VDD 3 6 CANL VDD 3 6 CANL
RXD 4 5 NC RXD 4 5 VIO
- DPI at 2 Mbps with CMC
• Meets SAE J2962/2 “Communication Transceiv-
MCP2557FD MCP2558FD
ers Qualification Requirements – CAN”
2x3 TDFN* 2x3 TDFN*
- Passes radiated emissions at 2 Mbps without
TXD 1 8 S TXD 1 8 S
a CMC
• Meets Latest ISO/DIS-11898-2:2015 VSS 2 EP 7 CANH VSS 2 EP 7 CANH
VDD 3
9 6 CANL 9
• Meets Latest SAE J2284-4 and -5 Working Drafts VDD 3 6 CANL
RXD 4 5 NC RXD 4 5 VIO
• Digital Inputs of the MCP2557FD are Compatible
to 3.3V and 5V Microcontrollers. RXD Output
MCP2557FD MCP2558FD
Requires a 5V Tolerant Microcontroller Input
3x3 DFN* 3x3 DFN*
• Functional Behavior Predictable Under all Supply
Conditions: TXD 1 8 S TXD 1 8 S

- Device is in Unpowered mode if VDD drops VSS 2 EP 7 CANH VSS 2 EP 7 CANH


below Power-on Reset (POR) level 9 9
VDD 3 6 CANL VDD 3 6 CANL
- Device is in Unpowered mode if VIO drops
below POR level
RXD 4 5 NC RXD 4 5 VIO

*Includes Exposed Thermal Pad (EP); see Table 1-1.


Applications
CAN 2.0 and CAN FD networks in Automotive,
Industrial, Aerospace, Medical, and Consumer
applications.

MCP2557FD/8FD Family Members


Device VIO Pin NC TTL I/O VIO I/O Description
MCP2557FD N/A Yes Yes N/A —
MCP2558FD Yes N/A N/A Yes Internal level shifter on digital I/O pins.
Note: For ordering information, see the Product Identification System section.

 2016 Microchip Technology Inc. DS20005533A-page 1


MCP2557FD/8FD
Block Diagram

VIO VDD

DIGITAL I/O THERMAL POR


SUPPLY PROTECTION UVLO

VIO

PERMANENT
TXD
DOMINANT DETECT

DRIVER CANH
VIO AND
SLOPE CONTROL
CANL
MODE
S
CONTROL

VDD CANH
RXD HS_RX
CANL

VSS
Note: Only the MCP2558FD has the VIO pin. In the MCP2557FD, the supply for the digital I/O is internally
connected to VDD.

DS20005533A-page 2  2016 Microchip Technology Inc.


MCP2557FD/8FD
1.0 DEVICE OVERVIEW 1.4 Permanent Dominant Detection
The MCP2557FD/8FD CAN transceiver family is The MCP2557FD/8FD device prevents a permanent
designed for high-speed CAN FD applications with up dominant condition on TXD.
to 8 Mbps communication speed. The product offers a In Normal mode, if the MCP2557FD/8FD detects an
Silent mode controlled by the Silent mode pin. The extended Low state on the TXD input, it will disable the
Silent mode is used to disable the CAN transmitter. CANH and CANL output drivers in order to prevent
This ensures that the device doesn’t drive the CAN data corruption on the CAN bus. The drivers will remain
bus. The MCP2557FD/8FD device provides disabled until TXD goes High. The high-speed receiver
differential transmit and receive capability for the CAN is active, and data on the CAN bus is received on RXD.
protocol controller, and is fully compatible with
specification ISO/DIS-11898-2:2015. The condition has a time-out of 1.9 ms (typical). This
implies a maximum bit time of 128 µs (7.8 kHz),
The loop delay symmetry is tested to support data rates allowing up to 18 consecutive dominant bits on the bus.
that are up to 8 Mbps for CAN FD (Flexible Data rate).
The maximum propagation delay was improved to
1.5 Power-on Reset (POR) and
support longer bus length.
Undervoltage Detection
Typically, each node in a CAN system must have a
device convert the digital signals generated by a CAN The MCP2557FD/8FD have POR detection on both
controller to signals suitable for transmission over the supply pins, VDD and VIO. Typical POR thresholds to
bus cabling (differential output). It also provides a buffer deassert the reset are 1.2V and 3.0V for VIO and VDD,
between the CAN controller and the high-voltage respectively.
spikes that can be generated on the CAN bus by When the device is powered on, CANH and CANL
outside sources. remain in a high-impedance state until VDD exceeds its
undervoltage level. Once powered on, CANH and
1.1 Transmitter Function CANL will enter a high-impedance state if the voltage
level at VDD drops below the undervoltage level,
The CAN bus has two states: Dominant and
providing voltage brown-out protection during normal
Recessive. A Dominant state occurs when the
operation.
differential voltage between CANH and CANL is
greater than VDIFF(D)(I). A Recessive state occurs The receiver output is forced to a Recessive state
when the differential voltage is less than VDIFF(R)(I). during an undervoltage condition on VDD.
The Dominant and Recessive states correspond to the
Low and High states of the TXD input pin, respectively.
However, a Dominant state initiated by another CAN
node will override a Recessive state on the CAN bus.

1.2 Receiver Function


The RXD output pin reflects the differential bus voltage
between CANH and CANL. The Low and High states of
the RXD output pin correspond to the Dominant and
Recessive states of the CAN bus, respectively.

1.3 Internal Protection


CANH and CANL are protected against battery short
circuits and electrical transients that can occur on the
CAN bus. This feature prevents destruction of the
transmitter output stage during such a fault condition.
The device is further protected from excessive current
loading by thermal shutdown circuitry that disables the
output drivers when the junction temperature exceeds
a nominal limit of +175°C.
All other parts of the chip remain operational, and the
chip temperature is lowered due to the decreased
power dissipation in the transmitter outputs. This
protection is essential to guard against bus line short-
circuit-induced damage. Thermal protection is only
active during Normal mode.

 2016 Microchip Technology Inc. DS20005533A-page 3


MCP2557FD/8FD
1.6 Mode Control
Figure 1-1 shows the state diagram of the MCP2557FD/
8FD.

1.6.1 UNPOWERED MODE (POR)

The MCP2557FD/8FD enters Unpowered mode if any


of the following conditions occur:
• After powering up the device
• If VDD drops below VPORL
• If VIO drops below VPORL_VIO
In Unpowered mode, the CAN bus will be biased to
ground using a high impedance. The MCP2557FD/
8FD is not able to communicate on the bus.

1.6.2 WAKE MODE

The MCP2557FD/8FD transitions from Unpowered


mode to Wake mode when VDD and VIO are above
their PORH levels. From Normal mode, if VDD is
smaller than VUVL, or if the bandgap output voltage is
not within valid range, the device will also enter Wake
mode.
In Wake mode, the CAN bus is biased to ground and
RXD is always high.
1.6.3 NORMAL MODE

When VDD exceeds VUVH, the band gap is within valid


range and TXD is High, the device transitions into
Normal mode. During POR, when the microcontroller
powers up, the TXD pin could be unintentionally pulled
down by the microcontroller powering up. To avoid
driving the bus during a POR of the microcontroller,
the transceiver proceeds to Normal mode only after
TXD is high.
In Normal mode, the driver block is operational and
can drive the bus pins. The slopes of the output
signals on CANH and CANL are optimized to reduce
Electromagnetic Emissions (EME). The CAN bus is
biased to VDD/2.
The high-speed differential receiver is active.

1.6.4 SILENT MODE


The device may be placed in Silent mode by applying
a high level to the ‘S’ pin (pin 8). In Silent mode, the
transmitter is disabled and the CAN bus is biased to
VDD/2. The high-speed differential receiver is active.
The CAN controller must put the MCP2557FD/8FD
back into Normal mode to enable the transmitter.

DS20005533A-page 4  2016 Microchip Technology Inc.


MCP2557FD/8FD
FIGURE 1-1: MCP2557FD/8FD STATE DIAGRAM

From any
State

VDD < VPORL


Or
VIO < VPORL_VIO

UnPowered (POR)
CAN High Impedance TXD Time-Out
Common Mode Tied to CAN Recessive
GND Common Mode VDD/2
HS RX OFF HS RX ON
RXD High RXD = f(HS RX)
Bandgap OFF

VDD > VPORH TXD High TXD Low > Tpdt


And And Or
VIO > VPORH_VIO T < TJ(SD)-TJ(HYST) T > TJ(SD)

TXD High
And
Bandgap ok
Wake And
Start Bandgap VDD > VUVH Normal
CAN High Impedance And CAN Driven
Common Mode Tied to Silent Low Common Mode VDD/2
GND HS RX ON
HS RX OFF RXD = f(HS RX)
RXD High Bandgap Not Ok
Or
VDD < VUVL

Bandgap Not Ok
SILENT Low
Or SILENT High
SILENT High
VDD < VUVL
And

Silent
CAN Recessive (TX OFF)
Common Mode VDD/2
HS RX ON
RXD = f(HS RX)

 2016 Microchip Technology Inc. DS20005533A-page 5


MCP2557FD/8FD
1.7 Pin Descriptions
The descriptions of the pins are listed in Table 1-1.
TABLE 1-1: MCP2557FD/8FD PIN DESCRIPTIONS
MCP2557FD MCP2558FD
MCP2557FD MCP2558FD
3 x 3 DFN, 3 x 3 DFN, Symbol Pin Function
SOIC SOIC
2 x 3 TDFN 2 x 3 TDFN
1 1 1 1 TXD Transmit Data Input
2 2 2 2 VSS Ground
3 3 3 3 VDD Supply Voltage
4 4 4 4 RXD Receive Data Output
5 5 — — NC No Connect (MCP2557FD only)
— — 5 5 VIO Digital I/O Supply Pin
(MCP2558FD only)
6 6 6 6 CANL CAN Low-Level Voltage I/O
7 7 7 7 CANH CAN High-Level Voltage I/O
8 8 8 8 S Silent Mode Input
9 — 9 — EP Exposed Thermal Pad

1.7.1 TRANSMITTER DATA 1.7.6 VIO PIN (MCP2557FD)


INPUT PIN (TXD) Supply for digital I/O pins. In the MCP2557FD, the
The CAN transceiver drives the differential output pins supply for the digital I/O (TXD, RXD and S) is internally
CANH and CANL according to TXD. It is usually connected to VDD.
connected to the transmitter data output of the CAN
controller device. When TXD is Low, CANH and CANL 1.7.7 DIGITAL I/O
are in the Dominant state. When TXD is High, CANH The MCP2557FD/8FD enable easy interfacing to
and CANL are in the Recessive state, provided that MCUs with I/O ranges from 1.8V to 5V.
another CAN node is not driving the CAN bus with a
Dominant state. TXD is connected from an internal pull- 1.7.7.1 MCP2557FD
up resistor (nominal 33 k) to VDD or VIO, in the
The VIH(MIN) and VIL(MAX) for TXD are independent of
MCP2557FD or MCP2558FD, respectively.
VDD. They are set at levels that are compatible with 3V
1.7.2 GROUND SUPPLY PIN (VSS) and 5V microcontrollers.
Ground supply pin. The RXD pin is always driven to VDD; therefore, a 3V
microcontroller will need a 5V tolerant input.
1.7.3 SUPPLY VOLTAGE PIN (VDD)
1.7.7.2 MCP2558FD
Positive supply voltage pin. Supplies transmitter and
receiver. VIH and VIL for S and TXD depend on VIO. The RXD pin
is driven to VIO.
1.7.4 RECEIVER DATA OUTPUT PIN (RXD)
1.7.8 CAN LOW PIN (CANL)
RXD is a CMOS-compatible output that drives High or
Low depending on the differential signals on the CANH The CANL output drives the Low side of the CAN
and CANL pins, and is usually connected to the differential bus. This pin is also tied internally to the
receiver data input of the CAN controller device. RXD is receive input comparator. CANL disconnects from the
High when the CAN bus is Recessive, and Low in the bus when the MCP2557FD/8FD devices are not
Dominant state. RXD is supplied by VDD or VIO, in the powered.
MCP2557FD or MCP2558FD, respectively.
1.7.9 CAN HIGH PIN (CANH)
1.7.5 NC PIN (MCP2557FD) The CANH output drives the high side of the CAN
No Connect. This pin can be left open or connected to differential bus. This pin is also tied internally to the
VSS. receive input comparator. CANH disconnects from the
bus when the MCP2557FD/8FD devices are not
powered.

DS20005533A-page 6  2016 Microchip Technology Inc.


MCP2557FD/8FD
1.7.10 SILENT MODE INPUT PIN (S)
This pin sets Normal or Silent mode. In Silent mode, the
transmitter is off and the high-speed receiver is active.
The CAN bus common mode voltage is VDD/2 when in
Silent mode.
The ‘S’ pin (pin 8) is connected to an internal MOS pull-
up resistor to VDD or VIO, in the MCP2557FD or
MCP2558FD, respectively. The value of the MOS pull-
up resistor depends on the supply voltage. Typical val-
ues are 660 k for 5V, 1.1 M for 3.3V and 4.4 M for
1.8V

1.7.11 EXPOSED THERMAL PAD (EP)


It is recommended to connect this pad to VSS to
enhance electromagnetic immunity and thermal
resistance.

 2016 Microchip Technology Inc. DS20005533A-page 7


MCP2557FD/8FD
1.8 TYPICAL APPLICATION
Figure 1-2 shows a typical application for the
MCP2557FD with the NC pin and a split termination.
Figure 1-3 illustrates a typical application for the
MCP2558FD.

FIGURE 1-2: MCP2557FD WITH NC AND SPLIT TERMINATION

VBAT
5V LDO
0.1 μF

CANH
VDD VDD
CANH

MCP2557FD
CANTX TXD
60 4700 pF
MCU
PIC®

CANRX RXD NC
60
RBX S CANL
CANL
VSS VSS

FIGURE 1-3: MCP2558FD WITH VIO PIN

VBAT
5V LDO

3.3V LDO
0.1 µF
0.1 µF

VDD VIO VDD CANH


MCP2558FD

CANTX TXD CANH


MCU
PIC®

CANRX RXD 120

RBX S CANL
CANL
VSS VSS

DS20005533A-page 8  2016 Microchip Technology Inc.


MCP2557FD/8FD
2.0 ELECTRICAL 2.1.5 DIFFERENTIAL VOLTAGE, VDIFF
CHARACTERISTICS (OF CAN BUS)
Differential voltage of the two-wire CAN bus, with value
2.1 Terms and Definitions equal to VDIFF = VCANH – VCANL.

A number of terms are defined in ISO/DIS-11898 that 2.1.6 INTERNAL CAPACITANCE, CIN
are used to describe the electrical characteristics of a (OF A CAN NODE)
CAN transceiver device. These terms and definitions
Capacitance seen between CANL (or CANH) and
are summarized in this section.
ground during the Recessive state when the CAN node
2.1.1 BUS VOLTAGE is disconnected from the bus (see Figure 2-1).

VCANL and VCANH denote the voltages of the bus line 2.1.7 INTERNAL RESISTANCE, RIN
wires CANL and CANH relative to the ground of each (OF A CAN NODE)
individual CAN node.
Resistance seen between CANL (or CANH) and
2.1.2 COMMON MODE BUS VOLTAGE ground during the Recessive state when the CAN node
RANGE is disconnected from the bus (see Figure 2-1).

Boundary voltage levels of VCANL and VCANH with


FIGURE 2-1: PHYSICAL LAYER
respect to ground, for which proper operation will occur,
DEFINITIONS
if the maximum number of CAN nodes are connected
to the bus.
ECU
2.1.3 DIFFERENTIAL INTERNAL
CAPACITANCE, CDIFF RIN
(OF A CAN NODE) CANL
Capacitance seen between CANL and CANH during RDIFF CDIFF
the Recessive state when the CAN node is RIN
disconnected from the bus (see Figure 2-1). CANH
CIN CIN
2.1.4 DIFFERENTIAL INTERNAL GROUND
RESISTANCE, RDIFF
(OF A CAN NODE)
Resistance seen between CANL and CANH during the
Recessive state when the CAN node is disconnected
from the bus (see Figure 2-1).

 2016 Microchip Technology Inc. DS20005533A-page 9


MCP2557FD/8FD
2.2 Absolute Maximum Ratings†
VDD .............................................................................................................................................................................7.0V
VIO ..............................................................................................................................................................................7.0V
DC Voltage at TXD, RXD, S and VSS ....................................................................................................-0.3V to VIO + 0.3V
DC Voltage at CANH, and CANL ................................................................................................................. -58V to +58V
Transient Voltage on CANH, and CANL (ISO/DIS-7637) (Figure 2-5) ..................................................... -150V to +100V
Differential Bus Input Voltage VDIFF(I) (t = 60 days, continuous)....................................................................-5V to +10V
Differential Bus Input Voltage VDIFF(I) (1000 pulses, t = 0.1 ms, VCANH = +18V).....................................................+17V
Dominant State Detection VDIFF(I) (10000 pulses, t = 1 ms).......................................................................................+9V
Storage temperature ...............................................................................................................................-55°C to +150°C
Operating ambient temperature ..............................................................................................................-40°C to +150°C
Virtual Junction Temperature, TVJ (IEC60747-1) ....................................................................................-40°C to +190°C
Soldering temperature of leads (10 seconds) .......................................................................................................+300°C
ESD protection on CANH and CANL pins (IEC 61000-4-2) ...................................................................................±13 kV
ESD protection on CANH and CANL pins (IEC 801; Human Body Model)..............................................................±8 kV
ESD protection on all other pins (IEC 801; Human Body Model).............................................................................±4 kV
ESD protection on all pins (IEC 801; Machine Model) ............................................................................................±400V
ESD protection on all pins (IEC 801; Charge Device Model) ..................................................................................±750V

† Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.

DS20005533A-page 10  2016 Microchip Technology Inc.


MCP2557FD/8FD

TABLE 2-1: DC CHARACTERISTICS


DC Specifications Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless
otherwise specified.
Parameter Sym. Min. Typ. Max. Units Conditions

Supply
VDD Pin
Voltage Range VDD 4.5 — 5.5 V
Supply Current IDD — 2.5 5 mA Recessive; VTXD = VDD
— 55 70 Dominant; VTXD = 0V
Silent Current IDDS — 1 3 mA MCP2557FD
— 1 3 MCP2558FD Includes IIO
Maximum Supply Current IDDMAX — 95 140 mA Fault condition: VTXD = VSS;
VCANH = VCANL = -5V to +18V
High Level of the POR VPORH — 3.0 3.95 V Note 1
Comparator for VDD
Low Level of the POR VPORL 1.0 2.0 3.2 V Note 1
Comparator for VDD
Hysteresis of POR VPORD 0.2 0.9 2.0 V Note 1
Comparator for VDD
High Level of the UV VUVH 4.0 4.25 4.4 V
Comparator for VDD
Low Level of the UV VUVL 3.6 3.8 4.0 V
Comparator for VDD
Hysteresis of UV comparator VUVD — 0.4 — V Note 1

VIO Pin
Digital Supply Voltage Range VIO 1.7 — 5.5 V
Supply Current on VIO IIO — 7 30 µA Recessive; VTXD = VIO
— 200 400 Dominant; VTXD = 0V
High Level of the POR VPORH_VIO 0.8 1.2 1.7 V
Comparator for VIO
Low Level of the POR VPORL_VIO 0.7 1.1 1.4 V
Comparator for VIO
Hysteresis of POR VPORD_VIO — 0.2 — V
Comparator for VIO
Bus Line (CANH; CANL) Transmitter
CANH; CANL: VO(R) 2.0 0.5 VDD 3.0 V VTXD = VDD; No load
Recessive Bus Output Voltage
Recessive Output Current IO(R) -5 — +5 mA -24V < VCAN < +24V
CANH: Dominant Output VO(D) 2.75 3.50 4.50 V TXD = 0; RL = 50 to 65
Voltage
CANL: Dominant Output 0.50 1.50 2.25 RL = 50 to 65
Voltage
Driver Symmetry VSYM 0.9 1.0 1.1 V 1 MHz square wave,
(VCANH+VCANL)/VDD Recessive and Dominant
states, and transition (Note 1)
Note 1: Characterized; not 100% tested.
2: Only MCP2558FD has a VIO pin. For MCP2557FD, VIO is internally connected to VDD.
3: -12V to 12V is ensured by characterization, and tested from -2V to 7V.

 2016 Microchip Technology Inc. DS20005533A-page 11


MCP2557FD/8FD
TABLE 2-1: DC CHARACTERISTICS (CONTINUED)
DC Specifications Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless
otherwise specified.
Parameter Sym. Min. Typ. Max. Units Conditions
Dominant: Differential Output VO(DIFF)(D) 1.5 2.0 3.0 V VTXD = VSS; RL = 50 to 65
Voltage (Figure 2-2, Figure 2-4)
(Note 1)
1.4 2.0 3.0 VTXD = VSS; RL = 45 to 70
(Figure 2-2, Figure 2-4,
Section 3) (Note 1)
1.3 2.0 3.0 VTXD = VSS; RL = 40 to 75
(Figure 2-2, Figure 2-4,
Section 3)
1.5 — 5.0 VTXD = VSS; RL = 2240
(Figure 2-2, Figure 2-4,
Section 3) (Note 1)
Recessive: VO(DIFF)(R) -500 0 50 mV VTXD = VDD, no load
Differential Output Voltage (Figure 2-2, Figure 2-4)
CANH: Short-Circuit IO(SC) -115 -85 — mA VTXD = VSS; VCANH = -3V;
Output Current CANL: floating
CANL: Short Circuit — 75 +115 mA VTXD = VSS; VCANL = +18V;
Output Current CANH: floating
Bus Line (CANH; CANL) Receiver
Recessive Differential VDIFF(R)(I) -4.0 — +0.5 V -12V < V(CANH, CANL) < +12V;
Input Voltage see Figure 2-6 (Note 3)
Dominant Differential VDIFF(D)(I) 0.9 — 9.0 V -12V < V(CANH, CANL) < +12V;
Input Voltage see Figure 2-6 (Note 3)
Differential VTH(DIFF) 0.5 0.7 0.9 V -12V < V(CANH, CANL) < +12V;
Receiver Threshold see Figure 2-6 (Note 3)
Differential VHYS(DIFF) 30 — 200 mV See Figure 2-6, (Note 1)
Input Hysteresis
Single Ended RCAN_H, 6 — 50 k Note 1
Input Resistance RCAN_L
Internal mR -3 0 +3 % VCANH = VCANL (Note 1)
Resistance Matching
mR=2*(RCANH-RCANL)/(RCANH+RCANL)
Differential Input RDIFF 12 25 100 k Note 1
Resistance
Internal Capacitance CIN — 20 — pF 1 Mbps (Note 1)
Differential CDIFF — 10 — pF 1 Mbps (Note 1)
Internal Capacitance
CANH, CANL: ILI -5 — +5 µA VDD = VTXD = VS = 0V.
Input Leakage For MCP2558FD, VIO = 0V.
VCANH = VCANL = 5 V.
Digital Input Pins (TXD, S)
High-Level Input Voltage VIH 2.0 — VDD + 0.3 V MCP2557FD
0.7 VIO — VIO + 0.3 MCP2558FD
Note 1: Characterized; not 100% tested.
2: Only MCP2558FD has a VIO pin. For MCP2557FD, VIO is internally connected to VDD.
3: -12V to 12V is ensured by characterization, and tested from -2V to 7V.

DS20005533A-page 12  2016 Microchip Technology Inc.


MCP2557FD/8FD
TABLE 2-1: DC CHARACTERISTICS (CONTINUED)
DC Specifications Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to +150°C;
VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless
otherwise specified.
Parameter Sym. Min. Typ. Max. Units Conditions
Low-Level Input Voltage VIL -0.3 — 0.8 V MCP2557FD
-0.3 — 0.3VIO MCP2558FD
High-Level Input Current IIH -1 — +1 µA
TXD: Low-Level Input Current IIL(TXD) -270 -150 -30 µA
S: Low-Level Input Current IIL(S) -30 — -1 µA
Receive Data (RXD) Output
High-Level Output Voltage VOH VDD - 0.4 — — V MCP2557FD: IOH = -2 mA;
typical -4 mA
VIO - 0.4 — — MCP2558FD:
VIO = 2.7V to 5.5V,
IOH = -1 mA;
VIO = 1.7V to 2.7V,
IOH = -0.5 mA,
typical -2 mA
Low-Level Output Voltage VOL — — 0.4 V IOL = 4 mA; typical 8 mA
Thermal Shutdown
Shutdown TJ(SD) 165 175 185 °C -12V < V(CANH, CANL) < +12V
Junction Temperature (Note 1)
Shutdown TJ(HYST) 15 — 30 °C -12V < V(CANH, CANL) < +12V
Temperature Hysteresis (Note 1)
Note 1: Characterized; not 100% tested.
2: Only MCP2558FD has a VIO pin. For MCP2557FD, VIO is internally connected to VDD.
3: -12V to 12V is ensured by characterization, and tested from -2V to 7V.

 2016 Microchip Technology Inc. DS20005533A-page 13


MCP2557FD/8FD
FIGURE 2-2: PHYSICAL BIT REPRESENTATION AND SIMPLIFIED BIAS IMPLEMENTATION

Normal Mode Silent Mode

CANH
CANH, CANL

CANL

Recessive Dominant Recessive Recessive

Time

VDD

CANH

Normal and Silent


VDD/2 RxD
Unpowered

CANL

TABLE 2-2: AC CHARACTERISTICS


AC Characteristics Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to
+150°C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF.
Maximum VDIFF(D)(I) = 3V.
Param.
Parameter Sym. Min. Typ. Max. Units Conditions
No.
1 Bit Time tBIT 0.125 — 69.44 µs
2 Nominal Bit Rate NBR 14.4 — 8000 kbps
3 Delay TXD Low to Bus tTXD-BUSON — 50 85 ns Note 1
Dominant
4 Delay TXD High to Bus tTXD-BUSOFF — 40 85 ns Note 1
Recessive
5 Delay Bus Dominant to tBUSON-RXD — 70 85 ns Note 1
RXD
6 Delay Bus Recessive to tBUSOFF-RXD — 110 145 ns Note 1
RXD
Note 1: Characterized, not 100% tested.
2: Not in ISO/DIS-11898-2:2015, but needs to be characterized.

DS20005533A-page 14  2016 Microchip Technology Inc.


MCP2557FD/8FD
TABLE 2-2: AC CHARACTERISTICS (CONTINUED)
AC Characteristics Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to
+150°C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF.
Maximum VDIFF(D)(I) = 3V.
Param.
Parameter Sym. Min. Typ. Max. Units Conditions
No.
7 Propagation Delay TXD to tTXD - RXD — 90 120 ns
RXD — 115 150 RL = 150,
Worst Case of tLOOP(R) CL = 200 pF(Note 1)
and tLOOP(F) Figure 2-9
7a Propagation Delay, tLOOP(R) — 90 120 ns
Rising Edge
7b Propagation Delay, tLOOP(F) — 80 120 ns
Falling Edge
8a Recessive Bit Time on tBIT(RXD), 1M 900 985 1100 ns tBIT(TXD) = 1000 ns
RXD – 1 Mbps, (Figure 2-9)
Loop Delay Symmetry 800 960 1255 tBIT(TXD) = 1000 ns
(Note 2) (Figure 2-9), RL = 150,
CL = 200 pF (Note 1)
8b Recessive Bit Time on tBIT(RXD), 2M 450 490 550 ns tBIT(TXD) = 500 ns
RXD – 2 Mbps, (Figure 2-9)
Loop Delay Symmetry 400 460 550 tBIT(TXD) = 500 ns
(Figure 2-9), RL = 150,
CL = 200 pF(Note 1)
8c Recessive Bit Time on tBIT(RXD), 5M 160 190 220 ns tBIT(TXD) = 200 ns
RXD – 5 Mbps, (Figure 2-9)
Loop Delay Symmetry
8d Recessive Bit Time on tBIT(RXD), 8M 85 100 135 ns tBIT(TXD) = 120 ns
RXD – 8 Mbps, (Figure 2-9) (Note 1)
Loop Delay Symmetry
(Note 2)
10 Delay Silent to Normal tWAKE — 7 30 µs Negative edge on S
Mode
11 Permanent Dominant tPDT 0.8 1.9 5 ms TXD = 0V
Detect Time
12 Permanent Dominant tPDTR — 5 — ns The shortest recessive
Timer Reset pulse on TXD or CAN bus
to reset Permanent
Dominant Timer
13a Transmitted Bit Time on tBIT(BUS), 1M 870 1000 1060 ns tBIT(TXD) = 1000 ns
Bus – 1 Mbps (Note 2) (Figure 2-9)
870 1000 1060 tBIT(TXD) = 1000 ns
(Figure 2-9),
RL = 150, CL = 200 pF
(Note 1)
13b Transmitted Bit Time on tBIT(BUS), 2M 435 515 530 ns tBIT(TXD) = 500 ns
Bus – 2 Mbp (Figure 2-9)
435 480 550 tBIT(TXD) = 500 ns
(Figure 2-9) RL = 150,
CL = 200 pF (Note 1)
Note 1: Characterized, not 100% tested.
2: Not in ISO/DIS-11898-2:2015, but needs to be characterized.

 2016 Microchip Technology Inc. DS20005533A-page 15


MCP2557FD/8FD
TABLE 2-2: AC CHARACTERISTICS (CONTINUED)
AC Characteristics Electrical Characteristics: Unless otherwise indicated, TAMB = -40°C to
+150°C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF.
Maximum VDIFF(D)(I) = 3V.
Param.
Parameter Sym. Min. Typ. Max. Units Conditions
No.
13c Transmitted Bit Time on tBIT(BUS), 5M 155 200 210 ns tBIT(TXD) = 200 ns
Bus – 5 Mbps (Figure 2-9) (Note 1)
13d Transmitted Bit Time on tBIT(BUS), 8M 100 125 140 ns tBIT(TXD) = 120 ns
Bus - 8Mbps (Figure 2-9) (Note 1)
(Note 2)
14a Receiver Timing tDIFF(REC), 1M -65 0 40 ns tBIT(TXD) = 1000 ns
Symmetry – 1 Mbps = (Figure 2-9)
(Note 2) tBIT(RXD) -130 0 80 tBIT(TXD) = 1000 ns
- (Figure 2-9), RL = 150,
tBIT(BUS) CL = 200 pF (Note 1)
14b Receiver Timing tDIFF(REC), 2M -65 0 40 ns tBIT(TXD) = 500 ns
Symmetry – 2 Mbps (Figure 2-9)
-70 0 40 tBIT(TXD) = 500 ns
(Figure 2-9), RL = 150,
CL = 200 pF (Note 1)
14c Receiver Timing tDIFF(REC), 5M -45 0 15 ns tBIT(TXD) = 200 ns
Symmetry – 5 Mbps (Figure 2-9) (Note 1)
14d Receiver Timing tDIFF(REC), 8M -45 0 10 ns tBIT(TXD) = 120 ns
Symmetry – 8 Mbps (Figure 2-9) (Note 1)
(Note 2) tDIFF(REC),8M
Note 1: Characterized, not 100% tested.
2: Not in ISO/DIS-11898-2:2015, but needs to be characterized.

FIGURE 2-3: TEST LOAD CONDITIONS


Load Condition 1 Load Condition 2

VDD/2

RL

CL CL
Pin Pin
RL = 464
CL = 50 pF for all digital pins VSS VSS

DS20005533A-page 16  2016 Microchip Technology Inc.


MCP2557FD/8FD
FIGURE 2-4: TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS

VDD 0.1 µF

CANH
TXD

CAN RL CL
Transceiver
RXD
15 pF CANL
GND S

Note: On MCP2558FD, VIO is connected to VDD.

FIGURE 2-5: TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS


CANH 1000 pF
TXD

CAN Transient
RL
Transceiver Generator
RXD
CANL 1000 pF
GND S

Note 1: On MCP2558FD, VIO is connected to VDD.


2: The wave forms of the applied transients should comply with ISO/DIS-7637, Part 1, test pulses 1, 2, 3a
and 3b.

FIGURE 2-6: HYSTERESIS OF THE RECEIVER

RXD (receive data


VOH
output voltage)
VDIFF (R)(I) VDIFF (D)(I)

VOL

VDIFF (H)(I)

0.5 VDIFF (V) 0.9

 2016 Microchip Technology Inc. DS20005533A-page 17


MCP2557FD/8FD
2.3 Timing Diagrams and Specifications

FIGURE 2-7: TIMING DIAGRAM FOR AC CHARACTERISTICS

VDD
TXD (transmit data
input voltage)
0V

VDIFF (CANH,
CANL differential
voltage)

RXD (receive data


output voltage) 3
5
7 4 6
7

FIGURE 2-8: PERMANENT DOMINANT TIMER RESET DETECT

Minimum pulse width until CAN bus goes to Dominant state after the falling edge.

TXD

VDIFF (VCANH-VCANL)
Driver is off

11 12

DS20005533A-page 18  2016 Microchip Technology Inc.


MCP2557FD/8FD
FIGURE 2-9: TIMING DIAGRAM FOR LOOP DELAY SYMMETRY

70%
TXD 30% 30%
5*tBIT(TXD) tLOOP(F)
TBIT(TXD)

VDIFF_BUS 900 mV
500 mV
13
tBIT(BUS)

70%
RXD
30%
tLOOP(R)
8
tBIT(RXD)

2.4 Thermal Specifications


Parameter Sym. Min. Typ. Max. Units
Temperature Ranges
Specified Temperature Range TA -40 — +150 C
Operating Temperature Range TA -40 — +150 C
Storage Temperature Range TA -65 — +155 C
Package Thermal Resistances
Thermal Resistance, 8LD DFN (3x3) JA — 56.7 — C/W
Thermal Resistance, 8LD SOIC JA — 149.5 — C/W
Thermal Resistance, 8LD TDFN (2x3) JA — 53 — C/W

 2016 Microchip Technology Inc. DS20005533A-page 19


MCP2557FD/8FD
3.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

2.3
2.2 -40 25 150
Dominant Differential Output

2.1
2
1.9
1.8
(V)

1.7
1.6
1.5
1.4
1.3
40 45 50 55 60 65 70 75
RL (Ω)

FIGURE 3-1: Dominant Differential Output


vs. RL (VDD = 4.5V).

2.3
Dominant Differential Output

2.2
2.1
2
1.9
(V)

1.8
1.7
1.6
1.5
1.4 -40 25 150
1.3
40 45 50 55 60 65 70 75
RL (Ω)

FIGURE 3-2: Dominant Differential Output


vs. RL (VDD = 5.0V).

2.6
Dominant Differential Output

2.5
2.4
2.3
2.2
2.1
(V)

2
1.9
1.8
1.7 -40 25 150
1.6
40 45 50 55 60 65 70 75
RL (Ω)

FIGURE 3-3: Dominant Differential Output


vs. RL (VDD = 5.5V).

DS20005533A-page 20  2016 Microchip Technology Inc.


MCP2557FD/8FD
4.0 PACKAGING INFORMATION
4.1 Package Marking Information
8-Lead SOIC (150 mil) Example:

Part Number Code


MCP2557
MCP2557FDT-H/SN MCP2557
SN e3 1609
MCP2557FD-H/SN MCP2557 256
MCP2558FDT-H/SN MCP2558
MCP2558FD-H/SN MCP2558

8-Lead TDFN (02x03x0.8 mm) Example:

Part Number Code


ACZ
MCP2557FDT-H/MNY ACZ 609
MCP2558FDT-H/MNY ADA 25

8-Lead DFN (03x03x0.9 mm) Example:

Part Number Code


MCP2557FDT-H/MF DAEO DAEN
MCP2557FD-H/MF DAEO 1609
256
MCP2558FDT-H/MF DAEQ
MCP2558FD-H/MF DAEQ

Legend: XX...X Customer-specific information


Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC®designator for Matte Tin (Sn)
e*3 This package is Pb-free. The Pb-free JEDEC® designator ( e)3
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will be
carried over to the next line, thus limiting the number of available characters for
customer-specific information.

 2016 Microchip Technology Inc. DS20005533A-page 21


MCP2557FD/8FD

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS20005533A-page 22  2016 Microchip Technology Inc.


MCP2557FD/8FD

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2016 Microchip Technology Inc. DS20005533A-page 23


MCP2557FD/8FD

           !" #$%&


 '  ! " #! $ !  %& '#( ##!   ) %  * !  !&!
!! +11'''"   "1  %

DS20005533A-page 24  2016 Microchip Technology Inc.


MCP2557FD/8FD

8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.75mm Body [TDFN]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

D A B
N

(DATUM A)
(DATUM B)
E
NOTE 1

2X
0.15 C
1 2
2X
0.15 C
TOP VIEW
0.10 C
(A3)
C A
SEATING
PLANE 8X
A1 0.08 C
SIDE VIEW
0.10 C A B
L D2
1 2

0.10 C A B

NOTE 1
E2

K
N
8X b
e 0.10 C A B
0.05 C
BOTTOM VIEW
Microchip Technology Drawing No. C04-129-MN Rev D Sheet 2 of 2

 2016 Microchip Technology Inc. DS20005533A-page 25


MCP2557FD/8FD

8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.75mm Body [TDFN]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e 0.50 BSC
Overall Height A 0.70 0.75 0.80
Standoff A1 0.00 0.02 0.05
Contact Thickness A3 0.20 REF
Overall Length D 2.00 BSC
Overall Width E 3.00 BSC
Exposed Pad Length D2 1.45 - 1.65
Exposed Pad Width E2 1.60 - 1.80
Contact Width b 0.20 0.25 0.30
Contact Length L 0.25 0.30 0.45
Contact-to-Exposed Pad K 0.20 - -
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Package is saw singulated
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing No. C04-129-MN Rev D Sheet 2 of 2

DS20005533A-page 26  2016 Microchip Technology Inc.


MCP2557FD/8FD

8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.75mm Body [TDFN]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

X2
EV
8

ØV

C Y2 EV

Y1

1 2
SILK SCREEN
X1
E

RECOMMENDED LAND PATTERN

Units MILLIMETERS
Dimension Limits MIN NOM MAX
Contact Pitch E 0.50 BSC
Optional Center Pad Width X2 1.65
Optional Center Pad Length Y2 1.80
Contact Pad Spacing C 2.90
Contact Pad Width (X8) X1 0.25
Contact Pad Length (X8) Y1 0.85
Thermal Via Diameter V 0.30
Thermal Via Pitch EV 1.00

Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process

Microchip Technology Drawing No. C04-129-MN Rev. A

 2016 Microchip Technology Inc. DS20005533A-page 27


MCP2557FD/8FD

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS20005533A-page 28  2016 Microchip Technology Inc.


MCP2557FD/8FD

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2016 Microchip Technology Inc. DS20005533A-page 29


MCP2557FD/8FD

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS20005533A-page 30  2016 Microchip Technology Inc.


MCP2557FD/8FD
APPENDIX A: REVISION HISTORY

Revision A (March 2016)


Initial release of this document.

 2016 Microchip Technology Inc. DS20005533A-page 31


MCP2557FD/8FD
NOTES:

DS20005533A-page 32  2016 Microchip Technology Inc.


MCP2557FD/8FD
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. [X](1) X /XX


Examples:
Device Tape and Reel Temperature Package a) MCP2558FDT-H/MF: Tape and Reel,
Option Range 8-lead, Plastic Dual
Flat No Lead DFN
package.
Device: MCP2557FD: CAN FD Transceiver w/No b) MCP2557FD-H/SN: 8-lead, Plastic Small
Connect Pin 5 Outline SOIC pack-
MCP2558FD: CAN FD Transceiver w/VIO age.
Connect Pin 5
c) MCP2558FDT-H/MNY:Tape and Reel,
8-lead, Plastic Dual
Tape and Reel Blank = Standard packaging (tube or tray) Flat No Lead TDFN
Option: T = Tape and Reel(1) package.

Temperature H = -40C to +150°C


Range:

Note1: Tape and Reel identifier only appears


Package: MF = Plastic Dual Flat No Lead Package – in the catalog part number description.
3x3x0.9 mm Body (DFN), 8-lead
This identifier is used for ordering
MNY = Plastic Dual Flat No Lead Package – purposes and is not printed on the
2x3x0.75 mm Body (TDFN), 8-lead device package. Check with your
Microchip Sales Office for package
SN = Plastic Small Outline (SN) – Narrow,
3.90 mm, Body (SOIC), 8-lead availability with the Tape and Reel
option.

 2016 Microchip Technology Inc. DS20005533A-page 33


MCP2557FD/8FD
NOTES:

DS20005533A-page 34  2016 Microchip Technology Inc.


Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks


applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, AnyRate,
and may be superseded by updates. It is your responsibility to
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
ensure that your application meets with your specifications.
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
MICROCHIP MAKES NO REPRESENTATIONS OR
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O
IMPLIED, WRITTEN OR ORAL, STATUTORY OR are registered trademarks of Microchip Technology
OTHERWISE, RELATED TO THE INFORMATION, Incorporated in the U.S.A. and other countries.
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR ClockWorks, The Embedded Control Solutions Company,
FITNESS FOR PURPOSE. Microchip disclaims all liability ETHERSYNCH, Hyper Speed Control, HyperLight Load,
arising from this information and its use. Use of Microchip IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
devices in life support and/or safety applications is entirely at registered trademarks of Microchip Technology Incorporated
the buyer’s risk, and the buyer agrees to defend, indemnify and in the U.S.A.
hold harmless Microchip from any and all damages, claims, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
suits, or expenses resulting from such use. No licenses are BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
conveyed, implicitly or otherwise, under any Microchip dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
intellectual property rights unless otherwise stated. EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and Silicon Storage Technology is a registered trademark of
Tempe, Arizona; Gresham, Oregon and design centers in California Microchip Technology Inc. in other countries.
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping GestIC is a registered trademarks of Microchip Technology
devices, Serial EEPROMs, microperipherals, nonvolatile memory and Germany II GmbH & Co. KG, a subsidiary of Microchip
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified. Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
QUALITY MANAGEMENT SYSTEM © 2016, Microchip Technology Incorporated, Printed in the
CERTIFIED BY DNV U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0443-9
== ISO/TS 16949 ==

 2016 Microchip Technology Inc. DS20005533A-page 35


Worldwide Sales and Service
AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
Corporate Office Asia Pacific Office China - Xiamen Austria - Wels
2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 86-592-2388138 Tel: 43-7242-2244-39
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Tel: 480-792-7200 Harbour City, Kowloon China - Zhuhai Denmark - Copenhagen
Fax: 480-792-7277 Hong Kong Tel: 86-756-3210040 Tel: 45-4450-2828
Technical Support: Tel: 852-2943-5100 Fax: 86-756-3210049 Fax: 45-4485-2829
http://www.micro- Fax: 852-2401-3431 India - Bangalore France - Paris
chip.com/support
Australia - Sydney Tel: 91-80-3090-4444 Tel: 33-1-69-53-63-20
Web Address:
Tel: 61-2-9868-6733 Fax: 91-80-3090-4123 Fax: 33-1-69-30-90-79
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Noblesville, IN
Tel: 317-773-8323 Fax: 86-24-2334-2393 Fax: 65-6334-8850
Fax: 317-773-5453 China - Shenzhen Taiwan - Hsin Chu
Tel: 86-755-8864-2200 Tel: 886-3-5778-366
Los Angeles
Fax: 86-755-8203-1760 Fax: 886-3-5770-955
Mission Viejo, CA
Tel: 949-462-9523 China - Wuhan Taiwan - Kaohsiung
Fax: 949-462-9608 Tel: 86-27-5980-5300 Tel: 886-7-213-7828
Fax: 86-27-5980-5118 Taiwan - Taipei
New York, NY
Tel: 631-435-6000 China - Xian Tel: 886-2-2508-8600
Tel: 86-29-8833-7252 Fax: 886-2-2508-0102
San Jose, CA
Tel: 408-735-9110 Fax: 86-29-8833-7256 Thailand - Bangkok
Tel: 66-2-694-1351
Canada - Toronto
Tel: 905-673-0699 Fax: 66-2-694-1350
Fax: 905-673-6509
07/14/15

DS20005533A-page 36  2016 Microchip Technology Inc.

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