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    Digital Electronics Ii-Ii Cse Mid-I

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    Digital Electronics Ii-Ii Cse Mid-I

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    Digital Electronics Ii-Ii Cse Mid-I

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    DIGITAL ELECTRONICS

    II-II CSE MID-I

    1. a) Draw the symbol and truth tables of digital logic gates and explain.?

    b) Convert 425 and 523 into excess-3 code.?

    2. a) Convert into standard SOP expression : ABC+AB’CD+ABD’+A’BC.

    b)F(A,B,C,D,E,)=∑(1,4,5,9,10,19,20,21,24,27) Reduce the expression using k map.?

    3. a) F(A,B,C,D)=π(0,1,2,7,8,,13,15)+d(3,4,5,10,11) Reduce the function using k-map.?

    b) DesignCOMBINATIONAL LOGIC Combinational Circuits, Analysis procedure Design procedure

    4. explain The map method, Four-variable map, Five-Variable map, product of sums simplification
    Don’t-care conditionsBinary Adder-Subtractor

    5. a)explain NAND and NOR implementation other Two-level implementations, Exclusive – Or function.

    b) explain Boolean functions, canonical and standard forms?

    6.A. Convert the number 506210 to the binary system, Convert the hexadecimal number 2C4 to the
    decimal number system

    B. Convert 15910 to the octal number system, Convert the binary number 110010112 to the decimal number
    system

    OBJECTIVE PAPER
    1.According to algebra A+A+…….+A is [ ]

    a)A b)0 c)1 d) nA

    2.Which of the following is Incorrect expression.? [ ]

    a)A+B=B+A b)A+AB=B c)A.0=0 d)A.1=A

    3.A 15 bit Hamming code requires ……parity bits.? [ ]

    a)4 b)5c)15 d)7

    4. Which gate output is ‘1’ when its inputs is’0 [ ]

    a)AND b)OR c) NAND d) EX-OR


    5.What are the symbol used to represent digits in the binary number system. [ ]

    a)0,1 b)0,1,2 c)0 through 8 d)1,2

    6.Decimal value of binary 10010 [ ]

    a)6 b)9 c)18 d)20

    7The basic logic gate whose output is the complement of the input is the ________ [ ]

    a) OR gate b) AND gate c) INVERTER gate d) XOR gate

    8. The code where all successive numbers differ from their preceding number by single bit is
    __________
    a) Alphanumeric Code b) BCD c) Excess 3 d) Gray

    9..Which of the following combinations can’t be combined [ ]

    a)corners in same row b) )corners in same column

    c)diagonal d) overlapping

    10. How many AND gates are required to realize Y = CD + EF + G? [ ]

    a) 4 b) 5 c) 3 d) 2

    11.The fraction (0.68)10=( ? )2

    12.Convert binary code 110110 to gray……………..

    13. In which flip flop the present input will be the next output……………

    14.ABC+AC Convert to standard SOP………..

    15.The number cells in group must be a power of……………….

    16.2’s complement of (011100)2 is …………….

    17. A full adder logic circuit will have __________

    18. The output of an OR gate is LOW, when its input are ……………

    19. The gates required to build a half adder are __________

    20___________ truth table entries are necessary for a four-input circuit?.

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