Chapter 2 V

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Embedded Systems

• The embedded system refers to using electronics and software


within a product instead of a general-purpose computer, such
as a laptop or desktop system.
• Often embedded systems are tightly coupled to their
environment

CO, Lecture3 Eng. manal A.al-Areqi


Custom
logic

Processor Memory

Human Diagnostic
interface port

A/D D/A
conversion Conversion

Actuators/
Sensors
indicators

Figure Organization
1.14 Possible Organization of an Embedded
of an Embedded SystemSystem
Differences between general purpose computers
and embedded systems:
• An interactive system, there are a variety of interfaces that enable
the system to measure, manipulate, and otherwise interact with the
external environment.
• Embedded systems interact (sense, manipulate, and communicate)
with external world through sensors and actuators.
• The human interface may be as simple as a flashing light or as
complicated as real-time robotic vision. In many cases, there is no
human interface.
• The diagnostic port may be used for diagnosing the system that is
being controlled.
• Software often has a fixed function and is specific to the
application.
• Efficiency is of paramount importance for embedded systems.

• The ability to field upgrade to fix bugs, to improve security, and to


add functionality.
Microprocessors

microprocessor chips
include multiple cores
and a substantial
amount of cache
memory.
Microcontroller
“computer on a
chip “
The Internet of Things (IoT)
• Term that refers to the expanding interconnection of smart
devices, ranging from appliances to tiny sensors.

CO, Lecture3 Eng. manal A.al-Areqi


Cloud Computing

•Internet-based computing, whereby shared


resources, software, and information are
provided to computers and other devices on-
demand, like the electricity grid.
•Cloud computing is a culmination of
numerous attempts at large-scale computing
with seamless access to virtually limitless
resources.

CO, Lecture3 Eng. manal A.al-Areqi


Alternative Information Technology Architectures
Manal Abdulelah Areqi
[email protected]
Performance

Microprocessor Speed

Techniques built into contemporary processors to


increase performance include

Superscalar Branch Speculative Data flow


Pipelining
execution prediction execution analysis
Microprocessor Speed

Pipelining
• Pipelining is the process of sending multiple data
packets serially without waiting for the previous
acknowledgment.
• This technique is beneficial when the amount of data
to be transferred is very large, and we send the data by
dividing them into various parts.
• It facilitates parallelism in execution at the hardware
level.
• “Common” instructions (arithmetic, load/store,
conditional branch) can be executed independently.
• Pipelining does not reduce the execution time of
individual instructions but reduces the overall
execution time required for a program.
Microprocessor Speed

Pipelining

Pipelined vs Non-Pipelined Instruction Execution


Microprocessor Speed

Pipelining

The functionalities of pipelining in


the computer networks:
•High Performance
•Efficient use of resources
•Time Efficiency
•Fast Data Delivery
•Reduces the process waiting-time
Microprocessor Speed

Superscalar execution

•The ability to issue multiple


independent instructions in
parallel in every processor clock
cycle.
•Multiple parallel pipelines are
used.
Microprocessor Speed

Superscalar v Superpipelined
Microprocessor Speed

Branch prediction
• The processor looks ahead in the instruction code fetched from
memory and predicts which branches, or groups of
instructions, are likely to be processed next.
• The purpose of the branch predictor is to improve the flow in
the instruction pipeline.
• The prediction is executed and the results are kept temporarily,
and if it is later detected that the guess was wrong, the
speculatively executed or partially executed instructions are
discarded and the pipeline starts over with the correct branch,
causing a delay.
Microprocessor Speed

Speculative execution
Using branch prediction and data flow
analysis, some processors speculatively
execute instructions ahead of their actual
appearance in the program execution, holding
the results in temporary locations, and keeping
execution engines as busy as possible.

Data flow analysis


The processor analyzes which instructions are
dependent on each other’s results, or data, to
create an optimized schedule of instructions.
Performance

Performance Balance
It is necessary to
adjust the
organization and
architecture to
compensate

CPU The overall balance


in the system is
more important
than the raw
performance of any
one component.
Performance

Performance Balance
To overcome the imbalance between memory and processor
speeds there are several approaches

Increase the number of bits that Increase the interconnect


are retrieved at one time by bandwidth between processors
making DRAMs “wider” rather and memory by using higher-
than “deeper” and by using speed buses and a hierarchy of
wide bus data paths – 8, 16, 32, buses to buffer and structure
and 64-bit systems. data flow.
Reduce the frequency of
memory access by
incorporating increasingly
complex and efficient cache
structures between the
processor and main
memory(memory hierarchy).
Performance

Improvements in Chip Organization and


Architecture
• Increase hardware speed of processor
• Increase size and speed of caches
• Change processor organization and architecture
Problems with Clock Speed and Login
Density
•Power
•RC delay
•Memory latency
New approach to improving performance

•Multicore: multiple processors on the same


chip, with a large shared cache.
•Many Integrated Core (MIC)
•Graphics Processing Unit (GPU)
Multicore
The use of multiple processors
on the same chip

Strategy is to use two simpler


processors on the chip rather
than one more complex
processor
Many Integrated Core (MIC)
Graphics Processing Unit (GPU)

MIC GPU
• A large number of cores per • A chip with multiple general-
chip. purpose processors plus graphics
• The multicore and MIC processing units (GPUs) and
strategy involves a specialized cores for video
homogeneous collection of processing and other tasks.
general purpose processors
on a single chip.

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